|
[PML Ver]			2.1
[Comment Char]		|_char
[File Rev]			1.0
[Date]				February 27, 1997
[Source]			Created by HyperLynx, Inc.
[Notes]        Created by HyperLynx, Inc.
[Disclaimer] 
|
    The user is granted a license only to use this PML
model in conjunction with HyperLynx software and is not 
granted rights to sell, rent, lease or license the PML 
model in whole or in part, or in modified form to anyone
other than user. User may modify the PML model to suit
specific applications but rights to derivative works and
such modifications shall belong to HyperLynx, Inc.
|
    Although HyperLynx has made reasonable efforts to ensure
the accuracy and quality of this PML model, the model is 
provided on an "AS IS" basis and HyperLynx makes absolutely 
no warranty with respect to the information contained herein.
HyperLynx disclaims and the user waives all warranties, 
express or implied, including warranties of merchantability 
of fitness for a particular prupose. The entire risk as to 
quality and performance is with the user. Accordingly, in no 
event shall HyperLynx be liable for any damages, including
any lost profits or any other incidental, consequential,
exemplary, or punitive damages arising out of the use or
application of the PML model provided in this package.
|
[Copyright]			Copyright 1997, HyperLynx, Inc.  All rights reserved.
|
|==============================================================================
| Note:	The [Contents] record must precede all [Package] and [Component]
|			records in the file
|==============================================================================
[Contents]
74AS00_DIP
74AS00_SOIC
74AS00_SSOP
74AS00_TSSOP
74AS02_DIP
74AS02_SOIC
74AS02_SSOP
74AS02_TSSOP
74AS04_DIP
74AS04_SOIC
74AS04_SSOP
74AS04_TSSOP
74AS08_DIP
74AS08_SOIC
74AS08_SSOP
74AS08_TSSOP
74AS10_DIP
74AS10_SOIC
74AS10_SSOP
74AS10_TSSOP
74AS11_DIP
74AS11_SOIC
74AS11_SSOP
74AS11_TSSOP
74AS20_DIP
74AS20_SOIC
74AS20_SSOP
74AS20_TSSOP
74AS21_DIP
74AS21_SOIC
74AS21_SSOP
74AS21_TSSOP
74AS27_DIP
74AS27_SOIC
74AS27_SSOP
74AS27_TSSOP
74AS30_DIP
74AS30_SOIC
74AS30_SSOP
74AS30_TSSOP
74AS32_DIP
74AS32_SOIC
74AS32_SSOP
74AS32_TSSOP
74AS34_DIP
74AS34_SOIC
74AS34_SSOP
74AS34_TSSOP
74AS74_DIP
74AS74_SOIC
74AS74_SSOP
74AS74_TSSOP
74AS86_DIP
74AS86_SOIC
74AS86_SSOP
74AS86_TSSOP
74AS95_DIP
74AS95_SOIC
74AS95_SSOP
74AS95_TSSOP
74AS109_DIP
74AS109_SOIC
74AS109_SSOP
74AS112_DIP
74AS112_SOIC
74AS112_SSOP
74AS113_DIP
74AS113_SOIC
74AS113_SSOP
74AS113_TSSOP
74AS114_DIP
74AS114_SOIC
74AS114_SSOP
74AS114_TSSOP
74AS131_DIP
74AS131_SOIC
74AS131_SSOP
74AS136_DIP
74AS136_SOIC
74AS136_SSOP
74AS136_TSSOP
74AS137_DIP
74AS137_SOIC
74AS137_SSOP
74AS138_DIP
74AS138_SOIC
74AS138_SSOP
74AS151_DIP
74AS151_SOIC
74AS151_SSOP
74AS153_DIP
74AS153_SOIC
74AS153_SSOP
74AS157_DIP
74AS157_SOIC
74AS157_SSOP
74AS158_DIP
74AS158_SOIC
74AS158_SSOP
74AS160_DIP
74AS160_SOIC
74AS160_SSOP
74AS161_DIP
74AS161_SOIC
74AS161_SSOP
74AS162_DIP
74AS162_SOIC
74AS162_SSOP
74AS163_DIP
74AS163_SOIC
74AS163_SSOP
74AS168_DIP
74AS168_SOIC
74AS168_SSOP
74AS169_DIP
74AS169_SOIC
74AS169_SSOP
74AS174_DIP
74AS174_SOIC
74AS174_SSOP
74AS175_DIP
74AS175_SOIC
74AS175_SSOP
74AS181_DIP
74AS181_SOIC
74AS181_SSOP
74AS181_TSSOP
74AS182_DIP
74AS182_SOIC
74AS182_SSOP
74AS194_DIP
74AS194_SOIC
74AS194_SSOP
74AS195_DIP
74AS195_SOIC
74AS195_SSOP
74AS230_DIP
74AS230_SOIC
74AS230_SSOP
74AS230_TSSOP
74AS231_DIP
74AS231_SOIC
74AS231_SSOP
74AS231_TSSOP
74AS240_DIP
74AS240_SOIC
74AS240_SSOP
74AS240_TSSOP
74AS241_DIP
74AS241_SOIC
74AS241_SSOP
74AS241_TSSOP
74AS242_DIP
74AS242_SOIC
74AS242_SSOP
74AS242_TSSOP
74AS243_DIP
74AS243_SOIC
74AS243_SSOP
74AS243_TSSOP
74AS244_DIP
74AS244_SOIC
74AS244_SSOP
74AS244_TSSOP
74AS245_DIP
74AS245_SOIC
74AS245_SSOP
74AS245_TSSOP
74AS250_DIP
74AS250_SOIC
74AS250_SSOP
74AS250_TSSOP
74AS251_DIP
74AS251_SOIC
74AS251_SSOP
74AS253_DIP
74AS253_SOIC
74AS253_SSOP
74AS257_DIP
74AS257_SOIC
74AS257_SSOP
74AS258_DIP
74AS258_SOIC
74AS258_SSOP
74AS264_DIP
74AS264_SOIC
74AS264_SSOP
74AS280_DIP
74AS280_SOIC
74AS280_SSOP
74AS280_TSSOP
74AS282_DIP
74AS282_SOIC
74AS282_SSOP
74AS282_TSSOP
74AS286_DIP
74AS286_SOIC
74AS286_SSOP
74AS286_TSSOP
74AS352_DIP
74AS352_SOIC
74AS352_SSOP
74AS353_DIP
74AS353_SOIC
74AS353_SSOP
74AS373_DIP
74AS373_SOIC
74AS373_SSOP
74AS373_TSSOP
74AS374_DIP
74AS374_SOIC
74AS374_SSOP
74AS374_TSSOP
74AS533_DIP
74AS533_SOIC
74AS533_SSOP
74AS533_TSSOP
74AS534_DIP
74AS534_SOIC
74AS534_SSOP
74AS534_TSSOP
74AS573_DIP
74AS573_SOIC
74AS573_SSOP
74AS573_TSSOP
74AS574_DIP
74AS574_SOIC
74AS574_SSOP
74AS574_TSSOP
74AS575_DIP
74AS575_SOIC
74AS575_SSOP
74AS575_TSSOP
74AS576_DIP
74AS576_SOIC
74AS576_SSOP
74AS576_TSSOP
74AS577_DIP
74AS577_SOIC
74AS577_SSOP
74AS577_TSSOP
74AS580_DIP
74AS580_SOIC
74AS580_SSOP
74AS580_TSSOP
74AS620_DIP
74AS620_SOIC
74AS620_SSOP
74AS620_TSSOP
74AS621_DIP
74AS621_SOIC
74AS621_SSOP
74AS621_TSSOP
74AS622_DIP
74AS622_SOIC
74AS622_SSOP
74AS622_TSSOP
74AS623_DIP
74AS623_SOIC
74AS623_SSOP
74AS623_TSSOP
74AS638_DIP
74AS638_SOIC
74AS638_SSOP
74AS638_TSSOP
74AS639_DIP
74AS639_SOIC
74AS639_SSOP
74AS639_TSSOP
74AS640_DIP
74AS640_SOIC
74AS640_SSOP
74AS640_TSSOP
74AS641_DIP
74AS641_SOIC
74AS641_SSOP
74AS641_TSSOP
74AS642_DIP
74AS642_SOIC
74AS642_SSOP
74AS642_TSSOP
74AS643_DIP
74AS643_SOIC
74AS643_SSOP
74AS643_TSSOP
74AS644_DIP
74AS644_SOIC
74AS644_SSOP
74AS644_TSSOP
74AS645_DIP
74AS645_SOIC
74AS645_SSOP
74AS645_TSSOP
74AS646_DIP
74AS646_SOIC
74AS646_SSOP
74AS646_TSSOP
74AS646_DIP
74AS646_SOIC
74AS646_SSOP
74AS646_TSSOP
74AS648_DIP
74AS648_SOIC
74AS648_SSOP
74AS648_TSSOP
74AS648_DIP
74AS648_SOIC
74AS648_SSOP
74AS648_TSSOP
74AS651_DIP
74AS651_SOIC
74AS651_SSOP
74AS651_TSSOP
74AS652_DIP
74AS652_SOIC
74AS652_SSOP
74AS652_TSSOP
74AS652_DIP
74AS652_SOIC
74AS652_SSOP
74AS652_TSSOP
74AS804_DIP
74AS804_SOIC
74AS804_SSOP
74AS804_TSSOP
74AS805_DIP
74AS805_SOIC
74AS805_SSOP
74AS805_TSSOP
74AS808_DIP
74AS808_SOIC
74AS808_SSOP
74AS808_TSSOP
74AS810_DIP
74AS810_SOIC
74AS810_SSOP
74AS810_TSSOP
74AS811_DIP
74AS811_SOIC
74AS811_SSOP
74AS811_TSSOP
74AS821_DIP
74AS821_SOIC
74AS821_SSOP
74AS821_TSSOP
74AS822_DIP
74AS822_SOIC
74AS822_SSOP
74AS822_TSSOP
74AS823_DIP
74AS823_SOIC
74AS823_SSOP
74AS823_TSSOP
74AS824_DIP
74AS824_SOIC
74AS824_SSOP
74AS824_TSSOP
74AS825_DIP
74AS825_SOIC
74AS825_SSOP
74AS825_TSSOP
74AS826_DIP
74AS826_SOIC
74AS826_SSOP
74AS826_TSSOP
74AS832_DIP
74AS832_SOIC
74AS832_SSOP
74AS832_TSSOP
74AS841_DIP
74AS841_SOIC
74AS841_SSOP
74AS841_TSSOP
74AS842_DIP
74AS842_SOIC
74AS842_SSOP
74AS842_TSSOP
74AS843_DIP
74AS843_SOIC
74AS843_SSOP
74AS843_TSSOP
74AS844_DIP
74AS844_SOIC
74AS844_SSOP
74AS844_TSSOP
74AS845_DIP
74AS845_SOIC
74AS845_SSOP
74AS845_TSSOP
74AS846_DIP
74AS846_SOIC
74AS846_SSOP
74AS846_TSSOP
74AS850_DIP
74AS850_SOIC
74AS850_SSOP
74AS851_DIP
74AS851_SOIC
74AS851_SSOP
74AS852_DIP
74AS852_SOIC
74AS852_SSOP
74AS852_TSSOP
74AS856_DIP
74AS856_SOIC
74AS856_SSOP
74AS856_TSSOP
74AS867_DIP
74AS867_SOIC
74AS867_SSOP
74AS867_TSSOP
74AS869_DIP
74AS869_SOIC
74AS869_SSOP
74AS869_TSSOP
74AS870_DIP
74AS870_SOIC
74AS870_SSOP
74AS871_DIP
74AS871_SOIC
74AS871_SSOP
74AS871_TSSOP
74AS873_DIP
74AS873_SOIC
74AS873_SSOP
74AS873_TSSOP
74AS874_DIP
74AS874_SOIC
74AS874_SSOP
74AS874_TSSOP
74AS876_DIP
74AS876_SOIC
74AS876_SSOP
74AS876_TSSOP
74AS877_DIP
74AS877_SOIC
74AS877_SSOP
74AS877_TSSOP
74AS878_DIP
74AS878_SOIC
74AS878_SSOP
74AS878_TSSOP
74AS879_DIP
74AS879_SOIC
74AS879_SSOP
74AS879_TSSOP
74AS880_DIP
74AS880_SOIC
74AS880_SSOP
74AS880_TSSOP
74AS881_DIP
74AS881_SOIC
74AS881_SSOP
74AS881_TSSOP
74AS882_DIP
74AS882_SOIC
74AS882_SSOP
74AS882_TSSOP
74AS885_DIP
74AS885_SOIC
74AS885_SSOP
74AS885_TSSOP
74AS1000_DIP
74AS1000_SOIC
74AS1000_SSOP
74AS1000_TSSOP
74AS1004_DIP
74AS1004_SOIC
74AS1004_SSOP
74AS1004_TSSOP
74AS1008_DIP
74AS1008_SOIC
74AS1008_SSOP
74AS1008_TSSOP
74AS1032_DIP
74AS1032_SOIC
74AS1032_SSOP
74AS1032_TSSOP
74AS1034_DIP
74AS1034_SOIC
74AS1034_SSOP
74AS1034_TSSOP
74AS1036_DIP
74AS1036_SOIC
74AS1036_SSOP
74AS1036_TSSOP
74AS2620_DIP
74AS2620_SOIC
74AS2620_SSOP
74AS2620_TSSOP
74AS2623_DIP
74AS2623_SOIC
74AS2623_SSOP
74AS2623_TSSOP
74AS2640_DIP
74AS2640_SOIC
74AS2640_SSOP
74AS2640_TSSOP
74AS2645_DIP
74AS2645_SOIC
74AS2645_SSOP
74AS2645_TSSOP
|
|
| [Family] is only included in the Master File.  This is used for sorting
|			purposes and is deleted when the individual family libraries are 
|            created.
|
| ENBO == Enable-able Output, used in tri-state output devices
|			where output is not shared with input on same pin (i.e. SN74LS244)
| IN   == input only
| OUT  == output only
| BIDIR == input/output, used in line drivers where a single pin is 
|			used as input/output (i.e. SN74LS245)
|
| MODEL_NAMES;
|
|	GATE == input or output of a logic gate (low output current, <12mA)
|	LINE-DRV == high output current, above 24mA both high and low currents
|	OPEN-COL == open collector output
|
|***********FOR FUTURE USE NOT CURRENTLY IMPLEMENTED**********************   
|  
|	OPEN-DRN == open drain on output pin
|	ANALOG  == Analog signals
|   RSWITCH:RESISTANCE:PIN:PIN2 ==
|					 series resistance attached to a pin where PIN2 is the
|					 terminating pin.
|*************************************************************************
|
| SIGNAL_NAME:  A minus sign ( - ) directly following a signal_name is used to signify
|						a bar over the signal_name (i.e. Q- is "Q not" or "Q bar")
|	
|  The [Package]  DIP52-TI and DIP48-TI packages are from a 56 pin with the 
|                  ends "cut off"
|
|	SOIC 
|	TVSOP  Thin Very  Small Outline Package	**This is not currently in use**
|	TSSOP  Thin Shrink Small Outline Package  
|	SSOP   Shrink Small Outline Package
|
|==============================================================================
|==============================================================================
| Note:	[Package] records must precede all [Component] records in the file
|==============================================================================
|==============================================================================
[Package]			DIP14
Type	DIP
|
Pin		R_pin		L_pin		C_pin
|
1			400.0m	6.1nH		1.17pF
2			300.0m	2.9nH		1.03pF
3			300.0m	2.9nH		1.03pF
4			300.0m	2.5nH		0.89pF
5			300.0m	3.6nH		1.03pF
6			300.0m	5.1nH		1.23pF
7			400.0m	7.3nH		1.17pF
8			400.0m	7.3nH		1.17pF
9			300.0m	5.1nH		1.23pF
10			300.0m	3.6nH		1.03pF
11			300.0m	2.5nH		0.89pF
12			300.0m	2.9nH		1.03pF
13			300.0m	2.9nH		1.03pF
14			400.0m	6.1nH		1.17pF
|
|==============================================================================
|==============================================================================
[Package]			DIP16
Type	DIP
|
Pin		R_pin		L_pin		C_pin
|
1			400.0m	7.0nH		1.40pF
2			400.0m	4.6nH		1.09pF
3			400.0m	3.2nH		1.09pF
4			300.0m	2.6nH		0.72pF
5			300.0m	2.9nH		0.72pF
6			400.0m	4.0nH		1.09pF
7			400.0m	5.6nH		1.09pF
8			400.0m	8.2nH		1.40pF
9			400.0m	8.2nH		1.40pF
10			400.0m	5.6nH		1.09pF
11			400.0m	4.0nH		1.09pF
12			300.0m	2.9nH		0.72pF
13			300.0m	2.6nH		0.72pF
14			400.0m	3.2nH		1.09pF
15			400.0m	4.6nH		1.09pF
16			400.0m	7.0nH		1.40pF
|
|==============================================================================
|==============================================================================
[Package]			DIP18
Type	DIP
|
Pin		R_pin		L_pin		C_pin
|
1			300.0m	7.8nH		1.5pF
2			300.0m	5.8nH		1.17pF
3			400.0m	4.3nH		1.18pF
4			300.0m	2.6nH		0.89pF
5			300.0m	2.4nH		0.89pF
6			300.0m	3.3nH		1.18pF
7			300.0m	4.7nH		1.17pF
8			300.0m	6.4nH		1.50pF
9			300.0m	8.9nH		1.81pF
10			300.0m	8.9nH		1.81pF
11			300.0m	6.4nH		1.50pF
12			300.0m	4.7nH		1.17pF
13			300.0m	3.3nH		1.18pF
14			300.0m	2.4nH		0.89pF
15			300.0m	2.6nH		0.89pF
16			400.0m	4.3nH		1.18pF
17			300.0m	5.8nH		1.17pF
18			300.0m	7.8nH		1.5pF
|
|==============================================================================
|==============================================================================
[Package]			DIP20
Type	DIP
|
Pin		R_pin		L_pin		C_pin
|
1			400.0m	10.2nH	1.81pF
2			300.0m	7.8nH		1.5pF
3			300.0m	5.8nH		1.17pF
4			400.0m	4.3nH		1.18pF
5			300.0m	2.6nH		0.89pF
6			300.0m	2.4nH		0.89pF
7			300.0m	3.3nH		1.18pF
8			300.0m	4.7nH		1.17pF
9			300.0m	6.4nH		1.50pF
10			300.0m	8.9nH		1.81pF
11			300.0m	8.9nH		1.81pF
12			300.0m	6.4nH		1.50pF
13			300.0m	4.7nH		1.17pF
14			300.0m	3.3nH		1.18pF
15			300.0m	2.4nH		0.89pF
16			300.0m	2.6nH		0.89pF
17			400.0m	4.3nH		1.18pF
18			300.0m	5.8nH		1.17pF
19			300.0m	7.8nH		1.5pF
20			400.0m	10.2nH	1.81pF
|
|==============================================================================
|==============================================================================
[Package]			DIP24
Type	DIP
|
Pin		R_pin		L_pin		C_pin
|
1			400.0m	13.2nH	2.16pF
2			300.0m	10.5nH	1.84pF
3			300.0m	8.0nH		1.43pF
4			400.0m	6.0nH		1.20pF
5			300.0m	3.8nH		0.91pF
6			300.0m	2.5nH		0.69pF
7			300.0m	2.2nH		0.69pF
8			300.0m	3.1nH		0.91pF
9			300.0m	4.8nH		1.20pF
10			300.0m	6.8nH		1.43pF
11			300.0m	9.2nH		1.84pF
12			300.0m	11.9nH	2.16pF
13			300.0m	11.9nH	2.16pF
14			300.0m	9.2nH		1.84pF
15			300.0m	6.8nH		1.43pF
16			300.0m	4.8nH		1.20pF
17			400.0m	3.1nH		0.91pF
18			300.0m	2.2nH		0.69pF
19			300.0m	2.5nH		0.69pF
20			400.0m	3.8nH		0.91pF
21			400.0m	6.0nH		1.20pF
22			400.0m	8.0nH		1.43pF
23			400.0m	10.5nH	1.84pF
24			400.0m	13.2nH	2.16pF
|
|==============================================================================
|==============================================================================
[Package]			DIP28
Type	DIP
|
Pin		R_pin		L_pin		C_pin
|
1       .12       5.04n    .59p   
2       .12       5.04n    .59p
3       .1        4.6n     .57p	   
4       .1        4.6n     .57p	
5       .12       5.04n    .59p 
6       .11       4.63n    .54p 
7       .12       5.04n    .57p 
8       .14       5.38n    .59p 
9       .12       5.04n    .59p  
10      .11       4.63n    .57p 
11      .1        4.6n     .54p 
12      .1        4.6n     .54p 
13      .12       5.04n    .59p
14      .12       5.04n    .59p 
15      .12       5.04n    .59p 
16      .12       5.04n    .59p
17      .1        4.6n     .54p 
18      .1        4.6n     .54p 
19      .1        4.6n     .54p
20      .12       5.04n    .59p  
21      .12       5.04n    .59p
22      .14       5.38n    .59p 
23      .12       5.04n    .59p 
24      .12       5.04n    .59p 
25      .1        4.6n     .54p 
26      .1        4.6n     .54p	
27      .12       5.04n    .59p 
28      .12       5.04n    .59p 
|
|==============================================================================
|==============================================================================
[Package]			DIP48
Type	DIP
|
Pin		R_pin		L_pin		C_pin
|
1			10m	   6.96n		0.74p
2			10m	   6.25n		0.71p
3			10m	   4.71n		0.59p
4			10m	   4.71n		0.59p
5			10m	   4.39n		0.48p
6			10m	   4.12n		0.45p
7			10m	   3.81n		0.41p
8			10m	   3.57n		0.38p
9			10m	   3.40n		0.35p
10			10m	   3.13n		0.30p
11			10m      3.13n		0.30p
12			10m	   3.07n		0.28p
13			10m	   3.07n		0.28p
14			10m		3.13n		0.30p
15			10m		3.23n		0.32p
16			10m		3.40n		0.35p
17			10m		3.57n		0.38p
18			10m		3.81n		0.41p
19			10m		4.12n		0.45p
20			10m		4.39n		0.48p
21			10m		4.71n		0.59p
22			10m		5.43n		0.69p
23			10m		6.25n		0.71p
24			10m		6.96n		0.74p
25			10m		6.96n		0.74p
26			10m		6.25n		0.71p
27			10m		5.43n		0.69p
28			10m		4.71n		0.59p
29			10m		4.39n		0.48p
30			10m		4.12n		0.45p
31			10m		3.81n		0.41p
32			10m		3.57n		0.38p
33			10m		3.40n		0.35p
34			10m		3.23n		0.32p
35			10m		3.07n		0.28p
36			10m		3.07n		0.28p
37			10m		3.07n		0.28p
38			10m		3.13n		0.30p
39			10m		3.23n		0.32p
40			10m		3.40n		0.35p
41			10m		3.81n		0.42p
42		   10m		3.81n		0.45p
43			10m		4.12n		0.45p
44			10m		4.39n		0.48p
45			10m		4.71n		0.59p
46			10m		5.43n		0.69p
47			10m		6.25n		0.71p
48			10m		6.96n		0.74p
|
|==============================================================================
|==============================================================================
[Package]			DIP52
Type	DIP
|
Pin		R_pin		L_pin		C_pin
|
1			10m      7.76n		0.77p
2			10m      6.96n		0.74p
3			10m      6.25n		0.71p
4			10m      4.71n		0.59p
5			10m      4.71n		0.59p
6			10m      4.39n		0.48p
7			10m      4.12n		0.45p
8			10m      3.81n		0.41p
9			10m      3.57n		0.38p
10			10m      3.40n		0.35p
11			10m      3.13n		0.30p
12			10m      3.13n		0.30p
13			10m      3.07n		0.28p
14			10m      3.07n		0.28p
15			10m		3.13n		0.30p
16			10m		3.23n		0.32p
17			10m		3.40n		0.35p
18			10m		3.57n		0.38p
19			10m		3.81n		0.41p
20			10m		4.12n		0.45p
21			10m		4.39n		0.48p
22			10m		4.71n		0.59p
23			10m		5.43n		0.69p
24			10m		6.25n		0.71p
25			10m		6.96n		0.74p
26			10m		7.76n		0.77p
27			10m		7.76n		0.77p
28			10m		6.96n		0.74p
29			10m		6.25n		0.71p
30			10m		5.43n		0.69p
31			10m		4.71n		0.59p
32			10m		4.39n		0.48p
33			10m		4.12n		0.45p
34			10m		3.81n		0.41p
35			10m		3.57n		0.38p
36			10m		3.40n		0.35p
37			10m		3.23n		0.32p
38			10m		3.07n		0.28p
39			10m		3.07n		0.28p
40			10m		3.07n		0.28p
41			10m		3.13n		0.30p
42			10m		3.23n		0.32p
43			10m		3.40n		0.35p
44			10m		3.81n		0.42p
45			10m		3.81n		0.45p
46			10m		4.12n		0.45p
47			10m		4.39n		0.48p
48			10m		4.71n		0.59p
49			10m		5.43n		0.69p
50			10m		6.25n		0.71p
51			10m		6.96n		0.74p
52			10m		7.76n		0.77p
|
|==============================================================================
|==============================================================================
[Package]			DIP56
Type	DIP
|
Pin		R_pin		L_pin		C_pin
|
1			10m      8.63n		0.80p
2		   10m      7.76n		0.77p
3		   10m      6.96n		0.74p
4		   10m      6.25n		0.71p
5			10m      4.71n		0.59p
6		   10m      4.71n		0.59p
7		   10m      4.39n		0.48p
8			10m      4.12n		0.45p
9		   10m      3.81n		0.41p
10		   10m      3.57n		0.38p
11			10m      3.40n		0.35p
12		   10m      3.13n		0.30p
13		   10m      3.13n		0.30p
14			10m      3.07n		0.28p
15		   10m      3.07n		0.28p
16		   10m		3.13n		0.30p
17			10m		3.23n		0.32p
18	      10m		3.40n		0.35p
19		   10m		3.57n		0.38p
20			10m		3.81n		0.41p
21		   10m		4.12n		0.45p
22		   10m		4.39n		0.48p
23		   10m		4.71n		0.59p
24		   10m		5.43n		0.69p
25			10m		6.25n		0.71p
26			10m		6.96n		0.74p
27			10m		7.76n		0.77p
28		   10m		8.62n		0.80p
29		   10m		8.62n		0.80p
30			10m		7.76n		0.77p
31 	   10m		6.96n		0.74p
32		   10m		6.25n		0.71p
33		   10m		5.43n		0.69p
34		   10m		4.71n		0.59p
35			10m		4.39n		0.48p
36		   10m		4.12n		0.45p
37		   10m	 	3.81n		0.41p
38			10m		3.57n		0.38p
39		   10m		3.40n		0.35p
40		   10m		3.23n		0.32p
41			10m		3.07n		0.28p
42		   10m		3.07n		0.28p
43		   10m		3.07n		0.28p
44			10m		3.13n		0.30p
45		   10m		3.23n		0.32p
46		   10m		3.40n		0.35p
47		   10m		3.81n		0.42p
48			10m		3.81n		0.45p
49		   10m		4.12n		0.45p
50		   10m		4.39n		0.48p
51			10m		4.71n		0.59p
52		   10m		5.43n		0.69p
53		   10m		6.25n		0.71p
54			10m		6.96n		0.74p
55	      10m		7.76n		0.77p
56		   10m		8.62n		0.80p
|	
|==============================================================================
|==============================================================================
[Package]		SOIC14
Type		SOIC
|
Pin		R_pin		L_pin		C_pin
|
1			0.0		3.8nH		0.54pF
2			0.0		3.4nH		0.39pF
3			0.0		3.0nH		0.22pF
4			0.0		2.6nH		0.22pF
5			0.0		3.0nH		0.22pF
6			0.0		3.4nH		0.39pF
7			0.0		3.8nH		0.54pF
8			0.0		3.8nH		0.54pF		
9			0.0		3.4nH		0.39pF		
10			0.0		3.0nH		0.22pF		
11			0.0		2.6nH		0.22pF		
12			0.0		3.0nH		0.22pF		
13			0.0		3.4nH		0.39pF		
14			0.0		3.8nH		0.54pF		
|
|==============================================================================
|==============================================================================
[Package]		SOIC16
Type		SOIC
|
Pin		R_pin		L_pin		C_pin
|
1			0.0		3.77nH	0.60pF
2			0.0		3.28nH	0.54pF
3			0.0		3.03nH	0.45pF
4			0.0		3.03nH	0.45pF
5			0.0		3.28nH	0.54pF
6			0.0		3.77nH	0.60pF
7			0.0		4.56nH	0.75pF
8			0.0		5.84nH	0.85pF
9			0.0		5.84nH	0.85pF		
10			0.0		4.56nH	0.75pF		
11			0.0		3.77nH	0.60pF		
12			0.0		3.28nH	0.54pF		
13			0.0		3.03nH	0.45pF		
14			0.0		3.03nH	0.45pF		
15			0.0		3.28nH	0.54pF		
16			0.0		3.77nH	0.60pF		
|
|==============================================================================
|==============================================================================
[Package]		SOIC20
Type		SOIC
|
Pin		R_pin		L_pin		C_pin
|
1			0.0		5.84nH	0.85pF
2			0.0		4.56nH	0.75pF
3			0.0		3.77nH	0.60pF
4			0.0		3.28nH	0.54pF
5			0.0		3.03nH	0.45pF
6			0.0		3.03nH	0.45pF
7			0.0		3.28nH	0.54pF
8			0.0		3.77nH	0.60pF
9			0.0		4.56nH	0.75pF
10			0.0		5.84nH	0.85pF
11			0.0		5.84nH	0.85pF		
12			0.0		4.56nH	0.75pF		
13			0.0		3.77nH	0.60pF		
14			0.0		3.28nH	0.54pF		
15			0.0		3.03nH	0.45pF		
16			0.0		3.03nH	0.45pF		
17			0.0		3.28nH	0.54pF		
18			0.0		3.77nH	0.60pF		
19			0.0		4.56nH	0.75pF		
20			0.0		5.84nH	0.85pF		
|
|==============================================================================
|==============================================================================
[Package]		SOIC24
Type		SOIC
|
Pin		R_pin		L_pin		C_pin
|
1			0.0		6.77nH	0.98pF
2			0.0		5.20nH	0.92pF
3			0.0		4.10nH	0.64pF
4			0.0		3.37nH	0.55pF
5			0.0		2.95nH	0.46pF
6			0.0		2.83nH	0.40pF
7			0.0		2.83nH	0.40pF
8			0.0		2.95nH	0.46pF
9			0.0		3.37nH	0.55pF
10			0.0		4.10nH	0.64pF
11			0.0		5.20nH	0.92pF
12			0.0		6.77nH	0.98pF
13			0.0		6.77nH	0.98pF		
14			0.0		5.20nH	0.92pF		
15			0.0		4.10nH	0.64pF		
16			0.0		3.37nH	0.55pF		
17			0.0		2.95nH	0.46pF		
18			0.0		2.83nH	0.40pF		
19			0.0		2.83nH	0.40pF		
20			0.0		2.95nH	0.46pF		
21			0.0		3.37nH	0.55pF		
22			0.0		4.10nH	0.64pF		
23			0.0		5.20nH	0.92pF		
24			0.0		6.77nH	0.98pF		
|
|==============================================================================
|==============================================================================
[Package]		SOIC28
Type		SOIC
|
Pin		R_pin		L_pin		C_pin
|
1			0.0		8.15nH	1.06pF
2			0.0		6.75nH	0.98pF
3			0.0		5.49nH	0.92pF
4			0.0		4.44nH	0.64pF
5			0.0		3.74nH	0.55pF
6			0.0		3.14nH	0.46pF
7			0.0		2.85nH	0.40pF
8			0.0		2.85nH	0.40pF
9			0.0		3.14nH	0.46pF
10			0.0		3.74nH	0.55pF
11			0.0		4.44nH	0.64pF
12			0.0		5.49nH	0.92pF
13			0.0		6.75nH	0.98pF
14			0.0		8.15nH	1.06pF
15			0.0		8.15nH	1.06pF		
16			0.0		6.75nH	0.98pF		
17			0.0		5.49nH	0.92pF		
18			0.0		4.44nH	0.64pF		
19			0.0		3.74nH	0.55pF		
20			0.0		3.14nH	0.46pF		
21			0.0		2.85nH	0.40pF		
22			0.0		2.85nH	0.40pF		
23			0.0		3.14nH	0.46pF		
24			0.0		3.74nH	0.55pF		
25			0.0		4.44nH	0.64pF		
26			0.0		5.49nH	0.92pF		
27			0.0		6.75nH	0.98pF		
28			0.0		8.15nH	1.06pF		
|
|==============================================================================
|==============================================================================
[Package]		SSOP14
Type		SSOP
|
Pin		R_pin		L_pin		C_pin
|
1			0.0		2.56nH	0.42pF
2			0.0		1.92nH	0.37pF
3			0.0		1.91nH	0.34pF
4			0.0		1.93nH	0.33pF
5			0.0		1.89nH	0.34pF
6			0.0		1.88nH	0.37pF
7			0.0		2.53nH	0.42pF
8			0.0		2.53nH	0.42pF		
9			0.0		1.88nH	0.37pF		
10			0.0		1.89nH	0.34pF		
11			0.0		1.93nH	0.33pF		
12			0.0		1.91nH	0.34pF		
13			0.0		1.92nH	0.37pF		
14			0.0		2.56nH	0.42pF		
|
|==============================================================================
|==============================================================================
[Package]		SSOP16
Type		SSOP
|
Pin		R_pin		L_pin		C_pin
|
1			0.0		5.07nH	0.50pF
2			0.0		3.94nH	0.36pF
3			0.0		3.43nH	0.23pF
4			0.0		2.97nH	0.22pF
5			0.0		2.97nH	0.22pF
6			0.0		3.43nH	0.23pF
7			0.0		3.94nH	0.36pF
8			0.0		5.07nH	0.50pF
9			0.0		5.07nH	0.50pF		
10			0.0		3.94nH	0.36pF		
11			0.0		3.43nH	0.23pF		
12			0.0		2.97nH	0.22pF		
13			0.0		2.97nH	0.22pF		
14			0.0		3.43nH	0.23pF		
15			0.0		3.94nH	0.36pF		
16			0.0		5.07nH	0.50pF		
|
|==============================================================================
|==============================================================================
[Package]		SSOP20
Type		SSOP
|
Pin		R_pin		L_pin		C_pin
|
1			0.0		5.16nH	0.43pF
2			0.0		4.57nH	0.42pF
3			0.0		3.98nH	0.42pF
4			0.0		3.79nH	0.41pF
5			0.0		3.60nH	0.37pF
6			0.0		3.60nH	0.37pF
7			0.0		3.79nH	0.41pF
8			0.0		3.98nH	0.42pF
9			0.0		4.57nH	0.42pF
10			0.0		5.16nH	0.43pF
11			0.0		5.16nH	0.43pF		
12			0.0		4.57nH	0.42pF		
13			0.0		3.98nH	0.42pF		
14			0.0		3.79nH	0.41pF		
15			0.0		3.60nH	0.37pF		
16			0.0		3.60nH	0.37pF		
17			0.0		3.79nH	0.41pF		
18			0.0		3.98nH	0.42pF		
19			0.0		4.57nH	0.42pF		
20			0.0		5.16nH	0.43pF		
|
|==============================================================================
|==============================================================================
[Package]		SSOP24
Type		SSOP
|
Pin		R_pin		L_pin		C_pin
|
1			0.0		5.30nH	0.43pF
2			0.0		4.73nH	0.41pF
3			0.0		4.17nH	0.39pF
4			0.0		3.67nH	0.36pF
5			0.0		3.44nH	0.35pF
6			0.0		3.34nH	0.33pF
7			0.0		3.34nH	0.33pF
8			0.0		3.44nH	0.35pF
9			0.0		3.67nH	0.36pF
10			0.0		4.17nH	0.39pF
11			0.0		4.73nH	0.41pF
12			0.0		5.30nH	0.43pF
13			0.0		5.30nH	0.43pF		
14			0.0		4.73nH	0.41pF		
15			0.0		4.17nH	0.39pF		
16			0.0		3.67nH	0.36pF		
17			0.0		3.44nH	0.35pF		
18			0.0		3.34nH	0.33pF		
19			0.0		3.34nH	0.33pF		
20			0.0		3.44nH	0.35pF		
21			0.0		3.67nH	0.36pF		
22			0.0		4.17nH	0.39pF		
23			0.0		4.73nH	0.41pF		
24			0.0		5.30nH	0.43pF		
|
|==============================================================================
|==============================================================================
[Package]		SSOP28
Type		SSOP
|
Pin		R_pin		L_pin		C_pin
|
1			0.0		5.70nH	0.29pF
2			0.0		4.92nH	0.25pF
3			0.0		4.29nH	0.22pF
4			0.0		3.65nH	0.19pF
5			0.0		3.51nH	0.18pF
6			0.0		3.41nH	0.17pF
7			0.0		3.36nH	0.17pF
8			0.0		3.36nH	0.17pF
9			0.0		3.41nH	0.17pF
10			0.0		3.51nH	0.18pF
11			0.0		3.65nH	0.19pF
12			0.0		4.29nH	0.22pF
13			0.0		4.92nH	0.25pF
14			0.0		5.70nH	0.29pF
15			0.0		5.70nH	0.29pF		
16			0.0		4.92nH	0.25pF		
17			0.0		4.29nH	0.22pF		
18			0.0		3.65nH	0.19pF		
19			0.0		3.51nH	0.18pF		
20			0.0		3.41nH	0.17pF		
21			0.0		3.36nH	0.17pF		
22			0.0		3.36nH	0.17pF		
23			0.0		3.41nH	0.17pF		
24			0.0		3.51nH	0.18pF		
25			0.0		3.65nH	0.19pF		
26			0.0		4.29nH	0.22pF		
27			0.0		4.92nH	0.25pF		
28			0.0		5.70nH	0.29pF		
|
|==============================================================================
|==============================================================================
[Package]		SSOP48
Type		SSOP
|
Pin		R_pin		L_pin		C_pin
|
1			0.0		7.22nH	0.74pF
2			0.0		6.48nH	0.71pF
3			0.0		5.80nH	0.69pF
4			0.0		5.17nH	0.59pF
5			0.0		4.52nH	0.48pF
6			0.0		4.32nH	0.45pF
7			0.0		4.10nH	0.41pF
8			0.0		3.87nH	0.38pF
9			0.0		3.67nH	0.35pF
10			0.0		3.50nH	0.32pF
11			0.0		3.39nH	0.30pF
12			0.0		3.29nH	0.28pF
13			0.0		3.29nH	0.28pF
14			0.0		3.39nH	0.30pF
15			0.0		3.50nH	0.32pF
16			0.0		3.67nH	0.35pF
17			0.0		3.87nH	0.38pF
18			0.0		4.10nH	0.41pF
19			0.0		4.32nH	0.45pF
20			0.0		4.52nH	0.48pF
21			0.0		5.17nH	0.59pF
22			0.0		5.80nH	0.69pF
23			0.0		6.48nH	0.71pF
24			0.0		7.22nH	0.74pF
25			0.0		7.22nH	0.74pF		
26			0.0		6.48nH	0.71pF		
27			0.0		5.80nH	0.69pF		
28			0.0		5.17nH	0.59pF		
29			0.0		4.52nH	0.48pF		
30			0.0		4.32nH	0.45pF		
31			0.0		4.10nH	0.41pF		
32			0.0		3.87nH	0.38pF		
33			0.0		3.67nH	0.35pF		
34			0.0		3.50nH	0.32pF		
35			0.0		3.39nH	0.30pF		
36			0.0		3.29nH	0.28pF		
37			0.0		3.29nH	0.28pF		
38			0.0		3.39nH	0.30pF		
39			0.0		3.50nH	0.32pF		
40			0.0		3.67nH	0.35pF		
41			0.0		3.87nH	0.38pF		
42			0.0		4.10nH	0.41pF		
43			0.0		4.32nH	0.45pF		
44			0.0		4.52nH	0.48pF		
45			0.0		5.17nH	0.59pF		
46			0.0		5.80nH	0.69pF		
47			0.0		6.48nH	0.71pF		
48			0.0		7.22nH	0.74pF		
|
|==============================================================================
|==============================================================================
[Package]		SSOP56
Type		SSOP
|
Pin		R_pin		L_pin			C_pin
|
1			0.0		8.62nH		0.80pF
2			0.0		7.76nH		0.77pF
3			0.0		6.96nH		0.74pF
4			0.0		6.25nH		0.71pF
5			0.0		5.43nH		0.69pF
6			0.0		4.71nH		0.59pF
7			0.0		4.39nH		0.48pF
8			0.0		4.12nH		0.45pF
9			0.0		3.81nH		0.41pF
10			0.0		3.57nH		0.38pF
11			0.0		3.40nH		0.35pF
12			0.0		3.23nH		0.32pF
13			0.0		3.13nH		0.30pF
14			0.0		3.07nH		0.28pF
15			0.0		3.07nH		0.28pF
16			0.0		3.13nH		0.30pF
17			0.0		3.23nH		0.32pF
18			0.0		3.40nH		0.35pF
19			0.0		3.57nH		0.38pF
20			0.0		3.81nH		0.41pF
21			0.0		4.12nH		0.45pF
22			0.0		4.39nH		0.48pF
23			0.0		4.71nH		0.59pF
24			0.0		5.43nH		0.69pF
25			0.0		6.25nH		0.71pF
26			0.0		6.96nH		0.74pF
27			0.0		7.76nH		0.77pF
28			0.0		8.62nH		0.80pF
29			0.0		8.62nH		0.80pF		
30			0.0		7.76nH		0.77pF		
31			0.0		6.96nH		0.74pF		
32			0.0		6.25nH		0.71pF		
33			0.0		5.43nH		0.69pF		
34			0.0		4.71nH		0.59pF		
35			0.0		4.39nH		0.48pF		
36			0.0		4.12nH		0.45pF		
37			0.0		3.81nH		0.41pF		
38			0.0		3.57nH		0.38pF		
39			0.0		3.40nH		0.35pF		
40			0.0		3.23nH		0.32pF		
41			0.0		3.13nH		0.30pF		
42			0.0		3.07nH		0.28pF		
43			0.0		3.07nH		0.28pF		
44			0.0		3.13nH		0.30pF		
45			0.0		3.23nH		0.32pF		
46			0.0		3.40nH		0.35pF		
47			0.0		3.57nH		0.38pF		
48			0.0		3.81nH		0.41pF		
49			0.0		4.12nH		0.45pF		
50			0.0		4.39nH		0.48pF		
51			0.0		4.71nH		0.59pF		
52			0.0		5.43nH		0.69pF		
53			0.0		6.25nH		0.71pF		
54			0.0		6.96nH		0.74pF		
55			0.0		7.76nH		0.77pF		
56			0.0		8.62nH		0.80pF		
|
|==============================================================================
|==============================================================================
[Package]		TSSOP14
Type		TSSOP
|
Pin		R_pin		L_pin			C_pin
|
1			0.0		1.66nH		0.19pF
2			0.0		1.30nH		0.18pF
3			0.0		1.29nH		0.16pF
4			0.0		1.28nH		0.16pF
5			0.0		1.32nH		0.16pF
6			0.0		1.31nH		0.18pF
7			0.0		1.71nH		0.19pF
8			0.0		1.71nH		0.19pF		
9			0.0		1.31nH		0.18pF		
10			0.0		1.32nH		0.16pF		
11			0.0		1.28nH		0.16pF		
12			0.0		1.29nH		0.16pF		
13			0.0		1.30nH		0.18pF		
14			0.0		1.66nH		0.19pF		
|
|==============================================================================
|==============================================================================
[Package]		TSSOP20
Type		TSSOP
|
Pin		R_pin		L_pin			C_pin
|
1			0.0		3.65nH		0.27pF
2			0.0		3.02nH		0.26pF
3			0.0		2.22nH		0.24pF
4			0.0		1.88nH		0.23pF
5			0.0		1.65nH		0.21pF
6			0.0		1.65nH		0.21pF
7			0.0		1.88nH		0.23pF
8			0.0		2.22nH		0.24pF
9			0.0		3.02nH		0.26pF
10			0.0		3.65nH		0.27pF
11			0.0		3.65nH		0.27pF		
12			0.0		3.02nH		0.26pF		
13			0.0		2.22nH		0.24pF		
14			0.0		1.88nH		0.23pF		
15			0.0		1.65nH		0.21pF		
16			0.0		1.65nH		0.21pF		
17			0.0		1.88nH		0.23pF		
18			0.0		2.22nH		0.24pF		
19			0.0		3.02nH		0.26pF		
20			0.0		3.65nH		0.27pF		
|
|==============================================================================
|==============================================================================
[Package]		TSSOP24
Type		TSSOP
|
Pin		R_pin		L_pin			C_pin
|
1			0.0		3.29nH		0.37pF
2			0.0		2.76nH		0.34pF
3			0.0		2.24nH		0.30pF
4			0.0		1.73nH		0.29pF
5			0.0		1.50nH		0.28pF
6			0.0		1.38nH		0.27pF
7			0.0		1.38nH		0.27pF
8			0.0		1.50nH		0.28pF
9			0.0		1.73nH		0.29pF
10			0.0		2.24nH		0.30pF
11			0.0		2.76nH		0.34pF
12			0.0		3.29nH		0.37pF
13			0.0		3.29nH		0.37pF		
14			0.0		2.76nH		0.34pF		
15			0.0		2.24nH		0.30pF		
16			0.0		1.73nH		0.29pF		
17			0.0		1.50nH		0.28pF		
18			0.0		1.38nH		0.27pF		
19			0.0		1.38nH		0.27pF		
20			0.0		1.50nH		0.28pF		
21			0.0		1.73nH		0.29pF		
22			0.0		2.24nH		0.30pF		
23			0.0		2.76nH		0.34pF		
24			0.0		3.29nH		0.37pF		
|
|==============================================================================
|==============================================================================
[Package]		TSSOP48
Type		TSSOP
|
Pin		R_pin		L_pin			C_pin
|
1			0.0		5.20nH		0.49pF
2			0.0		4.65nH		0.44pF
3			0.0		4.14nH		0.39pF
4			0.0		3.64nH		0.33pF
5			0.0		3.17nH		0.28pF
6			0.0		2.63nH		0.23pF
7			0.0		2.39nH		0.22pF
8			0.0		2.16nH		0.21pF
9			0.0		2.00nH		0.20pF
10			0.0		1.87nH		0.18pF
11			0.0		1.75nH		0.17pF
12			0.0		1.75nH		0.16pF
13			0.0		1.75nH		0.16pF
14			0.0		1.75nH		0.17pF
15			0.0		1.87nH		0.18pF
16			0.0		2.00nH		0.20pF
17			0.0		2.16nH		0.21pF
18			0.0		2.39nH		0.22pF
19			0.0		2.63nH		0.23pF
20			0.0		3.17nH		0.28pF
21			0.0		3.64nH		0.33pF
22			0.0		4.14nH		0.39pF
23			0.0		4.65nH		0.44pF
24			0.0		5.20nH		0.49pF
25			0.0		5.20nH		0.49pF		
26			0.0		4.65nH		0.44pF		
27			0.0		4.14nH		0.39pF		
28			0.0		3.64nH		0.33pF		
29			0.0		3.17nH		0.28pF		
30			0.0		2.63nH		0.23pF		
31			0.0		2.39nH		0.22pF		
32			0.0		2.16nH		0.21pF		
33			0.0		2.00nH		0.20pF		
34			0.0		1.87nH		0.18pF		
35			0.0		1.75nH		0.17pF		
36			0.0		1.75nH		0.16pF		
37			0.0		1.75nH		0.16pF		
38			0.0		1.75nH		0.17pF		
39			0.0		1.87nH		0.18pF		
40			0.0		2.00nH		0.20pF		
41			0.0		2.16nH		0.21pF		
42			0.0		2.39nH		0.22pF		
43			0.0		2.63nH		0.23pF		
44			0.0		3.17nH		0.28pF		
45			0.0		3.64nH		0.33pF		
46			0.0		4.14nH		0.39pF		
47			0.0		4.65nH		0.44pF		
48			0.0		5.20nH		0.49pF		
|
|==============================================================================
|==============================================================================
[Package]		TSSOP56
Type		TSSOP
|
Pin		R_pin		L_pin			C_pin
|
1			0.0		6.01nH		0.53pF
2			0.0		5.43nH		0.61pF
3			0.0		4.85nH		0.52pF
4			0.0		4.30nH		0.43pF
5			0.0		3.80nH		0.35pF
6			0.0		3.33nH		0.27pF
7			0.0		3.09nH		0.26pF
8			0.0		2.84nH		0.25pF
9			0.0		2.63nH		0.23pF
10			0.0		2.43nH		0.21pF
11			0.0		2.29nH		0.19pF
12			0.0		2.17nH		0.17pF
13			0.0		2.10nH		0.16pF
14			0.0		2.05nH		0.14pF
15			0.0		2.05nH		0.14pF
16			0.0		2.10nH		0.16pF
17			0.0		2.17nH		0.17pF
18			0.0		2.29nH		0.19pF
19			0.0		2.43nH		0.21pF
20			0.0		2.63nH		0.23pF
21			0.0		2.84nH		0.25pF
22			0.0		3.09nH		0.26pF
23			0.0		3.33nH		0.27pF
24			0.0		3.80nH		0.35pF
25			0.0		4.30nH		0.43pF
26			0.0		4.85nH		0.52pF
27			0.0		5.43nH		0.61pF
28			0.0		6.01nH		0.53pF
29			0.0		6.01nH		0.53pF		
30			0.0		5.43nH		0.61pF		
31			0.0		4.85nH		0.52pF		
32			0.0		4.30nH		0.43pF		
33			0.0		3.80nH		0.35pF		
34			0.0		3.33nH		0.27pF		
35			0.0		3.09nH		0.26pF		
36			0.0		2.84nH		0.25pF		
37			0.0		2.63nH		0.23pF		
38			0.0		2.43nH		0.21pF		
39			0.0		2.29nH		0.19pF		
40			0.0		2.17nH		0.17pF		
41			0.0		2.10nH		0.16pF		
42			0.0		2.05nH		0.14pF		
43			0.0		2.05nH		0.14pF		
44			0.0		2.10nH		0.16pF		
45			0.0		2.17nH		0.17pF		
46			0.0		2.29nH		0.19pF		
47			0.0		2.43nH		0.21pF		
48			0.0		2.63nH		0.23pF		
49			0.0		2.84nH		0.25pF		
50			0.0		3.09nH		0.26pF		
51			0.0		3.33nH		0.27pF		
52			0.0		3.80nH		0.35pF		
53			0.0		4.30nH		0.43pF		
54			0.0		4.85nH		0.52pF		
55			0.0		5.43nH		0.61pF		
56			0.0		6.01nH		0.53pF		
|
|==============================================================================
|==============================================================================
| Note:	The [Contents] record and all [Package] records must precede the
|			first [Component] record in the file
|==============================================================================
|==============================================================================
[Component]			74AS00_DIP
[Model File]		PML.MOD
[Package Model]    DIP14
|
[Pin]		signal_name 	model_name  		direction
|
1			A1					74ASXX:GATE			IN
2			B1					74ASXX:GATE			IN
3			Y1					74ASXX:GATE			OUT
4			A2					74ASXX:GATE			IN
5			B2					74ASXX:GATE			IN
6			Y2					74ASXX:GATE			OUT
7			GND  				GND  					NA
8			Y3					74ASXX:GATE			OUT
9			A3					74ASXX:GATE			IN
10			B3  				74ASXX:GATE			IN
11			Y4  				74ASXX:GATE			OUT
12			A4  				74ASXX:GATE			IN
13			B4  				74ASXX:GATE			IN
14			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS00_SOIC
[Model File]		PML.MOD
[Package Model]    SOIC14
|
[Pin]		signal_name 	model_name  		direction
|
1			A1					74ASXX:GATE			IN
2			B1					74ASXX:GATE			IN
3			Y1					74ASXX:GATE			OUT
4			A2					74ASXX:GATE			IN
5			B2					74ASXX:GATE			IN
6			Y2					74ASXX:GATE			OUT
7			GND  				GND  					NA
8			Y3					74ASXX:GATE			OUT
9			A3					74ASXX:GATE			IN
10			B3  				74ASXX:GATE			IN
11			Y4  				74ASXX:GATE			OUT
12			A4  				74ASXX:GATE			IN
13			B4  				74ASXX:GATE			IN
14			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS00_SSOP
[Model File]		PML.MOD
[Package Model]    SSOP14
|
[Pin]		signal_name 	model_name  		direction
|
1			A1					74ASXX:GATE			IN
2			B1					74ASXX:GATE			IN
3			Y1					74ASXX:GATE			OUT
4			A2					74ASXX:GATE			IN
5			B2					74ASXX:GATE			IN
6			Y2					74ASXX:GATE			OUT
7			GND  				GND  					NA
8			Y3					74ASXX:GATE			OUT
9			A3					74ASXX:GATE			IN
10			B3  				74ASXX:GATE			IN
11			Y4  				74ASXX:GATE			OUT
12			A4  				74ASXX:GATE			IN
13			B4  				74ASXX:GATE			IN
14			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS00_TSSOP
[Model File]		PML.MOD
[Package Model]    TSSOP14
|
[Pin]		signal_name 	model_name  		direction
|
1			A1					74ASXX:GATE			IN
2			B1					74ASXX:GATE			IN
3			Y1					74ASXX:GATE			OUT
4			A2					74ASXX:GATE			IN
5			B2					74ASXX:GATE			IN
6			Y2					74ASXX:GATE			OUT
7			GND  				GND  					NA
8			Y3					74ASXX:GATE			OUT
9			A3					74ASXX:GATE			IN
10			B3  				74ASXX:GATE			IN
11			Y4  				74ASXX:GATE			OUT
12			A4  				74ASXX:GATE			IN
13			B4  				74ASXX:GATE			IN
14			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS02_DIP
[Model File]		PML.MOD
[Package Model]    DIP14
|
[Pin]		signal_name 	model_name  		direction
|
1			Y1					74ASXX:GATE			OUT
2			A1					74ASXX:GATE			IN
3			B1					74ASXX:GATE			IN
4			Y2					74ASXX:GATE			OUT
5			A2					74ASXX:GATE			IN
6			B2					74ASXX:GATE			IN
7			GND  				GND  					NA
8			A3					74ASXX:GATE			IN
9			B3					74ASXX:GATE			IN
10			Y3  				74ASXX:GATE			OUT
11			A4  				74ASXX:GATE			IN
12			B4  				74ASXX:GATE			IN
13			Y4  				74ASXX:GATE			OUT
14			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS02_SOIC
[Model File]		PML.MOD
[Package Model]    SOIC14
|
[Pin]		signal_name 	model_name  		direction
|
1			Y1					74ASXX:GATE			OUT
2			A1					74ASXX:GATE			IN
3			B1					74ASXX:GATE			IN
4			Y2					74ASXX:GATE			OUT
5			A2					74ASXX:GATE			IN
6			B2					74ASXX:GATE			IN
7			GND  				GND  					NA
8			A3					74ASXX:GATE			IN
9			B3					74ASXX:GATE			IN
10			Y3  				74ASXX:GATE			OUT
11			A4  				74ASXX:GATE			IN
12			B4  				74ASXX:GATE			IN
13			Y4  				74ASXX:GATE			OUT
14			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS02_SSOP
[Model File]		PML.MOD
[Package Model]    SSOP14
|
[Pin]		signal_name 	model_name  		direction
|
1			Y1					74ASXX:GATE			OUT
2			A1					74ASXX:GATE			IN
3			B1					74ASXX:GATE			IN
4			Y2					74ASXX:GATE			OUT
5			A2					74ASXX:GATE			IN
6			B2					74ASXX:GATE			IN
7			GND  				GND  					NA
8			A3					74ASXX:GATE			IN
9			B3					74ASXX:GATE			IN
10			Y3  				74ASXX:GATE			OUT
11			A4  				74ASXX:GATE			IN
12			B4  				74ASXX:GATE			IN
13			Y4  				74ASXX:GATE			OUT
14			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS02_TSSOP
[Model File]		PML.MOD
[Package Model]    TSSOP14
|
[Pin]		signal_name 	model_name  		direction
|
1			Y1					74ASXX:GATE			OUT
2			A1					74ASXX:GATE			IN
3			B1					74ASXX:GATE			IN
4			Y2					74ASXX:GATE			OUT
5			A2					74ASXX:GATE			IN
6			B2					74ASXX:GATE			IN
7			GND  				GND  					NA
8			A3					74ASXX:GATE			IN
9			B3					74ASXX:GATE			IN
10			Y3  				74ASXX:GATE			OUT
11			A4  				74ASXX:GATE			IN
12			B4  				74ASXX:GATE			IN
13			Y4  				74ASXX:GATE			OUT
14			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS04_DIP
[Model File]		PML.MOD
[Package Model]    DIP14
|
[Pin]		signal_name 	model_name  		direction
|
1			A1					74ASXX:GATE			IN
2			Y1					74ASXX:GATE			OUT
3			A2					74ASXX:GATE			IN
4			Y2					74ASXX:GATE			OUT
5			A3					74ASXX:GATE			IN
6			Y3					74ASXX:GATE			OUT
7			GND  				GND  					NA
8			Y4					74ASXX:GATE			OUT
9			A4					74ASXX:GATE			IN
10			Y5  				74ASXX:GATE			OUT
11			A5  				74ASXX:GATE			IN
12			Y6  				74ASXX:GATE			OUT
13			A6  				74ASXX:GATE			IN
14			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS04_SOIC
[Model File]		PML.MOD
[Package Model]    SOIC14
|
[Pin]		signal_name 	model_name  		direction
|
1			A1					74ASXX:GATE			IN
2			Y1					74ASXX:GATE			OUT
3			A2					74ASXX:GATE			IN
4			Y2					74ASXX:GATE			OUT
5			A3					74ASXX:GATE			IN
6			Y3					74ASXX:GATE			OUT
7			GND  				GND  					NA
8			Y4					74ASXX:GATE			OUT
9			A4					74ASXX:GATE			IN
10			Y5  				74ASXX:GATE			OUT
11			A5  				74ASXX:GATE			IN
12			Y6  				74ASXX:GATE			OUT
13			A6  				74ASXX:GATE			IN
14			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS04_SSOP
[Model File]		PML.MOD
[Package Model]    SSOP14
|
[Pin]		signal_name 	model_name  		direction
|
1			A1					74ASXX:GATE			IN
2			Y1					74ASXX:GATE			OUT
3			A2					74ASXX:GATE			IN
4			Y2					74ASXX:GATE			OUT
5			A3					74ASXX:GATE			IN
6			Y3					74ASXX:GATE			OUT
7			GND  				GND  					NA
8			Y4					74ASXX:GATE			OUT
9			A4					74ASXX:GATE			IN
10			Y5  				74ASXX:GATE			OUT
11			A5  				74ASXX:GATE			IN
12			Y6  				74ASXX:GATE			OUT
13			A6  				74ASXX:GATE			IN
14			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS04_TSSOP
[Model File]		PML.MOD
[Package Model]    TSSOP14
|
[Pin]		signal_name 	model_name  		direction
|
1			A1					74ASXX:GATE			IN
2			Y1					74ASXX:GATE			OUT
3			A2					74ASXX:GATE			IN
4			Y2					74ASXX:GATE			OUT
5			A3					74ASXX:GATE			IN
6			Y3					74ASXX:GATE			OUT
7			GND  				GND  					NA
8			Y4					74ASXX:GATE			OUT
9			A4					74ASXX:GATE			IN
10			Y5  				74ASXX:GATE			OUT
11			A5  				74ASXX:GATE			IN
12			Y6  				74ASXX:GATE			OUT
13			A6  				74ASXX:GATE			IN
14			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS08_DIP
[Model File]		PML.MOD
[Package Model]    DIP14
|
[Pin]		signal_name 	model_name  		direction
|
1			A1					74ASXX:GATE			IN
2			B1					74ASXX:GATE			IN
3			Y1					74ASXX:GATE			OUT
4			A2					74ASXX:GATE			IN
5			B2					74ASXX:GATE			IN
6			Y2					74ASXX:GATE			OUT
7			GND  				GND  					NA
8			Y3					74ASXX:GATE			OUT
9			A3					74ASXX:GATE			IN
10			B3  				74ASXX:GATE			IN
11			Y4  				74ASXX:GATE			OUT
12			A4  				74ASXX:GATE			IN
13			B4  				74ASXX:GATE			IN
14			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS08_SOIC
[Model File]		PML.MOD
[Package Model]    SOIC14
|
[Pin]		signal_name 	model_name  		direction
|
1			A1					74ASXX:GATE			IN
2			B1					74ASXX:GATE			IN
3			Y1					74ASXX:GATE			OUT
4			A2					74ASXX:GATE			IN
5			B2					74ASXX:GATE			IN
6			Y2					74ASXX:GATE			OUT
7			GND  				GND  					NA
8			Y3					74ASXX:GATE			OUT
9			A3					74ASXX:GATE			IN
10			B3  				74ASXX:GATE			IN
11			Y4  				74ASXX:GATE			OUT
12			A4  				74ASXX:GATE			IN
13			B4  				74ASXX:GATE			IN
14			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS08_SSOP
[Model File]		PML.MOD
[Package Model]    SSOP14
|
[Pin]		signal_name 	model_name  		direction
|
1			A1					74ASXX:GATE			IN
2			B1					74ASXX:GATE			IN
3			Y1					74ASXX:GATE			OUT
4			A2					74ASXX:GATE			IN
5			B2					74ASXX:GATE			IN
6			Y2					74ASXX:GATE			OUT
7			GND  				GND  					NA
8			Y3					74ASXX:GATE			OUT
9			A3					74ASXX:GATE			IN
10			B3  				74ASXX:GATE			IN
11			Y4  				74ASXX:GATE			OUT
12			A4  				74ASXX:GATE			IN
13			B4  				74ASXX:GATE			IN
14			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS08_TSSOP
[Model File]		PML.MOD
[Package Model]    TSSOP14
|
[Pin]		signal_name 	model_name  		direction
|
1			A1					74ASXX:GATE			IN
2			B1					74ASXX:GATE			IN
3			Y1					74ASXX:GATE			OUT
4			A2					74ASXX:GATE			IN
5			B2					74ASXX:GATE			IN
6			Y2					74ASXX:GATE			OUT
7			GND  				GND  					NA
8			Y3					74ASXX:GATE			OUT
9			A3					74ASXX:GATE			IN
10			B3  				74ASXX:GATE			IN
11			Y4  				74ASXX:GATE			OUT
12			A4  				74ASXX:GATE			IN
13			B4  				74ASXX:GATE			IN
14			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS10_DIP
[Model File]		PML.MOD
[Package Model]    DIP14
|
[Pin]		signal_name 	model_name  		direction
|
1			A1					74ASXX:GATE			IN
2			B1					74ASXX:GATE			IN
3			A2					74ASXX:GATE			IN
4			B2					74ASXX:GATE			IN
5			C2					74ASXX:GATE			IN
6			Y2					74ASXX:GATE			OUT
7			GND  				GND  					NA
8			Y3					74ASXX:GATE			OUT
9			A3					74ASXX:GATE			IN
10			B3  				74ASXX:GATE			IN
11			C3  				74ASXX:GATE			IN
12			Y1  				74ASXX:GATE			OUT
13			C1  				74ASXX:GATE			IN
14			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS10_SOIC
[Model File]		PML.MOD
[Package Model]    SOIC14
|
[Pin]		signal_name 	model_name  		direction
|
1			A1					74ASXX:GATE			IN
2			B1					74ASXX:GATE			IN
3			A2					74ASXX:GATE			IN
4			B2					74ASXX:GATE			IN
5			C2					74ASXX:GATE			IN
6			Y2					74ASXX:GATE			OUT
7			GND  				GND  					NA
8			Y3					74ASXX:GATE			OUT
9			A3					74ASXX:GATE			IN
10			B3  				74ASXX:GATE			IN
11			C3  				74ASXX:GATE			IN
12			Y1  				74ASXX:GATE			OUT
13			C1  				74ASXX:GATE			IN
14			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS10_SSOP
[Model File]		PML.MOD
[Package Model]    SSOP14
|
[Pin]		signal_name 	model_name  		direction
|
1			A1					74ASXX:GATE			IN
2			B1					74ASXX:GATE			IN
3			A2					74ASXX:GATE			IN
4			B2					74ASXX:GATE			IN
5			C2					74ASXX:GATE			IN
6			Y2					74ASXX:GATE			OUT
7			GND  				GND  					NA
8			Y3					74ASXX:GATE			OUT
9			A3					74ASXX:GATE			IN
10			B3  				74ASXX:GATE			IN
11			C3  				74ASXX:GATE			IN
12			Y1  				74ASXX:GATE			OUT
13			C1  				74ASXX:GATE			IN
14			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS10_TSSOP
[Model File]		PML.MOD
[Package Model]    TSSOP14
|
[Pin]		signal_name 	model_name  		direction
|
1			A1					74ASXX:GATE			IN
2			B1					74ASXX:GATE			IN
3			A2					74ASXX:GATE			IN
4			B2					74ASXX:GATE			IN
5			C2					74ASXX:GATE			IN
6			Y2					74ASXX:GATE			OUT
7			GND  				GND  					NA
8			Y3					74ASXX:GATE			OUT
9			A3					74ASXX:GATE			IN
10			B3  				74ASXX:GATE			IN
11			C3  				74ASXX:GATE			IN
12			Y1  				74ASXX:GATE			OUT
13			C1  				74ASXX:GATE			IN
14			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS11_DIP
[Model File]		PML.MOD
[Package Model]    DIP14
|
[Pin]		signal_name 	model_name  		direction
|
1			A1					74ASXX:GATE			IN
2			B1					74ASXX:GATE			IN
3			A2					74ASXX:GATE			IN
4			B2					74ASXX:GATE			IN
5			C2					74ASXX:GATE			IN
6			Y2					74ASXX:GATE			OUT
7			GND  				GND  					NA
8			Y3					74ASXX:GATE			OUT
9			A3					74ASXX:GATE			IN
10			B3  				74ASXX:GATE			IN
11			C3  				74ASXX:GATE			IN
12			Y1  				74ASXX:GATE			OUT
13			C1  				74ASXX:GATE			IN
14			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS11_SOIC
[Model File]		PML.MOD
[Package Model]    SOIC14
|
[Pin]		signal_name 	model_name  		direction
|
1			A1					74ASXX:GATE			IN
2			B1					74ASXX:GATE			IN
3			A2					74ASXX:GATE			IN
4			B2					74ASXX:GATE			IN
5			C2					74ASXX:GATE			IN
6			Y2					74ASXX:GATE			OUT
7			GND  				GND  					NA
8			Y3					74ASXX:GATE			OUT
9			A3					74ASXX:GATE			IN
10			B3  				74ASXX:GATE			IN
11			C3  				74ASXX:GATE			IN
12			Y1  				74ASXX:GATE			OUT
13			C1  				74ASXX:GATE			IN
14			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS11_SSOP
[Model File]		PML.MOD
[Package Model]    SSOP14
|
[Pin]		signal_name 	model_name  		direction
|
1			A1					74ASXX:GATE			IN
2			B1					74ASXX:GATE			IN
3			A2					74ASXX:GATE			IN
4			B2					74ASXX:GATE			IN
5			C2					74ASXX:GATE			IN
6			Y2					74ASXX:GATE			OUT
7			GND  				GND  					NA
8			Y3					74ASXX:GATE			OUT
9			A3					74ASXX:GATE			IN
10			B3  				74ASXX:GATE			IN
11			C3  				74ASXX:GATE			IN
12			Y1  				74ASXX:GATE			OUT
13			C1  				74ASXX:GATE			IN
14			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS11_TSSOP
[Model File]		PML.MOD
[Package Model]    TSSOP14
|
[Pin]		signal_name 	model_name  		direction
|
1			A1					74ASXX:GATE			IN
2			B1					74ASXX:GATE			IN
3			A2					74ASXX:GATE			IN
4			B2					74ASXX:GATE			IN
5			C2					74ASXX:GATE			IN
6			Y2					74ASXX:GATE			OUT
7			GND  				GND  					NA
8			Y3					74ASXX:GATE			OUT
9			A3					74ASXX:GATE			IN
10			B3  				74ASXX:GATE			IN
11			C3  				74ASXX:GATE			IN
12			Y1  				74ASXX:GATE			OUT
13			C1  				74ASXX:GATE			IN
14			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS20_DIP
[Model File]		PML.MOD
[Package Model]    DIP14
|
[Pin]		signal_name 	model_name  		direction
|
1			A1					74ASXX:GATE			IN
2			B1					74ASXX:GATE			IN
3			NC					NC						NA
4			C1					74ASXX:GATE			IN
5			D1					74ASXX:GATE			IN
6			Y1					74ASXX:GATE			OUT
7			GND  				GND  					NA
8			Y2					74ASXX:GATE			OUT
9			A2					74ASXX:GATE			IN
10			B2  				74ASXX:GATE			IN
11			NC  				NC						NA
12			C2  				74ASXX:GATE			IN
13			D2  				74ASXX:GATE			IN
14			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS20_SOIC
[Model File]		PML.MOD
[Package Model]    SOIC14
|
[Pin]		signal_name 	model_name  		direction
|
1			A1					74ASXX:GATE			IN
2			B1					74ASXX:GATE			IN
3			NC					NC						NA
4			C1					74ASXX:GATE			IN
5			D1					74ASXX:GATE			IN
6			Y1					74ASXX:GATE			OUT
7			GND  				GND  					NA
8			Y2					74ASXX:GATE			OUT
9			A2					74ASXX:GATE			IN
10			B2  				74ASXX:GATE			IN
11			NC  				NC						NA
12			C2  				74ASXX:GATE			IN
13			D2  				74ASXX:GATE			IN
14			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS20_SSOP
[Model File]		PML.MOD
[Package Model]    SSOP14
|
[Pin]		signal_name 	model_name  		direction
|
1			A1					74ASXX:GATE			IN
2			B1					74ASXX:GATE			IN
3			NC					NC						NA
4			C1					74ASXX:GATE			IN
5			D1					74ASXX:GATE			IN
6			Y1					74ASXX:GATE			OUT
7			GND  				GND  					NA
8			Y2					74ASXX:GATE			OUT
9			A2					74ASXX:GATE			IN
10			B2  				74ASXX:GATE			IN
11			NC  				NC						NA
12			C2  				74ASXX:GATE			IN
13			D2  				74ASXX:GATE			IN
14			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS20_TSSOP
[Model File]		PML.MOD
[Package Model]    TSSOP14
|
[Pin]		signal_name 	model_name  		direction
|
1			A1					74ASXX:GATE			IN
2			B1					74ASXX:GATE			IN
3			NC					NC						NA
4			C1					74ASXX:GATE			IN
5			D1					74ASXX:GATE			IN
6			Y1					74ASXX:GATE			OUT
7			GND  				GND  					NA
8			Y2					74ASXX:GATE			OUT
9			A2					74ASXX:GATE			IN
10			B2  				74ASXX:GATE			IN
11			NC  				NC						NA
12			C2  				74ASXX:GATE			IN
13			D2  				74ASXX:GATE			IN
14			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS21_DIP
[Model File]		PML.MOD
[Package Model]    DIP14
|
[Pin]		signal_name 	model_name  		direction
|
1			A1					74ASXX:GATE			IN
2			B1					74ASXX:GATE			IN
3			NC					NC						NA
4			C1					74ASXX:GATE			IN
5			D1					74ASXX:GATE			IN
6			Y1					74ASXX:GATE			OUT
7			GND  				GND  					NA
8			Y2					74ASXX:GATE			OUT
9			A2					74ASXX:GATE			IN
10			B2  				74ASXX:GATE			IN
11			NC  				NC						NA
12			C2  				74ASXX:GATE			IN
13			D2  				74ASXX:GATE			IN
14			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS21_SOIC
[Model File]		PML.MOD
[Package Model]    SOIC14
|
[Pin]		signal_name 	model_name  		direction
|
1			A1					74ASXX:GATE			IN
2			B1					74ASXX:GATE			IN
3			NC					NC						NA
4			C1					74ASXX:GATE			IN
5			D1					74ASXX:GATE			IN
6			Y1					74ASXX:GATE			OUT
7			GND  				GND  					NA
8			Y2					74ASXX:GATE			OUT
9			A2					74ASXX:GATE			IN
10			B2  				74ASXX:GATE			IN
11			NC  				NC						NA
12			C2  				74ASXX:GATE			IN
13			D2  				74ASXX:GATE			IN
14			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS21_SSOP
[Model File]		PML.MOD
[Package Model]    SSOP14
|
[Pin]		signal_name 	model_name  		direction
|
1			A1					74ASXX:GATE			IN
2			B1					74ASXX:GATE			IN
3			NC					NC						NA
4			C1					74ASXX:GATE			IN
5			D1					74ASXX:GATE			IN
6			Y1					74ASXX:GATE			OUT
7			GND  				GND  					NA
8			Y2					74ASXX:GATE			OUT
9			A2					74ASXX:GATE			IN
10			B2  				74ASXX:GATE			IN
11			NC  				NC						NA
12			C2  				74ASXX:GATE			IN
13			D2  				74ASXX:GATE			IN
14			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS21_TSSOP
[Model File]		PML.MOD
[Package Model]    TSSOP14
|
[Pin]		signal_name 	model_name  		direction
|
1			A1					74ASXX:GATE			IN
2			B1					74ASXX:GATE			IN
3			NC					NC						NA
4			C1					74ASXX:GATE			IN
5			D1					74ASXX:GATE			IN
6			Y1					74ASXX:GATE			OUT
7			GND  				GND  					NA
8			Y2					74ASXX:GATE			OUT
9			A2					74ASXX:GATE			IN
10			B2  				74ASXX:GATE			IN
11			NC  				NC						NA
12			C2  				74ASXX:GATE			IN
13			D2  				74ASXX:GATE			IN
14			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS27_DIP
[Model File]		PML.MOD
[Package Model]    DIP14
|
[Pin]		signal_name 	model_name  		direction
|
1			A1					74ASXX:GATE			IN
2			B1					74ASXX:GATE			IN
3			A2					74ASXX:GATE			IN
4			B2					74ASXX:GATE			IN
5			C2					74ASXX:GATE			IN
6			Y2					74ASXX:GATE			OUT
7			GND  				GND  					NA
8			Y3					74ASXX:GATE			OUT
9			A3					74ASXX:GATE			IN
10			B3  				74ASXX:GATE			IN
11			C3  				74ASXX:GATE			IN
12			Y1  				74ASXX:GATE			OUT
13			C1  				74ASXX:GATE			IN
14			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS27_SOIC
[Model File]		PML.MOD
[Package Model]    SOIC14
|
[Pin]		signal_name 	model_name  		direction
|
1			A1					74ASXX:GATE			IN
2			B1					74ASXX:GATE			IN
3			A2					74ASXX:GATE			IN
4			B2					74ASXX:GATE			IN
5			C2					74ASXX:GATE			IN
6			Y2					74ASXX:GATE			OUT
7			GND  				GND  					NA
8			Y3					74ASXX:GATE			OUT
9			A3					74ASXX:GATE			IN
10			B3  				74ASXX:GATE			IN
11			C3  				74ASXX:GATE			IN
12			Y1  				74ASXX:GATE			OUT
13			C1  				74ASXX:GATE			IN
14			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS27_SSOP
[Model File]		PML.MOD
[Package Model]    SSOP14
|
[Pin]		signal_name 	model_name  		direction
|
1			A1					74ASXX:GATE			IN
2			B1					74ASXX:GATE			IN
3			A2					74ASXX:GATE			IN
4			B2					74ASXX:GATE			IN
5			C2					74ASXX:GATE			IN
6			Y2					74ASXX:GATE			OUT
7			GND  				GND  					NA
8			Y3					74ASXX:GATE			OUT
9			A3					74ASXX:GATE			IN
10			B3  				74ASXX:GATE			IN
11			C3  				74ASXX:GATE			IN
12			Y1  				74ASXX:GATE			OUT
13			C1  				74ASXX:GATE			IN
14			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS27_TSSOP
[Model File]		PML.MOD
[Package Model]    TSSOP14
|
[Pin]		signal_name 	model_name  		direction
|
1			A1					74ASXX:GATE			IN
2			B1					74ASXX:GATE			IN
3			A2					74ASXX:GATE			IN
4			B2					74ASXX:GATE			IN
5			C2					74ASXX:GATE			IN
6			Y2					74ASXX:GATE			OUT
7			GND  				GND  					NA
8			Y3					74ASXX:GATE			OUT
9			A3					74ASXX:GATE			IN
10			B3  				74ASXX:GATE			IN
11			C3  				74ASXX:GATE			IN
12			Y1  				74ASXX:GATE			OUT
13			C1  				74ASXX:GATE			IN
14			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS30_DIP
[Model File]		PML.MOD
[Package Model]    DIP14
|
[Pin]		signal_name 	model_name  		direction
|
1			A 					74ASXX:GATE			IN
2			B 					74ASXX:GATE			IN
3			C 					74ASXX:GATE			IN
4			D 					74ASXX:GATE			IN
5			E 					74ASXX:GATE			IN
6			F 					74ASXX:GATE			IN
7			GND  				GND  					NA
8			Y 					74ASXX:GATE			OUT
9			NC					NC						NA
10			NC  				NC						NA
11			G					74ASXX:GATE			IN
12			H					74ASXX:GATE			IN
13			NC  				NC						NA
14			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS30_SOIC
[Model File]		PML.MOD
[Package Model]    SOIC14
|
[Pin]		signal_name 	model_name  		direction
|
1			A 					74ASXX:GATE			IN
2			B 					74ASXX:GATE			IN
3			C 					74ASXX:GATE			IN
4			D 					74ASXX:GATE			IN
5			E 					74ASXX:GATE			IN
6			F 					74ASXX:GATE			IN
7			GND  				GND  					NA
8			Y 					74ASXX:GATE			OUT
9			NC					NC						NA
10			NC  				NC						NA
11			G					74ASXX:GATE			IN
12			H					74ASXX:GATE			IN
13			NC  				NC						NA
14			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS30_SSOP
[Model File]		PML.MOD
[Package Model]    SSOP14
|
[Pin]		signal_name 	model_name  		direction
|
1			A 					74ASXX:GATE			IN
2			B 					74ASXX:GATE			IN
3			C 					74ASXX:GATE			IN
4			D 					74ASXX:GATE			IN
5			E 					74ASXX:GATE			IN
6			F 					74ASXX:GATE			IN
7			GND  				GND  					NA
8			Y 					74ASXX:GATE			OUT
9			NC					NC						NA
10			NC  				NC						NA
11			G					74ASXX:GATE			IN
12			H					74ASXX:GATE			IN
13			NC  				NC						NA
14			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS30_TSSOP
[Model File]		PML.MOD
[Package Model]    TSSOP14
|
[Pin]		signal_name 	model_name  		direction
|
1			A 					74ASXX:GATE			IN
2			B 					74ASXX:GATE			IN
3			C 					74ASXX:GATE			IN
4			D 					74ASXX:GATE			IN
5			E 					74ASXX:GATE			IN
6			F 					74ASXX:GATE			IN
7			GND  				GND  					NA
8			Y 					74ASXX:GATE			OUT
9			NC					NC						NA
10			NC  				NC						NA
11			G					74ASXX:GATE			IN
12			H					74ASXX:GATE			IN
13			NC  				NC						NA
14			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS32_DIP
[Model File]		PML.MOD
[Package Model]    DIP14
|
[Pin]		signal_name 	model_name  		direction
|
1			A1					74ASXX:GATE			IN
2			B1					74ASXX:GATE			IN
3			Y1					74ASXX:GATE			OUT
4			A2					74ASXX:GATE			IN
5			B2					74ASXX:GATE			IN
6			Y2					74ASXX:GATE			OUT
7			GND  				GND  					NA
8			Y3					74ASXX:GATE			OUT
9			A3					74ASXX:GATE			IN
10			B3  				74ASXX:GATE			IN
11			Y4  				74ASXX:GATE			OUT
12			A4  				74ASXX:GATE			IN
13			B4  				74ASXX:GATE			IN
14			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS32_SOIC
[Model File]		PML.MOD
[Package Model]    SOIC14
|
[Pin]		signal_name 	model_name  		direction
|
1			A1					74ASXX:GATE			IN
2			B1					74ASXX:GATE			IN
3			Y1					74ASXX:GATE			OUT
4			A2					74ASXX:GATE			IN
5			B2					74ASXX:GATE			IN
6			Y2					74ASXX:GATE			OUT
7			GND  				GND  					NA
8			Y3					74ASXX:GATE			OUT
9			A3					74ASXX:GATE			IN
10			B3  				74ASXX:GATE			IN
11			Y4  				74ASXX:GATE			OUT
12			A4  				74ASXX:GATE			IN
13			B4  				74ASXX:GATE			IN
14			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS32_SSOP
[Model File]		PML.MOD
[Package Model]    SSOP14
|
[Pin]		signal_name 	model_name  		direction
|
1			A1					74ASXX:GATE			IN
2			B1					74ASXX:GATE			IN
3			Y1					74ASXX:GATE			OUT
4			A2					74ASXX:GATE			IN
5			B2					74ASXX:GATE			IN
6			Y2					74ASXX:GATE			OUT
7			GND  				GND  					NA
8			Y3					74ASXX:GATE			OUT
9			A3					74ASXX:GATE			IN
10			B3  				74ASXX:GATE			IN
11			Y4  				74ASXX:GATE			OUT
12			A4  				74ASXX:GATE			IN
13			B4  				74ASXX:GATE			IN
14			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS32_TSSOP
[Model File]		PML.MOD
[Package Model]    TSSOP14
|
[Pin]		signal_name 	model_name  		direction
|
1			A1					74ASXX:GATE			IN
2			B1					74ASXX:GATE			IN
3			Y1					74ASXX:GATE			OUT
4			A2					74ASXX:GATE			IN
5			B2					74ASXX:GATE			IN
6			Y2					74ASXX:GATE			OUT
7			GND  				GND  					NA
8			Y3					74ASXX:GATE			OUT
9			A3					74ASXX:GATE			IN
10			B3  				74ASXX:GATE			IN
11			Y4  				74ASXX:GATE			OUT
12			A4  				74ASXX:GATE			IN
13			B4  				74ASXX:GATE			IN
14			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS34_DIP
[Model File]		PML.MOD
[Package Model]    DIP14
|
[Pin]		signal_name 	model_name  		direction
|
1			A1					74ASXX:GATE			IN
2			Y1					74ASXX:GATE			OUT
3			A2					74ASXX:GATE			IN
4			Y2					74ASXX:GATE			OUT
5			A3					74ASXX:GATE			IN
6			Y3					74ASXX:GATE			OUT
7			GND  				GND  					NA
8			Y4					74ASXX:GATE			OUT
9			A4					74ASXX:GATE			IN
10			Y5  				74ASXX:GATE			OUT
11			A5  				74ASXX:GATE			IN
12			Y6  				74ASXX:GATE			OUT
13			A6  				74ASXX:GATE			IN
14			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS34_SOIC
[Model File]		PML.MOD
[Package Model]    SOIC14
|
[Pin]		signal_name 	model_name  		direction
|
1			A1					74ASXX:GATE			IN
2			Y1					74ASXX:GATE			OUT
3			A2					74ASXX:GATE			IN
4			Y2					74ASXX:GATE			OUT
5			A3					74ASXX:GATE			IN
6			Y3					74ASXX:GATE			OUT
7			GND  				GND  					NA
8			Y4					74ASXX:GATE			OUT
9			A4					74ASXX:GATE			IN
10			Y5  				74ASXX:GATE			OUT
11			A5  				74ASXX:GATE			IN
12			Y6  				74ASXX:GATE			OUT
13			A6  				74ASXX:GATE			IN
14			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS34_SSOP
[Model File]		PML.MOD
[Package Model]    SSOP14
|
[Pin]		signal_name 	model_name  		direction
|
1			A1					74ASXX:GATE			IN
2			Y1					74ASXX:GATE			OUT
3			A2					74ASXX:GATE			IN
4			Y2					74ASXX:GATE			OUT
5			A3					74ASXX:GATE			IN
6			Y3					74ASXX:GATE			OUT
7			GND  				GND  					NA
8			Y4					74ASXX:GATE			OUT
9			A4					74ASXX:GATE			IN
10			Y5  				74ASXX:GATE			OUT
11			A5  				74ASXX:GATE			IN
12			Y6  				74ASXX:GATE			OUT
13			A6  				74ASXX:GATE			IN
14			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS34_TSSOP
[Model File]		PML.MOD
[Package Model]    TSSOP14
|
[Pin]		signal_name 	model_name  		direction
|
1			A1					74ASXX:GATE			IN
2			Y1					74ASXX:GATE			OUT
3			A2					74ASXX:GATE			IN
4			Y2					74ASXX:GATE			OUT
5			A3					74ASXX:GATE			IN
6			Y3					74ASXX:GATE			OUT
7			GND  				GND  					NA
8			Y4					74ASXX:GATE			OUT
9			A4					74ASXX:GATE			IN
10			Y5  				74ASXX:GATE			OUT
11			A5  				74ASXX:GATE			IN
12			Y6  				74ASXX:GATE			OUT
13			A6  				74ASXX:GATE			IN
14			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS74_DIP
[Model File]		PML.MOD
[Package Model]    DIP14
|
[Pin]		signal_name 	model_name  		direction
|
1			CLR_1-  			74ASXX:GATE			IN
2			D1					74ASXX:GATE			IN
3			CLK_1				74ASXX:GATE			IN
4			PRESET_1-  		74ASXX:GATE			IN
5			Q1					74ASXX:GATE			OUT
6			Q1-  				74ASXX:GATE			OUT
7			GND  				GND  					NA
8			Q2-  				74ASXX:GATE			OUT
9			Q2					74ASXX:GATE			OUT
10			PRESET_2- 		74ASXX:GATE			IN
11			CLK_2  			74ASXX:GATE			IN
12			D2  				74ASXX:GATE			IN
13			CLR_2- 			74ASXX:GATE			IN
14			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS74_SOIC
[Model File]		PML.MOD
[Package Model]    SOIC14
|
[Pin]		signal_name 	model_name  		direction
|
1			CLR_1-  			74ASXX:GATE			IN
2			D1					74ASXX:GATE			IN
3			CLK_1				74ASXX:GATE			IN
4			PRESET_1-  		74ASXX:GATE			IN
5			Q1					74ASXX:GATE			OUT
6			Q1-  				74ASXX:GATE			OUT
7			GND  				GND  					NA
8			Q2-  				74ASXX:GATE			OUT
9			Q2					74ASXX:GATE			OUT
10			PRESET_2- 		74ASXX:GATE			IN
11			CLK_2  			74ASXX:GATE			IN
12			D2  				74ASXX:GATE			IN
13			CLR_2- 			74ASXX:GATE			IN
14			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS74_SSOP
[Model File]		PML.MOD
[Package Model]    SSOP14
|
[Pin]		signal_name 	model_name  		direction
|
1			CLR_1-  			74ASXX:GATE			IN
2			D1					74ASXX:GATE			IN
3			CLK_1				74ASXX:GATE			IN
4			PRESET_1-  		74ASXX:GATE			IN
5			Q1					74ASXX:GATE			OUT
6			Q1-  				74ASXX:GATE			OUT
7			GND  				GND  					NA
8			Q2-  				74ASXX:GATE			OUT
9			Q2					74ASXX:GATE			OUT
10			PRESET_2- 		74ASXX:GATE			IN
11			CLK_2  			74ASXX:GATE			IN
12			D2  				74ASXX:GATE			IN
13			CLR_2- 			74ASXX:GATE			IN
14			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS74_TSSOP
[Model File]		PML.MOD
[Package Model]    TSSOP14
|
[Pin]		signal_name 	model_name  		direction
|
1			CLR_1-  			74ASXX:GATE			IN
2			D1					74ASXX:GATE			IN
3			CLK_1				74ASXX:GATE			IN
4			PRESET_1-  		74ASXX:GATE			IN
5			Q1					74ASXX:GATE			OUT
6			Q1-  				74ASXX:GATE			OUT
7			GND  				GND  					NA
8			Q2-  				74ASXX:GATE			OUT
9			Q2					74ASXX:GATE			OUT
10			PRESET_2- 		74ASXX:GATE			IN
11			CLK_2  			74ASXX:GATE			IN
12			D2  				74ASXX:GATE			IN
13			CLR_2- 			74ASXX:GATE			IN
14			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS86_DIP
[Model File]		PML.MOD
[Package Model]    DIP14
|
[Pin]		signal_name 	model_name  		direction
|
1			A1					74ASXX:GATE			IN
2			B1					74ASXX:GATE			IN
3			Y1					74ASXX:GATE			OUT
4			A2					74ASXX:GATE			IN
5			B2					74ASXX:GATE			IN
6			Y2					74ASXX:GATE			OUT
7			GND  				GND  					NA
8			Y3					74ASXX:GATE			OUT
9			A3					74ASXX:GATE			IN
10			B3  				74ASXX:GATE			IN
11			Y4  				74ASXX:GATE			OUT
12			A4  				74ASXX:GATE			IN
13			B4  				74ASXX:GATE			IN
14			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS86_SOIC
[Model File]		PML.MOD
[Package Model]    SOIC14
|
[Pin]		signal_name 	model_name  		direction
|
1			A1					74ASXX:GATE			IN
2			B1					74ASXX:GATE			IN
3			Y1					74ASXX:GATE			OUT
4			A2					74ASXX:GATE			IN
5			B2					74ASXX:GATE			IN
6			Y2					74ASXX:GATE			OUT
7			GND  				GND  					NA
8			Y3					74ASXX:GATE			OUT
9			A3					74ASXX:GATE			IN
10			B3  				74ASXX:GATE			IN
11			Y4  				74ASXX:GATE			OUT
12			A4  				74ASXX:GATE			IN
13			B4  				74ASXX:GATE			IN
14			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS86_SSOP
[Model File]		PML.MOD
[Package Model]    SSOP14
|
[Pin]		signal_name 	model_name  		direction
|
1			A1					74ASXX:GATE			IN
2			B1					74ASXX:GATE			IN
3			Y1					74ASXX:GATE			OUT
4			A2					74ASXX:GATE			IN
5			B2					74ASXX:GATE			IN
6			Y2					74ASXX:GATE			OUT
7			GND  				GND  					NA
8			Y3					74ASXX:GATE			OUT
9			A3					74ASXX:GATE			IN
10			B3  				74ASXX:GATE			IN
11			Y4  				74ASXX:GATE			OUT
12			A4  				74ASXX:GATE			IN
13			B4  				74ASXX:GATE			IN
14			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS86_TSSOP
[Model File]		PML.MOD
[Package Model]    TSSOP14
|
[Pin]		signal_name 	model_name  		direction
|
1			A1					74ASXX:GATE			IN
2			B1					74ASXX:GATE			IN
3			Y1					74ASXX:GATE			OUT
4			A2					74ASXX:GATE			IN
5			B2					74ASXX:GATE			IN
6			Y2					74ASXX:GATE			OUT
7			GND  				GND  					NA
8			Y3					74ASXX:GATE			OUT
9			A3					74ASXX:GATE			IN
10			B3  				74ASXX:GATE			IN
11			Y4  				74ASXX:GATE			OUT
12			A4  				74ASXX:GATE			IN
13			B4  				74ASXX:GATE			IN
14			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS95_DIP
[Model File]		PML.MOD
[Package Model]    DIP14
|
[Pin]		signal_name 	model_name  		direction
|
1			SERIAL_INPUT  	74ASXX:GATE			IN
2			A 					74ASXX:GATE			IN
3			B 					74ASXX:GATE			IN
4			C 					74ASXX:GATE			IN
5			D 					74ASXX:GATE			IN
6			MODE_CONTRL		74ASXX:GATE			IN
7			GND  				GND  					NA
8			CLK_2(LOAD)		74ASXX:GATE			IN
9			CLK_1(R-SHIFT)	74ASXX:GATE			IN
10			QD  				74ASXX:GATE			OUT
11			QC  				74ASXX:GATE			OUT
12			QB  				74ASXX:GATE			OUT
13			QA  				74ASXX:GATE			OUT
14			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS95_SOIC
[Model File]		PML.MOD
[Package Model]    SOIC14
|
[Pin]		signal_name 	model_name  		direction
|
1			SERIAL_INPUT  	74ASXX:GATE			IN
2			A 					74ASXX:GATE			IN
3			B 					74ASXX:GATE			IN
4			C 					74ASXX:GATE			IN
5			D 					74ASXX:GATE			IN
6			MODE_CONTRL		74ASXX:GATE			IN
7			GND  				GND  					NA
8			CLK_2(LOAD)		74ASXX:GATE			IN
9			CLK_1(R-SHIFT)	74ASXX:GATE			IN
10			QD  				74ASXX:GATE			OUT
11			QC  				74ASXX:GATE			OUT
12			QB  				74ASXX:GATE			OUT
13			QA  				74ASXX:GATE			OUT
14			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS95_SSOP
[Model File]		PML.MOD
[Package Model]    SSOP14
|
[Pin]		signal_name 	model_name  		direction
|
1			SERIAL_INPUT  	74ASXX:GATE			IN
2			A 					74ASXX:GATE			IN
3			B 					74ASXX:GATE			IN
4			C 					74ASXX:GATE			IN
5			D 					74ASXX:GATE			IN
6			MODE_CONTRL		74ASXX:GATE			IN
7			GND  				GND  					NA
8			CLK_2(LOAD)		74ASXX:GATE			IN
9			CLK_1(R-SHIFT)	74ASXX:GATE			IN
10			QD  				74ASXX:GATE			OUT
11			QC  				74ASXX:GATE			OUT
12			QB  				74ASXX:GATE			OUT
13			QA  				74ASXX:GATE			OUT
14			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS95_TSSOP
[Model File]		PML.MOD
[Package Model]    TSSOP14
|
[Pin]		signal_name 	model_name  		direction
|
1			SERIAL_INPUT  	74ASXX:GATE			IN
2			A 					74ASXX:GATE			IN
3			B 					74ASXX:GATE			IN
4			C 					74ASXX:GATE			IN
5			D 					74ASXX:GATE			IN
6			MODE_CONTRL		74ASXX:GATE			IN
7			GND  				GND  					NA
8			CLK_2(LOAD)		74ASXX:GATE			IN
9			CLK_1(R-SHIFT)	74ASXX:GATE			IN
10			QD  				74ASXX:GATE			OUT
11			QC  				74ASXX:GATE			OUT
12			QB  				74ASXX:GATE			OUT
13			QA  				74ASXX:GATE			OUT
14			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS109_DIP
[Model File]		PML.MOD
[Package Model]    DIP16
|
[Pin]		signal_name 	model_name  		direction
|
1			CLR_1-  			74ASXX:GATE			IN
2			J1					74ASXX:GATE			IN
3			K1-  				74ASXX:GATE			IN
4			CLK_1				74ASXX:GATE			IN
5			PRESET_1-  		74ASXX:GATE			IN
6			Q1					74ASXX:GATE			OUT
7			Q1-  				74ASXX:GATE			OUT
8			GND  				GND  					NA
9			Q2-  				74ASXX:GATE			OUT
10			Q2  				74ASXX:GATE			OUT
11			PRESET_2- 		74ASXX:GATE			IN
12			CLK_2  			74ASXX:GATE			IN
13			K2- 				74ASXX:GATE			IN
14			J2  				74ASXX:GATE			IN
15			CLR_2- 			74ASXX:GATE			IN
16			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS109_SOIC
[Model File]		PML.MOD
[Package Model]    SOIC16
|
[Pin]		signal_name 	model_name  		direction
|
1			CLR_1-  			74ASXX:GATE			IN
2			J1					74ASXX:GATE			IN
3			K1-  				74ASXX:GATE			IN
4			CLK_1				74ASXX:GATE			IN
5			PRESET_1-  		74ASXX:GATE			IN
6			Q1					74ASXX:GATE			OUT
7			Q1-  				74ASXX:GATE			OUT
8			GND  				GND  					NA
9			Q2-  				74ASXX:GATE			OUT
10			Q2  				74ASXX:GATE			OUT
11			PRESET_2- 		74ASXX:GATE			IN
12			CLK_2  			74ASXX:GATE			IN
13			K2- 				74ASXX:GATE			IN
14			J2  				74ASXX:GATE			IN
15			CLR_2- 			74ASXX:GATE			IN
16			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS109_SSOP
[Model File]		PML.MOD
[Package Model]    SSOP16
|
[Pin]		signal_name 	model_name  		direction
|
1			CLR_1-  			74ASXX:GATE			IN
2			J1					74ASXX:GATE			IN
3			K1-  				74ASXX:GATE			IN
4			CLK_1				74ASXX:GATE			IN
5			PRESET_1-  		74ASXX:GATE			IN
6			Q1					74ASXX:GATE			OUT
7			Q1-  				74ASXX:GATE			OUT
8			GND  				GND  					NA
9			Q2-  				74ASXX:GATE			OUT
10			Q2  				74ASXX:GATE			OUT
11			PRESET_2- 		74ASXX:GATE			IN
12			CLK_2  			74ASXX:GATE			IN
13			K2- 				74ASXX:GATE			IN
14			J2  				74ASXX:GATE			IN
15			CLR_2- 			74ASXX:GATE			IN
16			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS112_DIP
[Model File]		PML.MOD
[Package Model]    DIP16
|
[Pin]		signal_name 	model_name  		direction
|
1			CLK_1				74ASXX:GATE			IN
2			K1					74ASXX:GATE			IN
3			J1					74ASXX:GATE			IN
4			PRESET_1-  		74ASXX:GATE			IN
5			Q1					74ASXX:GATE			OUT
6			Q1-  				74ASXX:GATE			OUT
7			Q2-  				74ASXX:GATE			OUT
8			GND  				GND  					NA
9			Q2					74ASXX:GATE			OUT
10			PRESET_2- 		74ASXX:GATE			IN
11			J2  				74ASXX:GATE			IN
12			K2  				74ASXX:GATE			IN
13			CLK_2  			74ASXX:GATE			IN
14			CLR_2- 			74ASXX:GATE			IN
15			CLR_1- 			74ASXX:GATE			IN
16			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS112_SOIC
[Model File]		PML.MOD
[Package Model]    SOIC16
|
[Pin]		signal_name 	model_name  		direction
|
1			CLK_1				74ASXX:GATE			IN
2			K1					74ASXX:GATE			IN
3			J1					74ASXX:GATE			IN
4			PRESET_1-  		74ASXX:GATE			IN
5			Q1					74ASXX:GATE			OUT
6			Q1-  				74ASXX:GATE			OUT
7			Q2-  				74ASXX:GATE			OUT
8			GND  				GND  					NA
9			Q2					74ASXX:GATE			OUT
10			PRESET_2- 		74ASXX:GATE			IN
11			J2  				74ASXX:GATE			IN
12			K2  				74ASXX:GATE			IN
13			CLK_2  			74ASXX:GATE			IN
14			CLR_2- 			74ASXX:GATE			IN
15			CLR_1- 			74ASXX:GATE			IN
16			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS112_SSOP
[Model File]		PML.MOD
[Package Model]    SSOP16
|
[Pin]		signal_name 	model_name  		direction
|
1			CLK_1				74ASXX:GATE			IN
2			K1					74ASXX:GATE			IN
3			J1					74ASXX:GATE			IN
4			PRESET_1-  		74ASXX:GATE			IN
5			Q1					74ASXX:GATE			OUT
6			Q1-  				74ASXX:GATE			OUT
7			Q2-  				74ASXX:GATE			OUT
8			GND  				GND  					NA
9			Q2					74ASXX:GATE			OUT
10			PRESET_2- 		74ASXX:GATE			IN
11			J2  				74ASXX:GATE			IN
12			K2  				74ASXX:GATE			IN
13			CLK_2  			74ASXX:GATE			IN
14			CLR_2- 			74ASXX:GATE			IN
15			CLR_1- 			74ASXX:GATE			IN
16			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS113_DIP
[Model File]		PML.MOD
[Package Model]    DIP14
|
[Pin]		signal_name 	model_name  		direction
|
1			CLK_1				74ASXX:GATE			IN
2			K1					74ASXX:GATE			IN
3			J1					74ASXX:GATE			IN
4			PRE_1-  			74ASXX:GATE			IN
5			Q1					74ASXX:GATE			OUT
6			Q1-  				74ASXX:GATE			OUT
7			GND  				GND  					NA
8			Q2-  				74ASXX:GATE			OUT
9			Q2					74ASXX:GATE			OUT
10			PRE_2- 			74ASXX:GATE			IN
11			J2  				74ASXX:GATE			IN
12			K2  				74ASXX:GATE			IN
13			CLK_2  			74ASXX:GATE			IN
14			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS113_SOIC
[Model File]		PML.MOD
[Package Model]    SOIC14
|
[Pin]		signal_name 	model_name  		direction
|
1			CLK_1				74ASXX:GATE			IN
2			K1					74ASXX:GATE			IN
3			J1					74ASXX:GATE			IN
4			PRE_1-  			74ASXX:GATE			IN
5			Q1					74ASXX:GATE			OUT
6			Q1-  				74ASXX:GATE			OUT
7			GND  				GND  					NA
8			Q2-  				74ASXX:GATE			OUT
9			Q2					74ASXX:GATE			OUT
10			PRE_2- 			74ASXX:GATE			IN
11			J2  				74ASXX:GATE			IN
12			K2  				74ASXX:GATE			IN
13			CLK_2  			74ASXX:GATE			IN
14			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS113_SSOP
[Model File]		PML.MOD
[Package Model]    SSOP14
|
[Pin]		signal_name 	model_name  		direction
|
1			CLK_1				74ASXX:GATE			IN
2			K1					74ASXX:GATE			IN
3			J1					74ASXX:GATE			IN
4			PRE_1-  			74ASXX:GATE			IN
5			Q1					74ASXX:GATE			OUT
6			Q1-  				74ASXX:GATE			OUT
7			GND  				GND  					NA
8			Q2-  				74ASXX:GATE			OUT
9			Q2					74ASXX:GATE			OUT
10			PRE_2- 			74ASXX:GATE			IN
11			J2  				74ASXX:GATE			IN
12			K2  				74ASXX:GATE			IN
13			CLK_2  			74ASXX:GATE			IN
14			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS113_TSSOP
[Model File]		PML.MOD
[Package Model]    TSSOP14
|
[Pin]		signal_name 	model_name  		direction
|
1			CLK_1				74ASXX:GATE			IN
2			K1					74ASXX:GATE			IN
3			J1					74ASXX:GATE			IN
4			PRE_1-  			74ASXX:GATE			IN
5			Q1					74ASXX:GATE			OUT
6			Q1-  				74ASXX:GATE			OUT
7			GND  				GND  					NA
8			Q2-  				74ASXX:GATE			OUT
9			Q2					74ASXX:GATE			OUT
10			PRE_2- 			74ASXX:GATE			IN
11			J2  				74ASXX:GATE			IN
12			K2  				74ASXX:GATE			IN
13			CLK_2  			74ASXX:GATE			IN
14			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS114_DIP
[Model File]		PML.MOD
[Package Model]    DIP14
|
[Pin]		signal_name 	model_name  		direction
|
1			CLR- 				74ASXX:GATE			IN
2			K1					74ASXX:GATE			IN
3			J1					74ASXX:GATE			IN
4			PRE_1-  			74ASXX:GATE			IN
5			Q1					74ASXX:GATE			OUT
6			Q1-  				74ASXX:GATE			OUT
7			GND  				GND  					NA
8			Q2-  				74ASXX:GATE			OUT
9			Q2					74ASXX:GATE			OUT
10			PRE_2- 			74ASXX:GATE			IN
11			J2  				74ASXX:GATE			IN
12			K2  				74ASXX:GATE			IN
13			CLK 				74ASXX:GATE			IN
14			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS114_SOIC
[Model File]		PML.MOD
[Package Model]    SOIC14
|
[Pin]		signal_name 	model_name  		direction
|
1			CLR- 				74ASXX:GATE			IN
2			K1					74ASXX:GATE			IN
3			J1					74ASXX:GATE			IN
4			PRE_1-  			74ASXX:GATE			IN
5			Q1					74ASXX:GATE			OUT
6			Q1-  				74ASXX:GATE			OUT
7			GND  				GND  					NA
8			Q2-  				74ASXX:GATE			OUT
9			Q2					74ASXX:GATE			OUT
10			PRE_2- 			74ASXX:GATE			IN
11			J2  				74ASXX:GATE			IN
12			K2  				74ASXX:GATE			IN
13			CLK 				74ASXX:GATE			IN
14			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS114_SSOP
[Model File]		PML.MOD
[Package Model]    SSOP14
|
[Pin]		signal_name 	model_name  		direction
|
1			CLR- 				74ASXX:GATE			IN
2			K1					74ASXX:GATE			IN
3			J1					74ASXX:GATE			IN
4			PRE_1-  			74ASXX:GATE			IN
5			Q1					74ASXX:GATE			OUT
6			Q1-  				74ASXX:GATE			OUT
7			GND  				GND  					NA
8			Q2-  				74ASXX:GATE			OUT
9			Q2					74ASXX:GATE			OUT
10			PRE_2- 			74ASXX:GATE			IN
11			J2  				74ASXX:GATE			IN
12			K2  				74ASXX:GATE			IN
13			CLK 				74ASXX:GATE			IN
14			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS114_TSSOP
[Model File]		PML.MOD
[Package Model]    TSSOP14
|
[Pin]		signal_name 	model_name  		direction
|
1			CLR- 				74ASXX:GATE			IN
2			K1					74ASXX:GATE			IN
3			J1					74ASXX:GATE			IN
4			PRE_1-  			74ASXX:GATE			IN
5			Q1					74ASXX:GATE			OUT
6			Q1-  				74ASXX:GATE			OUT
7			GND  				GND  					NA
8			Q2-  				74ASXX:GATE			OUT
9			Q2					74ASXX:GATE			OUT
10			PRE_2- 			74ASXX:GATE			IN
11			J2  				74ASXX:GATE			IN
12			K2  				74ASXX:GATE			IN
13			CLK 				74ASXX:GATE			IN
14			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS131_DIP
[Model File]		PML.MOD
[Package Model]    DIP16
|
[Pin]		signal_name 	model_name  		direction
|
1			A 					74ASXX:GATE			IN
2			B 					74ASXX:GATE			IN
3			C 					74ASXX:GATE			IN
4			CLK  				74ASXX:GATE			IN
5			G2-  				74ASXX:GATE			IN
6			G1					74ASXX:GATE			IN
7			Y7					74ASXX:LINE-DRV  	OUT
8			GND  				GND  					NA
9			Y6					74ASXX:LINE-DRV  	OUT
10			Y5  				74ASXX:LINE-DRV  	OUT
11			Y4  				74ASXX:LINE-DRV  	OUT
12			Y3  				74ASXX:LINE-DRV  	OUT
13			Y2  				74ASXX:LINE-DRV  	OUT
14			Y1  				74ASXX:LINE-DRV  	OUT
15			Y0  				74ASXX:LINE-DRV  	OUT
16			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS131_SOIC
[Model File]		PML.MOD
[Package Model]    SOIC16
|
[Pin]		signal_name 	model_name  		direction
|
1			A 					74ASXX:GATE			IN
2			B 					74ASXX:GATE			IN
3			C 					74ASXX:GATE			IN
4			CLK  				74ASXX:GATE			IN
5			G2-  				74ASXX:GATE			IN
6			G1					74ASXX:GATE			IN
7			Y7					74ASXX:LINE-DRV  	OUT
8			GND  				GND  					NA
9			Y6					74ASXX:LINE-DRV  	OUT
10			Y5  				74ASXX:LINE-DRV  	OUT
11			Y4  				74ASXX:LINE-DRV  	OUT
12			Y3  				74ASXX:LINE-DRV  	OUT
13			Y2  				74ASXX:LINE-DRV  	OUT
14			Y1  				74ASXX:LINE-DRV  	OUT
15			Y0  				74ASXX:LINE-DRV  	OUT
16			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS131_SSOP
[Model File]		PML.MOD
[Package Model]    SSOP16
|
[Pin]		signal_name 	model_name  		direction
|
1			A 					74ASXX:GATE			IN
2			B 					74ASXX:GATE			IN
3			C 					74ASXX:GATE			IN
4			CLK  				74ASXX:GATE			IN
5			G2-  				74ASXX:GATE			IN
6			G1					74ASXX:GATE			IN
7			Y7					74ASXX:LINE-DRV  	OUT
8			GND  				GND  					NA
9			Y6					74ASXX:LINE-DRV  	OUT
10			Y5  				74ASXX:LINE-DRV  	OUT
11			Y4  				74ASXX:LINE-DRV  	OUT
12			Y3  				74ASXX:LINE-DRV  	OUT
13			Y2  				74ASXX:LINE-DRV  	OUT
14			Y1  				74ASXX:LINE-DRV  	OUT
15			Y0  				74ASXX:LINE-DRV  	OUT
16			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS136_DIP
[Model File]		PML.MOD
[Package Model]    DIP14
|
[Pin]		signal_name 	model_name  		direction
|
1			A1					74ASXX:GATE			IN
2			B1					74ASXX:GATE			IN
3			Y1					74ASXX:OPEN-COL  	OUT
4			A2					74ASXX:GATE			IN
5			B2					74ASXX:GATE			IN
6			Y2					74ASXX:OPEN-COL  	OUT
7			GND  				GND  					NA
8			Y3					74ASXX:OPEN-COL  	OUT
9			A3					74ASXX:GATE			IN
10			B3  				74ASXX:GATE			IN
11			Y4  				74ASXX:OPEN-COL  	OUT
12			A4  				74ASXX:GATE			IN
13			B4  				74ASXX:GATE			IN
14			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS136_SOIC
[Model File]		PML.MOD
[Package Model]    SOIC14
|
[Pin]		signal_name 	model_name  		direction
|
1			A1					74ASXX:GATE			IN
2			B1					74ASXX:GATE			IN
3			Y1					74ASXX:OPEN-COL  	OUT
4			A2					74ASXX:GATE			IN
5			B2					74ASXX:GATE			IN
6			Y2					74ASXX:OPEN-COL  	OUT
7			GND  				GND  					NA
8			Y3					74ASXX:OPEN-COL  	OUT
9			A3					74ASXX:GATE			IN
10			B3  				74ASXX:GATE			IN
11			Y4  				74ASXX:OPEN-COL  	OUT
12			A4  				74ASXX:GATE			IN
13			B4  				74ASXX:GATE			IN
14			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS136_SSOP
[Model File]		PML.MOD
[Package Model]    SSOP14
|
[Pin]		signal_name 	model_name  		direction
|
1			A1					74ASXX:GATE			IN
2			B1					74ASXX:GATE			IN
3			Y1					74ASXX:OPEN-COL  	OUT
4			A2					74ASXX:GATE			IN
5			B2					74ASXX:GATE			IN
6			Y2					74ASXX:OPEN-COL  	OUT
7			GND  				GND  					NA
8			Y3					74ASXX:OPEN-COL  	OUT
9			A3					74ASXX:GATE			IN
10			B3  				74ASXX:GATE			IN
11			Y4  				74ASXX:OPEN-COL  	OUT
12			A4  				74ASXX:GATE			IN
13			B4  				74ASXX:GATE			IN
14			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS136_TSSOP
[Model File]		PML.MOD
[Package Model]    TSSOP14
|
[Pin]		signal_name 	model_name  		direction
|
1			A1					74ASXX:GATE			IN
2			B1					74ASXX:GATE			IN
3			Y1					74ASXX:OPEN-COL  	OUT
4			A2					74ASXX:GATE			IN
5			B2					74ASXX:GATE			IN
6			Y2					74ASXX:OPEN-COL  	OUT
7			GND  				GND  					NA
8			Y3					74ASXX:OPEN-COL  	OUT
9			A3					74ASXX:GATE			IN
10			B3  				74ASXX:GATE			IN
11			Y4  				74ASXX:OPEN-COL  	OUT
12			A4  				74ASXX:GATE			IN
13			B4  				74ASXX:GATE			IN
14			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS137_DIP
[Model File]		PML.MOD
[Package Model]    DIP16
|
[Pin]		signal_name 	model_name  		direction
|
1			A 					74ASXX:GATE			IN
2			B 					74ASXX:GATE			IN
3			C 					74ASXX:GATE			IN
4			GL-  				74ASXX:GATE			IN
5			G2-  				74ASXX:GATE			IN
6			G1					74ASXX:GATE			IN
7			Y7					74ASXX:GATE			OUT
8			GND  				GND  					NA
9			Y6					74ASXX:GATE			OUT
10			Y5  				74ASXX:GATE			OUT
11			Y4  				74ASXX:GATE			OUT
12			Y3  				74ASXX:GATE			OUT
13			Y2  				74ASXX:GATE			OUT
14			Y1  				74ASXX:GATE			OUT
15			Y0  				74ASXX:GATE			OUT
16			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS137_SOIC
[Model File]		PML.MOD
[Package Model]    SOIC16
|
[Pin]		signal_name 	model_name  		direction
|
1			A 					74ASXX:GATE			IN
2			B 					74ASXX:GATE			IN
3			C 					74ASXX:GATE			IN
4			GL-  				74ASXX:GATE			IN
5			G2-  				74ASXX:GATE			IN
6			G1					74ASXX:GATE			IN
7			Y7					74ASXX:GATE			OUT
8			GND  				GND  					NA
9			Y6					74ASXX:GATE			OUT
10			Y5  				74ASXX:GATE			OUT
11			Y4  				74ASXX:GATE			OUT
12			Y3  				74ASXX:GATE			OUT
13			Y2  				74ASXX:GATE			OUT
14			Y1  				74ASXX:GATE			OUT
15			Y0  				74ASXX:GATE			OUT
16			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS137_SSOP
[Model File]		PML.MOD
[Package Model]    SSOP16
|
[Pin]		signal_name 	model_name  		direction
|
1			A 					74ASXX:GATE			IN
2			B 					74ASXX:GATE			IN
3			C 					74ASXX:GATE			IN
4			GL-  				74ASXX:GATE			IN
5			G2-  				74ASXX:GATE			IN
6			G1					74ASXX:GATE			IN
7			Y7					74ASXX:GATE			OUT
8			GND  				GND  					NA
9			Y6					74ASXX:GATE			OUT
10			Y5  				74ASXX:GATE			OUT
11			Y4  				74ASXX:GATE			OUT
12			Y3  				74ASXX:GATE			OUT
13			Y2  				74ASXX:GATE			OUT
14			Y1  				74ASXX:GATE			OUT
15			Y0  				74ASXX:GATE			OUT
16			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS138_DIP
[Model File]		PML.MOD
[Package Model]    DIP16
|
[Pin]		signal_name 	model_name  		direction
|
1			A 					74ASXX:GATE			IN
2			B 					74ASXX:GATE			IN
3			C 					74ASXX:GATE			IN
4			G2A- 				74ASXX:GATE			IN
5			G2B- 				74ASXX:GATE			IN
6			G1					74ASXX:GATE			IN
7			Y7-  				74ASXX:GATE			OUT
8			GND  				GND  					NA
9			Y6-  				74ASXX:GATE			OUT
10			Y5- 				74ASXX:GATE			OUT
11			Y4- 				74ASXX:GATE			OUT
12			Y3- 				74ASXX:GATE			OUT
13			Y2- 				74ASXX:GATE			OUT
14			Y1- 				74ASXX:GATE			OUT
15			Y0- 				74ASXX:GATE			OUT
16			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS138_SOIC
[Model File]		PML.MOD
[Package Model]    SOIC16
|
[Pin]		signal_name 	model_name  		direction
|
1			A 					74ASXX:GATE			IN
2			B 					74ASXX:GATE			IN
3			C 					74ASXX:GATE			IN
4			G2A- 				74ASXX:GATE			IN
5			G2B- 				74ASXX:GATE			IN
6			G1					74ASXX:GATE			IN
7			Y7-  				74ASXX:GATE			OUT
8			GND  				GND  					NA
9			Y6-  				74ASXX:GATE			OUT
10			Y5- 				74ASXX:GATE			OUT
11			Y4- 				74ASXX:GATE			OUT
12			Y3- 				74ASXX:GATE			OUT
13			Y2- 				74ASXX:GATE			OUT
14			Y1- 				74ASXX:GATE			OUT
15			Y0- 				74ASXX:GATE			OUT
16			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS138_SSOP
[Model File]		PML.MOD
[Package Model]    SSOP16
|
[Pin]		signal_name 	model_name  		direction
|
1			A 					74ASXX:GATE			IN
2			B 					74ASXX:GATE			IN
3			C 					74ASXX:GATE			IN
4			G2A- 				74ASXX:GATE			IN
5			G2B- 				74ASXX:GATE			IN
6			G1					74ASXX:GATE			IN
7			Y7-  				74ASXX:GATE			OUT
8			GND  				GND  					NA
9			Y6-  				74ASXX:GATE			OUT
10			Y5- 				74ASXX:GATE			OUT
11			Y4- 				74ASXX:GATE			OUT
12			Y3- 				74ASXX:GATE			OUT
13			Y2- 				74ASXX:GATE			OUT
14			Y1- 				74ASXX:GATE			OUT
15			Y0- 				74ASXX:GATE			OUT
16			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS151_DIP
[Model File]		PML.MOD
[Package Model]    DIP16
|
[Pin]		signal_name 	model_name  		direction
|
1			D3					74ASXX:GATE			IN
2			D2					74ASXX:GATE			IN
3			D1					74ASXX:GATE			IN
4			D0					74ASXX:GATE			IN
5			Y 					74ASXX:GATE			OUT
6			W 					74ASXX:GATE			OUT
7			STROBE(G-) 		74ASXX:GATE			IN
8			GND  				GND  					NA
9			C 					74ASXX:GATE			IN
10			B					74ASXX:GATE			IN
11			A					74ASXX:GATE			IN
12			D7  				74ASXX:GATE			IN
13			D6  				74ASXX:GATE			IN
14			D5  				74ASXX:GATE			IN
15			D4  				74ASXX:GATE			IN
16			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS151_SOIC
[Model File]		PML.MOD
[Package Model]    SOIC16
|
[Pin]		signal_name 	model_name  		direction
|
1			D3					74ASXX:GATE			IN
2			D2					74ASXX:GATE			IN
3			D1					74ASXX:GATE			IN
4			D0					74ASXX:GATE			IN
5			Y 					74ASXX:GATE			OUT
6			W 					74ASXX:GATE			OUT
7			STROBE(G-) 		74ASXX:GATE			IN
8			GND  				GND  					NA
9			C 					74ASXX:GATE			IN
10			B					74ASXX:GATE			IN
11			A					74ASXX:GATE			IN
12			D7  				74ASXX:GATE			IN
13			D6  				74ASXX:GATE			IN
14			D5  				74ASXX:GATE			IN
15			D4  				74ASXX:GATE			IN
16			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS151_SSOP
[Model File]		PML.MOD
[Package Model]    SSOP16
|
[Pin]		signal_name 	model_name  		direction
|
1			D3					74ASXX:GATE			IN
2			D2					74ASXX:GATE			IN
3			D1					74ASXX:GATE			IN
4			D0					74ASXX:GATE			IN
5			Y 					74ASXX:GATE			OUT
6			W 					74ASXX:GATE			OUT
7			STROBE(G-) 		74ASXX:GATE			IN
8			GND  				GND  					NA
9			C 					74ASXX:GATE			IN
10			B					74ASXX:GATE			IN
11			A					74ASXX:GATE			IN
12			D7  				74ASXX:GATE			IN
13			D6  				74ASXX:GATE			IN
14			D5  				74ASXX:GATE			IN
15			D4  				74ASXX:GATE			IN
16			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS153_DIP
[Model File]		PML.MOD
[Package Model]    DIP16
|
[Pin]		signal_name 	model_name  		direction
|
1			STROBE(G1-)		74ASXX:GATE			IN
2			B 					74ASXX:GATE			IN
3			1C3  				74ASXX:GATE			IN
4			1C2  				74ASXX:GATE			IN
5			1C1  				74ASXX:GATE			IN
6			1C0  				74ASXX:GATE			IN
7			Y1					74ASXX:GATE			OUT
8			GND  				GND  					NA
9			Y2					74ASXX:GATE			OUT
10			2C0 				74ASXX:GATE			IN
11			2C1 				74ASXX:GATE			IN
12			2C2 				74ASXX:GATE			IN
13			2C3 				74ASXX:GATE			IN
14			A					74ASXX:GATE			IN
15			STROBE(G2-)  	74ASXX:GATE			IN
16			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS153_SOIC
[Model File]		PML.MOD
[Package Model]    SOIC16
|
[Pin]		signal_name 	model_name  		direction
|
1			STROBE(G1-)		74ASXX:GATE			IN
2			B 					74ASXX:GATE			IN
3			1C3  				74ASXX:GATE			IN
4			1C2  				74ASXX:GATE			IN
5			1C1  				74ASXX:GATE			IN
6			1C0  				74ASXX:GATE			IN
7			Y1					74ASXX:GATE			OUT
8			GND  				GND  					NA
9			Y2					74ASXX:GATE			OUT
10			2C0 				74ASXX:GATE			IN
11			2C1 				74ASXX:GATE			IN
12			2C2 				74ASXX:GATE			IN
13			2C3 				74ASXX:GATE			IN
14			A					74ASXX:GATE			IN
15			STROBE(G2-)  	74ASXX:GATE			IN
16			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS153_SSOP
[Model File]		PML.MOD
[Package Model]    SSOP16
|
[Pin]		signal_name 	model_name  		direction
|
1			STROBE(G1-)		74ASXX:GATE			IN
2			B 					74ASXX:GATE			IN
3			1C3  				74ASXX:GATE			IN
4			1C2  				74ASXX:GATE			IN
5			1C1  				74ASXX:GATE			IN
6			1C0  				74ASXX:GATE			IN
7			Y1					74ASXX:GATE			OUT
8			GND  				GND  					NA
9			Y2					74ASXX:GATE			OUT
10			2C0 				74ASXX:GATE			IN
11			2C1 				74ASXX:GATE			IN
12			2C2 				74ASXX:GATE			IN
13			2C3 				74ASXX:GATE			IN
14			A					74ASXX:GATE			IN
15			STROBE(G2-)  	74ASXX:GATE			IN
16			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS157_DIP
[Model File]		PML.MOD
[Package Model]    DIP16
|
[Pin]		signal_name 	model_name  		direction
|
1			SELECT(A-/B)  	74ASXX:GATE			IN
2			A1					74ASXX:GATE			IN
3			B1					74ASXX:GATE			IN
4			Y1					74ASXX:GATE			OUT
5			A2					74ASXX:GATE			IN
6			B2					74ASXX:GATE			IN
7			Y2					74ASXX:GATE			OUT
8			GND  				GND  					NA
9			Y3					74ASXX:GATE			OUT
10			B3  				74ASXX:GATE			IN
11			A3  				74ASXX:GATE			IN
12			Y4  				74ASXX:GATE			OUT
13			B4  				74ASXX:GATE			IN
14			A4  				74ASXX:GATE			IN
15			STROBE(G-)		74ASXX:GATE			IN
16			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS157_SOIC
[Model File]		PML.MOD
[Package Model]    SOIC16
|
[Pin]		signal_name 	model_name  		direction
|
1			SELECT(A-/B)  	74ASXX:GATE			IN
2			A1					74ASXX:GATE			IN
3			B1					74ASXX:GATE			IN
4			Y1					74ASXX:GATE			OUT
5			A2					74ASXX:GATE			IN
6			B2					74ASXX:GATE			IN
7			Y2					74ASXX:GATE			OUT
8			GND  				GND  					NA
9			Y3					74ASXX:GATE			OUT
10			B3  				74ASXX:GATE			IN
11			A3  				74ASXX:GATE			IN
12			Y4  				74ASXX:GATE			OUT
13			B4  				74ASXX:GATE			IN
14			A4  				74ASXX:GATE			IN
15			STROBE(G-)		74ASXX:GATE			IN
16			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS157_SSOP
[Model File]		PML.MOD
[Package Model]    SSOP16
|
[Pin]		signal_name 	model_name  		direction
|
1			SELECT(A-/B)  	74ASXX:GATE			IN
2			A1					74ASXX:GATE			IN
3			B1					74ASXX:GATE			IN
4			Y1					74ASXX:GATE			OUT
5			A2					74ASXX:GATE			IN
6			B2					74ASXX:GATE			IN
7			Y2					74ASXX:GATE			OUT
8			GND  				GND  					NA
9			Y3					74ASXX:GATE			OUT
10			B3  				74ASXX:GATE			IN
11			A3  				74ASXX:GATE			IN
12			Y4  				74ASXX:GATE			OUT
13			B4  				74ASXX:GATE			IN
14			A4  				74ASXX:GATE			IN
15			STROBE(G-)		74ASXX:GATE			IN
16			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS158_DIP
[Model File]		PML.MOD
[Package Model]    DIP16
|
[Pin]		signal_name 	model_name  		direction
|
1			SELECT(A-/B)  	74ASXX:GATE			IN
2			A1					74ASXX:GATE			IN
3			B1					74ASXX:GATE			IN
4			Y1-  				74ASXX:GATE			OUT
5			A2					74ASXX:GATE			IN
6			B2					74ASXX:GATE			IN
7			Y2-  				74ASXX:GATE			OUT
8			GND  				GND  					NA
9			Y3-  				74ASXX:GATE			OUT
10			B3  				74ASXX:GATE			IN
11			A3  				74ASXX:GATE			IN
12			Y4- 				74ASXX:GATE			OUT
13			B4  				74ASXX:GATE			IN
14			A4  				74ASXX:GATE			IN
15			STROBE(G-)		74ASXX:GATE			IN
16			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS158_SOIC
[Model File]		PML.MOD
[Package Model]    SOIC16
|
[Pin]		signal_name 	model_name  		direction
|
1			SELECT(A-/B)  	74ASXX:GATE			IN
2			A1					74ASXX:GATE			IN
3			B1					74ASXX:GATE			IN
4			Y1-  				74ASXX:GATE			OUT
5			A2					74ASXX:GATE			IN
6			B2					74ASXX:GATE			IN
7			Y2-  				74ASXX:GATE			OUT
8			GND  				GND  					NA
9			Y3-  				74ASXX:GATE			OUT
10			B3  				74ASXX:GATE			IN
11			A3  				74ASXX:GATE			IN
12			Y4- 				74ASXX:GATE			OUT
13			B4  				74ASXX:GATE			IN
14			A4  				74ASXX:GATE			IN
15			STROBE(G-)		74ASXX:GATE			IN
16			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS158_SSOP
[Model File]		PML.MOD
[Package Model]    SSOP16
|
[Pin]		signal_name 	model_name  		direction
|
1			SELECT(A-/B)  	74ASXX:GATE			IN
2			A1					74ASXX:GATE			IN
3			B1					74ASXX:GATE			IN
4			Y1-  				74ASXX:GATE			OUT
5			A2					74ASXX:GATE			IN
6			B2					74ASXX:GATE			IN
7			Y2-  				74ASXX:GATE			OUT
8			GND  				GND  					NA
9			Y3-  				74ASXX:GATE			OUT
10			B3  				74ASXX:GATE			IN
11			A3  				74ASXX:GATE			IN
12			Y4- 				74ASXX:GATE			OUT
13			B4  				74ASXX:GATE			IN
14			A4  				74ASXX:GATE			IN
15			STROBE(G-)		74ASXX:GATE			IN
16			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS160_DIP
[Model File]		PML.MOD
[Package Model]    DIP16
|
[Pin]		signal_name 	model_name  		direction
|
1			CLR- 				74ASXX:GATE			IN
2			CLK  				74ASXX:GATE			IN
3			A 					74ASXX:GATE			IN
4			B 					74ASXX:GATE			IN
5			C 					74ASXX:GATE			IN
6			D 					74ASXX:GATE			IN
7			ENABLE_P			74ASXX:GATE			IN
8			GND  				GND  					NA
9			LOAD-				74ASXX:GATE			IN
10			ENABLE_T  		74ASXX:GATE			IN
11			QD  				74ASXX:GATE			OUT
12			QC  				74ASXX:GATE			OUT
13			QB  				74ASXX:GATE			OUT
14			QA  				74ASXX:GATE			OUT
15			RIP_CARRY 		74ASXX:GATE			OUT
16			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS160_SOIC
[Model File]		PML.MOD
[Package Model]    SOIC16
|
[Pin]		signal_name 	model_name  		direction
|
1			CLR- 				74ASXX:GATE			IN
2			CLK  				74ASXX:GATE			IN
3			A 					74ASXX:GATE			IN
4			B 					74ASXX:GATE			IN
5			C 					74ASXX:GATE			IN
6			D 					74ASXX:GATE			IN
7			ENABLE_P			74ASXX:GATE			IN
8			GND  				GND  					NA
9			LOAD-				74ASXX:GATE			IN
10			ENABLE_T  		74ASXX:GATE			IN
11			QD  				74ASXX:GATE			OUT
12			QC  				74ASXX:GATE			OUT
13			QB  				74ASXX:GATE			OUT
14			QA  				74ASXX:GATE			OUT
15			RIP_CARRY 		74ASXX:GATE			OUT
16			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS160_SSOP
[Model File]		PML.MOD
[Package Model]    SSOP16
|
[Pin]		signal_name 	model_name  		direction
|
1			CLR- 				74ASXX:GATE			IN
2			CLK  				74ASXX:GATE			IN
3			A 					74ASXX:GATE			IN
4			B 					74ASXX:GATE			IN
5			C 					74ASXX:GATE			IN
6			D 					74ASXX:GATE			IN
7			ENABLE_P			74ASXX:GATE			IN
8			GND  				GND  					NA
9			LOAD-				74ASXX:GATE			IN
10			ENABLE_T  		74ASXX:GATE			IN
11			QD  				74ASXX:GATE			OUT
12			QC  				74ASXX:GATE			OUT
13			QB  				74ASXX:GATE			OUT
14			QA  				74ASXX:GATE			OUT
15			RIP_CARRY 		74ASXX:GATE			OUT
16			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS161_DIP
[Model File]		PML.MOD
[Package Model]    DIP16
|
[Pin]		signal_name 	model_name  		direction
|
1			CLR- 				74ASXX:GATE			IN
2			CLK  				74ASXX:GATE			IN
3			A 					74ASXX:GATE			IN
4			B 					74ASXX:GATE			IN
5			C 					74ASXX:GATE			IN
6			D 					74ASXX:GATE			IN
7			ENABLE_P			74ASXX:GATE			IN
8			GND  				GND  					NA
9			LOAD-				74ASXX:GATE			IN
10			ENABLE_T  		74ASXX:GATE			IN
11			QD  				74ASXX:GATE			OUT
12			QC  				74ASXX:GATE			OUT
13			QB  				74ASXX:GATE			OUT
14			QA  				74ASXX:GATE			OUT
15			RIP_CARRY 		74ASXX:GATE			OUT
16			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS161_SOIC
[Model File]		PML.MOD
[Package Model]    SOIC16
|
[Pin]		signal_name 	model_name  		direction
|
1			CLR- 				74ASXX:GATE			IN
2			CLK  				74ASXX:GATE			IN
3			A 					74ASXX:GATE			IN
4			B 					74ASXX:GATE			IN
5			C 					74ASXX:GATE			IN
6			D 					74ASXX:GATE			IN
7			ENABLE_P			74ASXX:GATE			IN
8			GND  				GND  					NA
9			LOAD-				74ASXX:GATE			IN
10			ENABLE_T  		74ASXX:GATE			IN
11			QD  				74ASXX:GATE			OUT
12			QC  				74ASXX:GATE			OUT
13			QB  				74ASXX:GATE			OUT
14			QA  				74ASXX:GATE			OUT
15			RIP_CARRY 		74ASXX:GATE			OUT
16			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS161_SSOP
[Model File]		PML.MOD
[Package Model]    SSOP16
|
[Pin]		signal_name 	model_name  		direction
|
1			CLR- 				74ASXX:GATE			IN
2			CLK  				74ASXX:GATE			IN
3			A 					74ASXX:GATE			IN
4			B 					74ASXX:GATE			IN
5			C 					74ASXX:GATE			IN
6			D 					74ASXX:GATE			IN
7			ENABLE_P			74ASXX:GATE			IN
8			GND  				GND  					NA
9			LOAD-				74ASXX:GATE			IN
10			ENABLE_T  		74ASXX:GATE			IN
11			QD  				74ASXX:GATE			OUT
12			QC  				74ASXX:GATE			OUT
13			QB  				74ASXX:GATE			OUT
14			QA  				74ASXX:GATE			OUT
15			RIP_CARRY 		74ASXX:GATE			OUT
16			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS162_DIP
[Model File]		PML.MOD
[Package Model]    DIP16
|
[Pin]		signal_name 	model_name  		direction
|
1			CLEAR-  			74ASXX:GATE			IN
2			CLK  				74ASXX:GATE			IN
3			A 					74ASXX:GATE			IN
4			B 					74ASXX:GATE			IN
5			C 					74ASXX:GATE			IN
6			D 					74ASXX:GATE			IN
7			ENABLE_P			74ASXX:GATE			IN
8			GND  				GND  					NA
9			LOAD-				74ASXX:GATE			IN
10			ENABLE_T  		74ASXX:GATE			IN
11			QD  				74ASXX:GATE			OUT
12			QC  				74ASXX:GATE			OUT
13			QB  				74ASXX:GATE			OUT
14			QA  				74ASXX:GATE			OUT
15			RIP_CARRY 		74ASXX:GATE			OUT
16			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS162_SOIC
[Model File]		PML.MOD
[Package Model]    SOIC16
|
[Pin]		signal_name 	model_name  		direction
|
1			CLEAR-  			74ASXX:GATE			IN
2			CLK  				74ASXX:GATE			IN
3			A 					74ASXX:GATE			IN
4			B 					74ASXX:GATE			IN
5			C 					74ASXX:GATE			IN
6			D 					74ASXX:GATE			IN
7			ENABLE_P			74ASXX:GATE			IN
8			GND  				GND  					NA
9			LOAD-				74ASXX:GATE			IN
10			ENABLE_T  		74ASXX:GATE			IN
11			QD  				74ASXX:GATE			OUT
12			QC  				74ASXX:GATE			OUT
13			QB  				74ASXX:GATE			OUT
14			QA  				74ASXX:GATE			OUT
15			RIP_CARRY 		74ASXX:GATE			OUT
16			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS162_SSOP
[Model File]		PML.MOD
[Package Model]    SSOP16
|
[Pin]		signal_name 	model_name  		direction
|
1			CLEAR-  			74ASXX:GATE			IN
2			CLK  				74ASXX:GATE			IN
3			A 					74ASXX:GATE			IN
4			B 					74ASXX:GATE			IN
5			C 					74ASXX:GATE			IN
6			D 					74ASXX:GATE			IN
7			ENABLE_P			74ASXX:GATE			IN
8			GND  				GND  					NA
9			LOAD-				74ASXX:GATE			IN
10			ENABLE_T  		74ASXX:GATE			IN
11			QD  				74ASXX:GATE			OUT
12			QC  				74ASXX:GATE			OUT
13			QB  				74ASXX:GATE			OUT
14			QA  				74ASXX:GATE			OUT
15			RIP_CARRY 		74ASXX:GATE			OUT
16			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS163_DIP
[Model File]		PML.MOD
[Package Model]    DIP16
|
[Pin]		signal_name 	model_name  		direction
|
1			CLEAR-  			74ASXX:GATE			IN
2			CLK  				74ASXX:GATE			IN
3			A 					74ASXX:GATE			IN
4			B 					74ASXX:GATE			IN
5			C 					74ASXX:GATE			IN
6			D 					74ASXX:GATE			IN
7			ENABLE_P			74ASXX:GATE			IN
8			GND  				GND  					NA
9			LOAD-				74ASXX:GATE			IN
10			ENABLE_T  		74ASXX:GATE			IN
11			QD  				74ASXX:GATE			OUT
12			QC  				74ASXX:GATE			OUT
13			QB  				74ASXX:GATE			OUT
14			QA  				74ASXX:GATE			OUT
15			RIP_CARRY 		74ASXX:GATE			OUT
16			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS163_SOIC
[Model File]		PML.MOD
[Package Model]    SOIC16
|
[Pin]		signal_name 	model_name  		direction
|
1			CLEAR-  			74ASXX:GATE			IN
2			CLK  				74ASXX:GATE			IN
3			A 					74ASXX:GATE			IN
4			B 					74ASXX:GATE			IN
5			C 					74ASXX:GATE			IN
6			D 					74ASXX:GATE			IN
7			ENABLE_P			74ASXX:GATE			IN
8			GND  				GND  					NA
9			LOAD-				74ASXX:GATE			IN
10			ENABLE_T  		74ASXX:GATE			IN
11			QD  				74ASXX:GATE			OUT
12			QC  				74ASXX:GATE			OUT
13			QB  				74ASXX:GATE			OUT
14			QA  				74ASXX:GATE			OUT
15			RIP_CARRY 		74ASXX:GATE			OUT
16			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS163_SSOP
[Model File]		PML.MOD
[Package Model]    SSOP16
|
[Pin]		signal_name 	model_name  		direction
|
1			CLEAR-  			74ASXX:GATE			IN
2			CLK  				74ASXX:GATE			IN
3			A 					74ASXX:GATE			IN
4			B 					74ASXX:GATE			IN
5			C 					74ASXX:GATE			IN
6			D 					74ASXX:GATE			IN
7			ENABLE_P			74ASXX:GATE			IN
8			GND  				GND  					NA
9			LOAD-				74ASXX:GATE			IN
10			ENABLE_T  		74ASXX:GATE			IN
11			QD  				74ASXX:GATE			OUT
12			QC  				74ASXX:GATE			OUT
13			QB  				74ASXX:GATE			OUT
14			QA  				74ASXX:GATE			OUT
15			RIP_CARRY 		74ASXX:GATE			OUT
16			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS168_DIP
[Model File]		PML.MOD
[Package Model]    DIP16
|
[Pin]		signal_name 	model_name  		direction
|
1			U/(D-)  			74ASXX:GATE			IN
2			CLK  				74ASXX:GATE			IN
3			A 					74ASXX:GATE			IN
4			B 					74ASXX:GATE			IN
5			C 					74ASXX:GATE			IN
6			D 					74ASXX:GATE			IN
7			ENABLE_P-  		74ASXX:GATE			IN
8			GND  				GND  					NA
9			LOAD 				74ASXX:GATE			IN
10			ENABLE_T- 		74ASXX:GATE			IN
11			QD  				74ASXX:GATE			OUT
12			QC  				74ASXX:GATE			OUT
13			QB  				74ASXX:GATE			OUT
14			QA  				74ASXX:GATE			OUT
15			RIP_CARRY-		74ASXX:GATE			OUT
16			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS168_SOIC
[Model File]		PML.MOD
[Package Model]    SOIC16
|
[Pin]		signal_name 	model_name  		direction
|
1			U/(D-)  			74ASXX:GATE			IN
2			CLK  				74ASXX:GATE			IN
3			A 					74ASXX:GATE			IN
4			B 					74ASXX:GATE			IN
5			C 					74ASXX:GATE			IN
6			D 					74ASXX:GATE			IN
7			ENABLE_P-  		74ASXX:GATE			IN
8			GND  				GND  					NA
9			LOAD 				74ASXX:GATE			IN
10			ENABLE_T- 		74ASXX:GATE			IN
11			QD  				74ASXX:GATE			OUT
12			QC  				74ASXX:GATE			OUT
13			QB  				74ASXX:GATE			OUT
14			QA  				74ASXX:GATE			OUT
15			RIP_CARRY-		74ASXX:GATE			OUT
16			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS168_SSOP
[Model File]		PML.MOD
[Package Model]    SSOP16
|
[Pin]		signal_name 	model_name  		direction
|
1			U/(D-)  			74ASXX:GATE			IN
2			CLK  				74ASXX:GATE			IN
3			A 					74ASXX:GATE			IN
4			B 					74ASXX:GATE			IN
5			C 					74ASXX:GATE			IN
6			D 					74ASXX:GATE			IN
7			ENABLE_P-  		74ASXX:GATE			IN
8			GND  				GND  					NA
9			LOAD 				74ASXX:GATE			IN
10			ENABLE_T- 		74ASXX:GATE			IN
11			QD  				74ASXX:GATE			OUT
12			QC  				74ASXX:GATE			OUT
13			QB  				74ASXX:GATE			OUT
14			QA  				74ASXX:GATE			OUT
15			RIP_CARRY-		74ASXX:GATE			OUT
16			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS169_DIP
[Model File]		PML.MOD
[Package Model]    DIP16
|
[Pin]		signal_name 	model_name  		direction
|
1			U/D- 				74ASXX:GATE			IN
2			CLK  				74ASXX:GATE			IN
3			A 					74ASXX:GATE			IN
4			B 					74ASXX:GATE			IN
5			C 					74ASXX:GATE			IN
6			D 					74ASXX:GATE			IN
7			ENABLE_P-  		74ASXX:GATE			IN
8			GND  				GND  					NA
9			LOAD-				74ASXX:GATE			IN
10			ENABLE_T- 		74ASXX:GATE			IN
11			QD  				74ASXX:GATE			OUT
12			QC  				74ASXX:GATE			OUT
13			QB  				74ASXX:GATE			OUT
14			QA  				74ASXX:GATE			OUT
15			RIP_CARRY-		74ASXX:GATE			OUT
16			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS169_SOIC
[Model File]		PML.MOD
[Package Model]    SOIC16
|
[Pin]		signal_name 	model_name  		direction
|
1			U/D- 				74ASXX:GATE			IN
2			CLK  				74ASXX:GATE			IN
3			A 					74ASXX:GATE			IN
4			B 					74ASXX:GATE			IN
5			C 					74ASXX:GATE			IN
6			D 					74ASXX:GATE			IN
7			ENABLE_P-  		74ASXX:GATE			IN
8			GND  				GND  					NA
9			LOAD-				74ASXX:GATE			IN
10			ENABLE_T- 		74ASXX:GATE			IN
11			QD  				74ASXX:GATE			OUT
12			QC  				74ASXX:GATE			OUT
13			QB  				74ASXX:GATE			OUT
14			QA  				74ASXX:GATE			OUT
15			RIP_CARRY-		74ASXX:GATE			OUT
16			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS169_SSOP
[Model File]		PML.MOD
[Package Model]    SSOP16
|
[Pin]		signal_name 	model_name  		direction
|
1			U/D- 				74ASXX:GATE			IN
2			CLK  				74ASXX:GATE			IN
3			A 					74ASXX:GATE			IN
4			B 					74ASXX:GATE			IN
5			C 					74ASXX:GATE			IN
6			D 					74ASXX:GATE			IN
7			ENABLE_P-  		74ASXX:GATE			IN
8			GND  				GND  					NA
9			LOAD-				74ASXX:GATE			IN
10			ENABLE_T- 		74ASXX:GATE			IN
11			QD  				74ASXX:GATE			OUT
12			QC  				74ASXX:GATE			OUT
13			QB  				74ASXX:GATE			OUT
14			QA  				74ASXX:GATE			OUT
15			RIP_CARRY-		74ASXX:GATE			OUT
16			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS174_DIP
[Model File]		PML.MOD
[Package Model]    DIP16
|
[Pin]		signal_name 	model_name  		direction
|
1			CLR- 				74ASXX:GATE			IN
2			Q1					74ASXX:GATE			OUT
3			D1					74ASXX:GATE			IN
4			D2					74ASXX:GATE			IN
5			Q2					74ASXX:GATE			OUT
6			D3					74ASXX:GATE			IN
7			Q3					74ASXX:GATE			OUT
8			GND  				GND  					NA
9			CLK  				74ASXX:GATE			IN
10			Q4  				74ASXX:GATE			OUT
11			D4  				74ASXX:GATE			IN
12			Q5  				74ASXX:GATE			OUT
13			D5  				74ASXX:GATE			IN
14			D6  				74ASXX:GATE			IN
15			Q6  				74ASXX:GATE			OUT
16			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS174_SOIC
[Model File]		PML.MOD
[Package Model]    SOIC16
|
[Pin]		signal_name 	model_name  		direction
|
1			CLR- 				74ASXX:GATE			IN
2			Q1					74ASXX:GATE			OUT
3			D1					74ASXX:GATE			IN
4			D2					74ASXX:GATE			IN
5			Q2					74ASXX:GATE			OUT
6			D3					74ASXX:GATE			IN
7			Q3					74ASXX:GATE			OUT
8			GND  				GND  					NA
9			CLK  				74ASXX:GATE			IN
10			Q4  				74ASXX:GATE			OUT
11			D4  				74ASXX:GATE			IN
12			Q5  				74ASXX:GATE			OUT
13			D5  				74ASXX:GATE			IN
14			D6  				74ASXX:GATE			IN
15			Q6  				74ASXX:GATE			OUT
16			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS174_SSOP
[Model File]		PML.MOD
[Package Model]    SSOP16
|
[Pin]		signal_name 	model_name  		direction
|
1			CLR- 				74ASXX:GATE			IN
2			Q1					74ASXX:GATE			OUT
3			D1					74ASXX:GATE			IN
4			D2					74ASXX:GATE			IN
5			Q2					74ASXX:GATE			OUT
6			D3					74ASXX:GATE			IN
7			Q3					74ASXX:GATE			OUT
8			GND  				GND  					NA
9			CLK  				74ASXX:GATE			IN
10			Q4  				74ASXX:GATE			OUT
11			D4  				74ASXX:GATE			IN
12			Q5  				74ASXX:GATE			OUT
13			D5  				74ASXX:GATE			IN
14			D6  				74ASXX:GATE			IN
15			Q6  				74ASXX:GATE			OUT
16			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS175_DIP
[Model File]		PML.MOD
[Package Model]    DIP16
|
[Pin]		signal_name 	model_name  		direction
|
1			CLR- 				74ASXX:GATE			IN
2			Q1					74ASXX:GATE			OUT
3			Q1-  				74ASXX:GATE			OUT
4			D1					74ASXX:GATE			IN
5			D2					74ASXX:GATE			IN
6			Q2-  				74ASXX:GATE			OUT
7			Q2					74ASXX:GATE			OUT
8			GND  				GND  					NA
9			CLK  				74ASXX:GATE			IN
10			Q3  				74ASXX:GATE			OUT
11			Q3- 				74ASXX:GATE			OUT
12			D3  				74ASXX:GATE			IN
13			D4  				74ASXX:GATE			IN
14			Q4- 				74ASXX:GATE			OUT
15			Q4  				74ASXX:GATE			OUT
16			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS175_SOIC
[Model File]		PML.MOD
[Package Model]    SOIC16
|
[Pin]		signal_name 	model_name  		direction
|
1			CLR- 				74ASXX:GATE			IN
2			Q1					74ASXX:GATE			OUT
3			Q1-  				74ASXX:GATE			OUT
4			D1					74ASXX:GATE			IN
5			D2					74ASXX:GATE			IN
6			Q2-  				74ASXX:GATE			OUT
7			Q2					74ASXX:GATE			OUT
8			GND  				GND  					NA
9			CLK  				74ASXX:GATE			IN
10			Q3  				74ASXX:GATE			OUT
11			Q3- 				74ASXX:GATE			OUT
12			D3  				74ASXX:GATE			IN
13			D4  				74ASXX:GATE			IN
14			Q4- 				74ASXX:GATE			OUT
15			Q4  				74ASXX:GATE			OUT
16			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS175_SSOP
[Model File]		PML.MOD
[Package Model]    SSOP16
|
[Pin]		signal_name 	model_name  		direction
|
1			CLR- 				74ASXX:GATE			IN
2			Q1					74ASXX:GATE			OUT
3			Q1-  				74ASXX:GATE			OUT
4			D1					74ASXX:GATE			IN
5			D2					74ASXX:GATE			IN
6			Q2-  				74ASXX:GATE			OUT
7			Q2					74ASXX:GATE			OUT
8			GND  				GND  					NA
9			CLK  				74ASXX:GATE			IN
10			Q3  				74ASXX:GATE			OUT
11			Q3- 				74ASXX:GATE			OUT
12			D3  				74ASXX:GATE			IN
13			D4  				74ASXX:GATE			IN
14			Q4- 				74ASXX:GATE			OUT
15			Q4  				74ASXX:GATE			OUT
16			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS181_DIP
[Model File]		PML.MOD
[Package Model]    DIP24
|
[Pin]		signal_name 	model_name  		direction
|
1			B0-  				74ASXX:GATE			IN
2			A0-  				74ASXX:GATE			IN
3			S3					74ASXX:GATE			IN
4			S2					74ASXX:GATE			IN
5			S1					74ASXX:GATE			IN
6			S0					74ASXX:GATE			IN
7			Cn					74ASXX:GATE			IN
8			M 					74ASXX:GATE			IN
9			F0-  				74ASXX:GATE			OUT
10			F1- 				74ASXX:GATE			OUT
11			F2- 				74ASXX:GATE			OUT
12			GND 				GND  					NA
13			F3- 				74ASXX:GATE			OUT
14			A=B 				74ASXX:OPEN-COL  	OUT
15			P-  				74ASXX:GATE			OUT
16			C(n+4) 			74ASXX:GATE			OUT
17			G-  				74ASXX:GATE			OUT
18			B3- 				74ASXX:GATE			IN
19			A3- 				74ASXX:GATE			IN
20			B2- 				74ASXX:GATE			IN
21			A2- 				74ASXX:GATE			IN
22			B1- 				74ASXX:GATE			IN
23			A1- 				74ASXX:GATE			IN
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS181_SOIC
[Model File]		PML.MOD
[Package Model]    SOIC24
|
[Pin]		signal_name 	model_name  		direction
|
1			B0-  				74ASXX:GATE			IN
2			A0-  				74ASXX:GATE			IN
3			S3					74ASXX:GATE			IN
4			S2					74ASXX:GATE			IN
5			S1					74ASXX:GATE			IN
6			S0					74ASXX:GATE			IN
7			Cn					74ASXX:GATE			IN
8			M 					74ASXX:GATE			IN
9			F0-  				74ASXX:GATE			OUT
10			F1- 				74ASXX:GATE			OUT
11			F2- 				74ASXX:GATE			OUT
12			GND 				GND  					NA
13			F3- 				74ASXX:GATE			OUT
14			A=B 				74ASXX:OPEN-COL  	OUT
15			P-  				74ASXX:GATE			OUT
16			C(n+4) 			74ASXX:GATE			OUT
17			G-  				74ASXX:GATE			OUT
18			B3- 				74ASXX:GATE			IN
19			A3- 				74ASXX:GATE			IN
20			B2- 				74ASXX:GATE			IN
21			A2- 				74ASXX:GATE			IN
22			B1- 				74ASXX:GATE			IN
23			A1- 				74ASXX:GATE			IN
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS181_SSOP
[Model File]		PML.MOD
[Package Model]    SSOP24
|
[Pin]		signal_name 	model_name  		direction
|
1			B0-  				74ASXX:GATE			IN
2			A0-  				74ASXX:GATE			IN
3			S3					74ASXX:GATE			IN
4			S2					74ASXX:GATE			IN
5			S1					74ASXX:GATE			IN
6			S0					74ASXX:GATE			IN
7			Cn					74ASXX:GATE			IN
8			M 					74ASXX:GATE			IN
9			F0-  				74ASXX:GATE			OUT
10			F1- 				74ASXX:GATE			OUT
11			F2- 				74ASXX:GATE			OUT
12			GND 				GND  					NA
13			F3- 				74ASXX:GATE			OUT
14			A=B 				74ASXX:OPEN-COL  	OUT
15			P-  				74ASXX:GATE			OUT
16			C(n+4) 			74ASXX:GATE			OUT
17			G-  				74ASXX:GATE			OUT
18			B3- 				74ASXX:GATE			IN
19			A3- 				74ASXX:GATE			IN
20			B2- 				74ASXX:GATE			IN
21			A2- 				74ASXX:GATE			IN
22			B1- 				74ASXX:GATE			IN
23			A1- 				74ASXX:GATE			IN
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS181_TSSOP
[Model File]		PML.MOD
[Package Model]    TSSOP24
|
[Pin]		signal_name 	model_name  		direction
|
1			B0-  				74ASXX:GATE			IN
2			A0-  				74ASXX:GATE			IN
3			S3					74ASXX:GATE			IN
4			S2					74ASXX:GATE			IN
5			S1					74ASXX:GATE			IN
6			S0					74ASXX:GATE			IN
7			Cn					74ASXX:GATE			IN
8			M 					74ASXX:GATE			IN
9			F0-  				74ASXX:GATE			OUT
10			F1- 				74ASXX:GATE			OUT
11			F2- 				74ASXX:GATE			OUT
12			GND 				GND  					NA
13			F3- 				74ASXX:GATE			OUT
14			A=B 				74ASXX:OPEN-COL  	OUT
15			P-  				74ASXX:GATE			OUT
16			C(n+4) 			74ASXX:GATE			OUT
17			G-  				74ASXX:GATE			OUT
18			B3- 				74ASXX:GATE			IN
19			A3- 				74ASXX:GATE			IN
20			B2- 				74ASXX:GATE			IN
21			A2- 				74ASXX:GATE			IN
22			B1- 				74ASXX:GATE			IN
23			A1- 				74ASXX:GATE			IN
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS182_DIP
[Model File]		PML.MOD
[Package Model]    DIP16
|
[Pin]		signal_name 	model_name  		direction
|
1			G1-  				74ASXX:GATE			IN
2			P1-  				74ASXX:GATE			IN
3			G0-  				74ASXX:GATE			IN
4			P0-  				74ASXX:GATE			IN
5			G3-  				74ASXX:GATE			IN
6			P3-  				74ASXX:GATE			IN
7			P-					74ASXX:GATE			OUT
8			GND  				GND  					NA
9			C(n+z)  			74ASXX:GATE			OUT
10			G-  				74ASXX:GATE			OUT
11			C(n+y) 			74ASXX:GATE			OUT
12			C(n+x) 			74ASXX:GATE			OUT
13			Cn  				74ASXX:GATE			IN
14			G2- 				74ASXX:GATE			IN
15			P2- 				74ASXX:GATE			IN
16			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS182_SOIC
[Model File]		PML.MOD
[Package Model]    SOIC16
|
[Pin]		signal_name 	model_name  		direction
|
1			G1-  				74ASXX:GATE			IN
2			P1-  				74ASXX:GATE			IN
3			G0-  				74ASXX:GATE			IN
4			P0-  				74ASXX:GATE			IN
5			G3-  				74ASXX:GATE			IN
6			P3-  				74ASXX:GATE			IN
7			P-					74ASXX:GATE			OUT
8			GND  				GND  					NA
9			C(n+z)  			74ASXX:GATE			OUT
10			G-  				74ASXX:GATE			OUT
11			C(n+y) 			74ASXX:GATE			OUT
12			C(n+x) 			74ASXX:GATE			OUT
13			Cn  				74ASXX:GATE			IN
14			G2- 				74ASXX:GATE			IN
15			P2- 				74ASXX:GATE			IN
16			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS182_SSOP
[Model File]		PML.MOD
[Package Model]    SSOP16
|
[Pin]		signal_name 	model_name  		direction
|
1			G1-  				74ASXX:GATE			IN
2			P1-  				74ASXX:GATE			IN
3			G0-  				74ASXX:GATE			IN
4			P0-  				74ASXX:GATE			IN
5			G3-  				74ASXX:GATE			IN
6			P3-  				74ASXX:GATE			IN
7			P-					74ASXX:GATE			OUT
8			GND  				GND  					NA
9			C(n+z)  			74ASXX:GATE			OUT
10			G-  				74ASXX:GATE			OUT
11			C(n+y) 			74ASXX:GATE			OUT
12			C(n+x) 			74ASXX:GATE			OUT
13			Cn  				74ASXX:GATE			IN
14			G2- 				74ASXX:GATE			IN
15			P2- 				74ASXX:GATE			IN
16			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS194_DIP
[Model File]		PML.MOD
[Package Model]    DIP16
|
[Pin]		signal_name 	model_name  		direction
|
1			CLR  				74ASXX:GATE			IN
2			SHIFT_RT			74ASXX:GATE			IN
3			A 					74ASXX:GATE			IN
4			B 					74ASXX:GATE			IN
5			C 					74ASXX:GATE			IN
6			D 					74ASXX:GATE			IN
7			SHIFT_LEFT 		74ASXX:GATE			IN
8			GND  				GND  					NA
9			S0					74ASXX:GATE			IN
10			S1  				74ASXX:GATE			IN
11			CLK 				74ASXX:GATE			IN
12			QD  				74ASXX:GATE			OUT
13			QC  				74ASXX:GATE			OUT
14			QB  				74ASXX:GATE			OUT
15			QA  				74ASXX:GATE			OUT
16			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS194_SOIC
[Model File]		PML.MOD
[Package Model]    SOIC16
|
[Pin]		signal_name 	model_name  		direction
|
1			CLR  				74ASXX:GATE			IN
2			SHIFT_RT			74ASXX:GATE			IN
3			A 					74ASXX:GATE			IN
4			B 					74ASXX:GATE			IN
5			C 					74ASXX:GATE			IN
6			D 					74ASXX:GATE			IN
7			SHIFT_LEFT 		74ASXX:GATE			IN
8			GND  				GND  					NA
9			S0					74ASXX:GATE			IN
10			S1  				74ASXX:GATE			IN
11			CLK 				74ASXX:GATE			IN
12			QD  				74ASXX:GATE			OUT
13			QC  				74ASXX:GATE			OUT
14			QB  				74ASXX:GATE			OUT
15			QA  				74ASXX:GATE			OUT
16			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS194_SSOP
[Model File]		PML.MOD
[Package Model]    SSOP16
|
[Pin]		signal_name 	model_name  		direction
|
1			CLR  				74ASXX:GATE			IN
2			SHIFT_RT			74ASXX:GATE			IN
3			A 					74ASXX:GATE			IN
4			B 					74ASXX:GATE			IN
5			C 					74ASXX:GATE			IN
6			D 					74ASXX:GATE			IN
7			SHIFT_LEFT 		74ASXX:GATE			IN
8			GND  				GND  					NA
9			S0					74ASXX:GATE			IN
10			S1  				74ASXX:GATE			IN
11			CLK 				74ASXX:GATE			IN
12			QD  				74ASXX:GATE			OUT
13			QC  				74ASXX:GATE			OUT
14			QB  				74ASXX:GATE			OUT
15			QA  				74ASXX:GATE			OUT
16			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS195_DIP
[Model File]		PML.MOD
[Package Model]    DIP16
|
[Pin]		signal_name 	model_name  		direction
|
1			CLR  				74ASXX:GATE			IN
2			J 					74ASXX:GATE			IN
3			K-					74ASXX:GATE			IN
4			A 					74ASXX:GATE			IN
5			B 					74ASXX:GATE			IN
6			C 					74ASXX:GATE			IN
7			D 					74ASXX:GATE			IN
8			GND  				GND  					NA
9			SHIFT/LOAD 		74ASXX:GATE			IN
10			CLK 				74ASXX:GATE			IN
11			QD- 				74ASXX:GATE			OUT
12			QD  				74ASXX:GATE			OUT
13			QC  				74ASXX:GATE			OUT
14			QB  				74ASXX:GATE			OUT
15			QA  				74ASXX:GATE			OUT
16			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS195_SOIC
[Model File]		PML.MOD
[Package Model]    SOIC16
|
[Pin]		signal_name 	model_name  		direction
|
1			CLR  				74ASXX:GATE			IN
2			J 					74ASXX:GATE			IN
3			K-					74ASXX:GATE			IN
4			A 					74ASXX:GATE			IN
5			B 					74ASXX:GATE			IN
6			C 					74ASXX:GATE			IN
7			D 					74ASXX:GATE			IN
8			GND  				GND  					NA
9			SHIFT/LOAD 		74ASXX:GATE			IN
10			CLK 				74ASXX:GATE			IN
11			QD- 				74ASXX:GATE			OUT
12			QD  				74ASXX:GATE			OUT
13			QC  				74ASXX:GATE			OUT
14			QB  				74ASXX:GATE			OUT
15			QA  				74ASXX:GATE			OUT
16			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS195_SSOP
[Model File]		PML.MOD
[Package Model]    SSOP16
|
[Pin]		signal_name 	model_name  		direction
|
1			CLR  				74ASXX:GATE			IN
2			J 					74ASXX:GATE			IN
3			K-					74ASXX:GATE			IN
4			A 					74ASXX:GATE			IN
5			B 					74ASXX:GATE			IN
6			C 					74ASXX:GATE			IN
7			D 					74ASXX:GATE			IN
8			GND  				GND  					NA
9			SHIFT/LOAD 		74ASXX:GATE			IN
10			CLK 				74ASXX:GATE			IN
11			QD- 				74ASXX:GATE			OUT
12			QD  				74ASXX:GATE			OUT
13			QC  				74ASXX:GATE			OUT
14			QB  				74ASXX:GATE			OUT
15			QA  				74ASXX:GATE			OUT
16			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS230_DIP
[Model File]		PML.MOD
[Package Model]    DIP20
|
[Pin]		signal_name 	model_name  		direction
|
1			G1-  				74ASXX:GATE			IN
2			1A1  				74ASXX:GATE			IN
3			2Y4  				74ASXX:LINE-DRV  	ENBO
4			1A2  				74ASXX:GATE			IN
5			2Y3  				74ASXX:LINE-DRV  	ENBO
6			1A3  				74ASXX:GATE			IN
7			2Y2  				74ASXX:LINE-DRV  	ENBO
8			1A4  				74ASXX:GATE			IN
9			2Y1  				74ASXX:LINE-DRV  	ENBO
10			GND 				GND  					NA
11			2A1 				74ASXX:GATE			IN
12			1Y4 				74ASXX:LINE-DRV  	ENBO
13			2A2 				74ASXX:GATE			IN
14			1Y3 				74ASXX:LINE-DRV  	ENBO
15			2A3 				74ASXX:GATE			IN
16			1Y2 				74ASXX:LINE-DRV  	ENBO
17			2A4 				74ASXX:GATE			IN
18			1Y1 				74ASXX:LINE-DRV  	ENBO
19			G2- 				74ASXX:GATE			IN
20			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS230_SOIC
[Model File]		PML.MOD
[Package Model]    SOIC20
|
[Pin]		signal_name 	model_name  		direction
|
1			G1-  				74ASXX:GATE			IN
2			1A1  				74ASXX:GATE			IN
3			2Y4  				74ASXX:LINE-DRV  	ENBO
4			1A2  				74ASXX:GATE			IN
5			2Y3  				74ASXX:LINE-DRV  	ENBO
6			1A3  				74ASXX:GATE			IN
7			2Y2  				74ASXX:LINE-DRV  	ENBO
8			1A4  				74ASXX:GATE			IN
9			2Y1  				74ASXX:LINE-DRV  	ENBO
10			GND 				GND  					NA
11			2A1 				74ASXX:GATE			IN
12			1Y4 				74ASXX:LINE-DRV  	ENBO
13			2A2 				74ASXX:GATE			IN
14			1Y3 				74ASXX:LINE-DRV  	ENBO
15			2A3 				74ASXX:GATE			IN
16			1Y2 				74ASXX:LINE-DRV  	ENBO
17			2A4 				74ASXX:GATE			IN
18			1Y1 				74ASXX:LINE-DRV  	ENBO
19			G2- 				74ASXX:GATE			IN
20			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS230_SSOP
[Model File]		PML.MOD
[Package Model]    SSOP20
|
[Pin]		signal_name 	model_name  		direction
|
1			G1-  				74ASXX:GATE			IN
2			1A1  				74ASXX:GATE			IN
3			2Y4  				74ASXX:LINE-DRV  	ENBO
4			1A2  				74ASXX:GATE			IN
5			2Y3  				74ASXX:LINE-DRV  	ENBO
6			1A3  				74ASXX:GATE			IN
7			2Y2  				74ASXX:LINE-DRV  	ENBO
8			1A4  				74ASXX:GATE			IN
9			2Y1  				74ASXX:LINE-DRV  	ENBO
10			GND 				GND  					NA
11			2A1 				74ASXX:GATE			IN
12			1Y4 				74ASXX:LINE-DRV  	ENBO
13			2A2 				74ASXX:GATE			IN
14			1Y3 				74ASXX:LINE-DRV  	ENBO
15			2A3 				74ASXX:GATE			IN
16			1Y2 				74ASXX:LINE-DRV  	ENBO
17			2A4 				74ASXX:GATE			IN
18			1Y1 				74ASXX:LINE-DRV  	ENBO
19			G2- 				74ASXX:GATE			IN
20			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS230_TSSOP
[Model File]		PML.MOD
[Package Model]    TSSOP20
|
[Pin]		signal_name 	model_name  		direction
|
1			G1-  				74ASXX:GATE			IN
2			1A1  				74ASXX:GATE			IN
3			2Y4  				74ASXX:LINE-DRV  	ENBO
4			1A2  				74ASXX:GATE			IN
5			2Y3  				74ASXX:LINE-DRV  	ENBO
6			1A3  				74ASXX:GATE			IN
7			2Y2  				74ASXX:LINE-DRV  	ENBO
8			1A4  				74ASXX:GATE			IN
9			2Y1  				74ASXX:LINE-DRV  	ENBO
10			GND 				GND  					NA
11			2A1 				74ASXX:GATE			IN
12			1Y4 				74ASXX:LINE-DRV  	ENBO
13			2A2 				74ASXX:GATE			IN
14			1Y3 				74ASXX:LINE-DRV  	ENBO
15			2A3 				74ASXX:GATE			IN
16			1Y2 				74ASXX:LINE-DRV  	ENBO
17			2A4 				74ASXX:GATE			IN
18			1Y1 				74ASXX:LINE-DRV  	ENBO
19			G2- 				74ASXX:GATE			IN
20			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS231_DIP
[Model File]		PML.MOD
[Package Model]    DIP20
|
[Pin]		signal_name 	model_name  		direction
|
1			G1-  				74ASXX:GATE			IN
2			1A1  				74ASXX:GATE			IN
3			2Y4  				74ASXX:LINE-DRV  	ENBO
4			1A2  				74ASXX:GATE			IN
5			2Y3  				74ASXX:LINE-DRV  	ENBO
6			1A3  				74ASXX:GATE			IN
7			2Y2  				74ASXX:LINE-DRV  	ENBO
8			1A4  				74ASXX:GATE			IN
9			2Y1  				74ASXX:LINE-DRV  	ENBO
10			GND 				GND  					NA
11			2A1 				74ASXX:GATE			IN
12			1Y4 				74ASXX:LINE-DRV  	ENBO
13			2A2 				74ASXX:GATE			IN
14			1Y3 				74ASXX:LINE-DRV  	ENBO
15			2A3 				74ASXX:GATE			IN
16			1Y2 				74ASXX:LINE-DRV  	ENBO
17			2A4 				74ASXX:GATE			IN
18			1Y1 				74ASXX:LINE-DRV  	ENBO
19			G2  				74ASXX:GATE			IN
20			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS231_SOIC
[Model File]		PML.MOD
[Package Model]    SOIC20
|
[Pin]		signal_name 	model_name  		direction
|
1			G1-  				74ASXX:GATE			IN
2			1A1  				74ASXX:GATE			IN
3			2Y4  				74ASXX:LINE-DRV  	ENBO
4			1A2  				74ASXX:GATE			IN
5			2Y3  				74ASXX:LINE-DRV  	ENBO
6			1A3  				74ASXX:GATE			IN
7			2Y2  				74ASXX:LINE-DRV  	ENBO
8			1A4  				74ASXX:GATE			IN
9			2Y1  				74ASXX:LINE-DRV  	ENBO
10			GND 				GND  					NA
11			2A1 				74ASXX:GATE			IN
12			1Y4 				74ASXX:LINE-DRV  	ENBO
13			2A2 				74ASXX:GATE			IN
14			1Y3 				74ASXX:LINE-DRV  	ENBO
15			2A3 				74ASXX:GATE			IN
16			1Y2 				74ASXX:LINE-DRV  	ENBO
17			2A4 				74ASXX:GATE			IN
18			1Y1 				74ASXX:LINE-DRV  	ENBO
19			G2  				74ASXX:GATE			IN
20			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS231_SSOP
[Model File]		PML.MOD
[Package Model]    SSOP20
|
[Pin]		signal_name 	model_name  		direction
|
1			G1-  				74ASXX:GATE			IN
2			1A1  				74ASXX:GATE			IN
3			2Y4  				74ASXX:LINE-DRV  	ENBO
4			1A2  				74ASXX:GATE			IN
5			2Y3  				74ASXX:LINE-DRV  	ENBO
6			1A3  				74ASXX:GATE			IN
7			2Y2  				74ASXX:LINE-DRV  	ENBO
8			1A4  				74ASXX:GATE			IN
9			2Y1  				74ASXX:LINE-DRV  	ENBO
10			GND 				GND  					NA
11			2A1 				74ASXX:GATE			IN
12			1Y4 				74ASXX:LINE-DRV  	ENBO
13			2A2 				74ASXX:GATE			IN
14			1Y3 				74ASXX:LINE-DRV  	ENBO
15			2A3 				74ASXX:GATE			IN
16			1Y2 				74ASXX:LINE-DRV  	ENBO
17			2A4 				74ASXX:GATE			IN
18			1Y1 				74ASXX:LINE-DRV  	ENBO
19			G2  				74ASXX:GATE			IN
20			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS231_TSSOP
[Model File]		PML.MOD
[Package Model]    TSSOP20
|
[Pin]		signal_name 	model_name  		direction
|
1			G1-  				74ASXX:GATE			IN
2			1A1  				74ASXX:GATE			IN
3			2Y4  				74ASXX:LINE-DRV  	ENBO
4			1A2  				74ASXX:GATE			IN
5			2Y3  				74ASXX:LINE-DRV  	ENBO
6			1A3  				74ASXX:GATE			IN
7			2Y2  				74ASXX:LINE-DRV  	ENBO
8			1A4  				74ASXX:GATE			IN
9			2Y1  				74ASXX:LINE-DRV  	ENBO
10			GND 				GND  					NA
11			2A1 				74ASXX:GATE			IN
12			1Y4 				74ASXX:LINE-DRV  	ENBO
13			2A2 				74ASXX:GATE			IN
14			1Y3 				74ASXX:LINE-DRV  	ENBO
15			2A3 				74ASXX:GATE			IN
16			1Y2 				74ASXX:LINE-DRV  	ENBO
17			2A4 				74ASXX:GATE			IN
18			1Y1 				74ASXX:LINE-DRV  	ENBO
19			G2  				74ASXX:GATE			IN
20			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS240_DIP
[Model File]		PML.MOD
[Package Model]    DIP20
|
[Pin]		signal_name 	model_name  		direction
|
1			OE1- 				74ASXX:GATE			IN
2			1A1  				74ASXX:GATE			IN
3			2Y4  				74ASXX:LINE-DRV  	ENBO
4			1A2  				74ASXX:GATE			IN
5			2Y3  				74ASXX:LINE-DRV  	ENBO
6			1A3  				74ASXX:GATE			IN
7			2Y2  				74ASXX:LINE-DRV  	ENBO
8			1A4  				74ASXX:GATE			IN
9			2Y1  				74ASXX:LINE-DRV  	ENBO
10			GND 				GND  					NA
11			2A1 				74ASXX:GATE			IN
12			1Y4 				74ASXX:LINE-DRV  	ENBO
13			2A2 				74ASXX:GATE			IN
14			1Y3 				74ASXX:LINE-DRV  	ENBO
15			2A3 				74ASXX:GATE			IN
16			1Y2 				74ASXX:LINE-DRV  	ENBO
17			2A4 				74ASXX:GATE			IN
18			1Y1 				74ASXX:LINE-DRV  	ENBO
19			OE2-				74ASXX:GATE			IN
20			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS240_SOIC
[Model File]		PML.MOD
[Package Model]    SOIC20
|
[Pin]		signal_name 	model_name  		direction
|
1			OE1- 				74ASXX:GATE			IN
2			1A1  				74ASXX:GATE			IN
3			2Y4  				74ASXX:LINE-DRV  	ENBO
4			1A2  				74ASXX:GATE			IN
5			2Y3  				74ASXX:LINE-DRV  	ENBO
6			1A3  				74ASXX:GATE			IN
7			2Y2  				74ASXX:LINE-DRV  	ENBO
8			1A4  				74ASXX:GATE			IN
9			2Y1  				74ASXX:LINE-DRV  	ENBO
10			GND 				GND  					NA
11			2A1 				74ASXX:GATE			IN
12			1Y4 				74ASXX:LINE-DRV  	ENBO
13			2A2 				74ASXX:GATE			IN
14			1Y3 				74ASXX:LINE-DRV  	ENBO
15			2A3 				74ASXX:GATE			IN
16			1Y2 				74ASXX:LINE-DRV  	ENBO
17			2A4 				74ASXX:GATE			IN
18			1Y1 				74ASXX:LINE-DRV  	ENBO
19			OE2-				74ASXX:GATE			IN
20			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS240_SSOP
[Model File]		PML.MOD
[Package Model]    SSOP20
|
[Pin]		signal_name 	model_name  		direction
|
1			OE1- 				74ASXX:GATE			IN
2			1A1  				74ASXX:GATE			IN
3			2Y4  				74ASXX:LINE-DRV  	ENBO
4			1A2  				74ASXX:GATE			IN
5			2Y3  				74ASXX:LINE-DRV  	ENBO
6			1A3  				74ASXX:GATE			IN
7			2Y2  				74ASXX:LINE-DRV  	ENBO
8			1A4  				74ASXX:GATE			IN
9			2Y1  				74ASXX:LINE-DRV  	ENBO
10			GND 				GND  					NA
11			2A1 				74ASXX:GATE			IN
12			1Y4 				74ASXX:LINE-DRV  	ENBO
13			2A2 				74ASXX:GATE			IN
14			1Y3 				74ASXX:LINE-DRV  	ENBO
15			2A3 				74ASXX:GATE			IN
16			1Y2 				74ASXX:LINE-DRV  	ENBO
17			2A4 				74ASXX:GATE			IN
18			1Y1 				74ASXX:LINE-DRV  	ENBO
19			OE2-				74ASXX:GATE			IN
20			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS240_TSSOP
[Model File]		PML.MOD
[Package Model]    TSSOP20
|
[Pin]		signal_name 	model_name  		direction
|
1			OE1- 				74ASXX:GATE			IN
2			1A1  				74ASXX:GATE			IN
3			2Y4  				74ASXX:LINE-DRV  	ENBO
4			1A2  				74ASXX:GATE			IN
5			2Y3  				74ASXX:LINE-DRV  	ENBO
6			1A3  				74ASXX:GATE			IN
7			2Y2  				74ASXX:LINE-DRV  	ENBO
8			1A4  				74ASXX:GATE			IN
9			2Y1  				74ASXX:LINE-DRV  	ENBO
10			GND 				GND  					NA
11			2A1 				74ASXX:GATE			IN
12			1Y4 				74ASXX:LINE-DRV  	ENBO
13			2A2 				74ASXX:GATE			IN
14			1Y3 				74ASXX:LINE-DRV  	ENBO
15			2A3 				74ASXX:GATE			IN
16			1Y2 				74ASXX:LINE-DRV  	ENBO
17			2A4 				74ASXX:GATE			IN
18			1Y1 				74ASXX:LINE-DRV  	ENBO
19			OE2-				74ASXX:GATE			IN
20			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS241_DIP
[Model File]		PML.MOD
[Package Model]    DIP20
|
[Pin]		signal_name 	model_name  		direction
|
1			OE1- 				74ASXX:GATE			IN
2			1A1  				74ASXX:GATE			IN
3			2Y4  				74ASXX:LINE-DRV  	ENBO
4			1A2  				74ASXX:GATE			IN
5			2Y3  				74ASXX:LINE-DRV  	ENBO
6			1A3  				74ASXX:GATE			IN
7			2Y2  				74ASXX:LINE-DRV  	ENBO
8			1A4  				74ASXX:GATE			IN
9			2Y1  				74ASXX:LINE-DRV  	ENBO
10			GND 				GND  					NA
11			2A1 				74ASXX:GATE			IN
12			1Y4 				74ASXX:LINE-DRV  	ENBO
13			2A2 				74ASXX:GATE			IN
14			1Y3 				74ASXX:LINE-DRV  	ENBO
15			2A3 				74ASXX:GATE			IN
16			1Y2 				74ASXX:LINE-DRV  	ENBO
17			2A4 				74ASXX:GATE			IN
18			1Y1 				74ASXX:LINE-DRV  	ENBO
19			OE2 				74ASXX:GATE			IN
20			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS241_SOIC
[Model File]		PML.MOD
[Package Model]    SOIC20
|
[Pin]		signal_name 	model_name  		direction
|
1			OE1- 				74ASXX:GATE			IN
2			1A1  				74ASXX:GATE			IN
3			2Y4  				74ASXX:LINE-DRV  	ENBO
4			1A2  				74ASXX:GATE			IN
5			2Y3  				74ASXX:LINE-DRV  	ENBO
6			1A3  				74ASXX:GATE			IN
7			2Y2  				74ASXX:LINE-DRV  	ENBO
8			1A4  				74ASXX:GATE			IN
9			2Y1  				74ASXX:LINE-DRV  	ENBO
10			GND 				GND  					NA
11			2A1 				74ASXX:GATE			IN
12			1Y4 				74ASXX:LINE-DRV  	ENBO
13			2A2 				74ASXX:GATE			IN
14			1Y3 				74ASXX:LINE-DRV  	ENBO
15			2A3 				74ASXX:GATE			IN
16			1Y2 				74ASXX:LINE-DRV  	ENBO
17			2A4 				74ASXX:GATE			IN
18			1Y1 				74ASXX:LINE-DRV  	ENBO
19			OE2 				74ASXX:GATE			IN
20			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS241_SSOP
[Model File]		PML.MOD
[Package Model]    SSOP20
|
[Pin]		signal_name 	model_name  		direction
|
1			OE1- 				74ASXX:GATE			IN
2			1A1  				74ASXX:GATE			IN
3			2Y4  				74ASXX:LINE-DRV  	ENBO
4			1A2  				74ASXX:GATE			IN
5			2Y3  				74ASXX:LINE-DRV  	ENBO
6			1A3  				74ASXX:GATE			IN
7			2Y2  				74ASXX:LINE-DRV  	ENBO
8			1A4  				74ASXX:GATE			IN
9			2Y1  				74ASXX:LINE-DRV  	ENBO
10			GND 				GND  					NA
11			2A1 				74ASXX:GATE			IN
12			1Y4 				74ASXX:LINE-DRV  	ENBO
13			2A2 				74ASXX:GATE			IN
14			1Y3 				74ASXX:LINE-DRV  	ENBO
15			2A3 				74ASXX:GATE			IN
16			1Y2 				74ASXX:LINE-DRV  	ENBO
17			2A4 				74ASXX:GATE			IN
18			1Y1 				74ASXX:LINE-DRV  	ENBO
19			OE2 				74ASXX:GATE			IN
20			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS241_TSSOP
[Model File]		PML.MOD
[Package Model]    TSSOP20
|
[Pin]		signal_name 	model_name  		direction
|
1			OE1- 				74ASXX:GATE			IN
2			1A1  				74ASXX:GATE			IN
3			2Y4  				74ASXX:LINE-DRV  	ENBO
4			1A2  				74ASXX:GATE			IN
5			2Y3  				74ASXX:LINE-DRV  	ENBO
6			1A3  				74ASXX:GATE			IN
7			2Y2  				74ASXX:LINE-DRV  	ENBO
8			1A4  				74ASXX:GATE			IN
9			2Y1  				74ASXX:LINE-DRV  	ENBO
10			GND 				GND  					NA
11			2A1 				74ASXX:GATE			IN
12			1Y4 				74ASXX:LINE-DRV  	ENBO
13			2A2 				74ASXX:GATE			IN
14			1Y3 				74ASXX:LINE-DRV  	ENBO
15			2A3 				74ASXX:GATE			IN
16			1Y2 				74ASXX:LINE-DRV  	ENBO
17			2A4 				74ASXX:GATE			IN
18			1Y1 				74ASXX:LINE-DRV  	ENBO
19			OE2 				74ASXX:GATE			IN
20			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS242_DIP
[Model File]		PML.MOD
[Package Model]    DIP14
|
[Pin]		signal_name 	model_name  		direction
|
1			GAB- 				74ASXX:GATE			IN
2			NC					NC						NA
3			A1					74ASXX:LINE-DRV  	BIDIR
4			A2					74ASXX:LINE-DRV  	BIDIR
5			A3					74ASXX:LINE-DRV  	BIDIR
6			A4					74ASXX:LINE-DRV  	BIDIR
7			GND  				GND  					NA
8			B4					74ASXX:LINE-DRV  	BIDIR
9			B3					74ASXX:LINE-DRV  	BIDIR
10			B2  				74ASXX:LINE-DRV  	BIDIR
11			B1  				74ASXX:LINE-DRV  	BIDIR
12			NC  				NC						NA
13			GBA 				74ASXX:GATE			IN
14			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS242_SOIC
[Model File]		PML.MOD
[Package Model]    SOIC14
|
[Pin]		signal_name 	model_name  		direction
|
1			GAB- 				74ASXX:GATE			IN
2			NC					NC						NA
3			A1					74ASXX:LINE-DRV  	BIDIR
4			A2					74ASXX:LINE-DRV  	BIDIR
5			A3					74ASXX:LINE-DRV  	BIDIR
6			A4					74ASXX:LINE-DRV  	BIDIR
7			GND  				GND  					NA
8			B4					74ASXX:LINE-DRV  	BIDIR
9			B3					74ASXX:LINE-DRV  	BIDIR
10			B2  				74ASXX:LINE-DRV  	BIDIR
11			B1  				74ASXX:LINE-DRV  	BIDIR
12			NC  				NC						NA
13			GBA 				74ASXX:GATE			IN
14			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS242_SSOP
[Model File]		PML.MOD
[Package Model]    SSOP14
|
[Pin]		signal_name 	model_name  		direction
|
1			GAB- 				74ASXX:GATE			IN
2			NC					NC						NA
3			A1					74ASXX:LINE-DRV  	BIDIR
4			A2					74ASXX:LINE-DRV  	BIDIR
5			A3					74ASXX:LINE-DRV  	BIDIR
6			A4					74ASXX:LINE-DRV  	BIDIR
7			GND  				GND  					NA
8			B4					74ASXX:LINE-DRV  	BIDIR
9			B3					74ASXX:LINE-DRV  	BIDIR
10			B2  				74ASXX:LINE-DRV  	BIDIR
11			B1  				74ASXX:LINE-DRV  	BIDIR
12			NC  				NC						NA
13			GBA 				74ASXX:GATE			IN
14			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS242_TSSOP
[Model File]		PML.MOD
[Package Model]    TSSOP14
|
[Pin]		signal_name 	model_name  		direction
|
1			GAB- 				74ASXX:GATE			IN
2			NC					NC						NA
3			A1					74ASXX:LINE-DRV  	BIDIR
4			A2					74ASXX:LINE-DRV  	BIDIR
5			A3					74ASXX:LINE-DRV  	BIDIR
6			A4					74ASXX:LINE-DRV  	BIDIR
7			GND  				GND  					NA
8			B4					74ASXX:LINE-DRV  	BIDIR
9			B3					74ASXX:LINE-DRV  	BIDIR
10			B2  				74ASXX:LINE-DRV  	BIDIR
11			B1  				74ASXX:LINE-DRV  	BIDIR
12			NC  				NC						NA
13			GBA 				74ASXX:GATE			IN
14			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS243_DIP
[Model File]		PML.MOD
[Package Model]    DIP14
|
[Pin]		signal_name 	model_name  		direction
|
1			GAB- 				74ASXX:GATE			IN
2			NC					NC						NA
3			A1					74ASXX:LINE-DRV  	BIDIR
4			A2					74ASXX:LINE-DRV  	BIDIR
5			A3					74ASXX:LINE-DRV  	BIDIR
6			A4					74ASXX:LINE-DRV  	BIDIR
7			GND  				GND  					NA
8			B4					74ASXX:LINE-DRV  	BIDIR
9			B3					74ASXX:LINE-DRV  	BIDIR
10			B2  				74ASXX:LINE-DRV  	BIDIR
11			B1  				74ASXX:LINE-DRV  	BIDIR
12			NC  				NC						NA
13			GBA 				74ASXX:GATE			IN
14			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS243_SOIC
[Model File]		PML.MOD
[Package Model]    SOIC14
|
[Pin]		signal_name 	model_name  		direction
|
1			GAB- 				74ASXX:GATE			IN
2			NC					NC						NA
3			A1					74ASXX:LINE-DRV  	BIDIR
4			A2					74ASXX:LINE-DRV  	BIDIR
5			A3					74ASXX:LINE-DRV  	BIDIR
6			A4					74ASXX:LINE-DRV  	BIDIR
7			GND  				GND  					NA
8			B4					74ASXX:LINE-DRV  	BIDIR
9			B3					74ASXX:LINE-DRV  	BIDIR
10			B2  				74ASXX:LINE-DRV  	BIDIR
11			B1  				74ASXX:LINE-DRV  	BIDIR
12			NC  				NC						NA
13			GBA 				74ASXX:GATE			IN
14			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS243_SSOP
[Model File]		PML.MOD
[Package Model]    SSOP14
|
[Pin]		signal_name 	model_name  		direction
|
1			GAB- 				74ASXX:GATE			IN
2			NC					NC						NA
3			A1					74ASXX:LINE-DRV  	BIDIR
4			A2					74ASXX:LINE-DRV  	BIDIR
5			A3					74ASXX:LINE-DRV  	BIDIR
6			A4					74ASXX:LINE-DRV  	BIDIR
7			GND  				GND  					NA
8			B4					74ASXX:LINE-DRV  	BIDIR
9			B3					74ASXX:LINE-DRV  	BIDIR
10			B2  				74ASXX:LINE-DRV  	BIDIR
11			B1  				74ASXX:LINE-DRV  	BIDIR
12			NC  				NC						NA
13			GBA 				74ASXX:GATE			IN
14			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS243_TSSOP
[Model File]		PML.MOD
[Package Model]    TSSOP14
|
[Pin]		signal_name 	model_name  		direction
|
1			GAB- 				74ASXX:GATE			IN
2			NC					NC						NA
3			A1					74ASXX:LINE-DRV  	BIDIR
4			A2					74ASXX:LINE-DRV  	BIDIR
5			A3					74ASXX:LINE-DRV  	BIDIR
6			A4					74ASXX:LINE-DRV  	BIDIR
7			GND  				GND  					NA
8			B4					74ASXX:LINE-DRV  	BIDIR
9			B3					74ASXX:LINE-DRV  	BIDIR
10			B2  				74ASXX:LINE-DRV  	BIDIR
11			B1  				74ASXX:LINE-DRV  	BIDIR
12			NC  				NC						NA
13			GBA 				74ASXX:GATE			IN
14			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS244_DIP
[Model File]		PML.MOD
[Package Model]    DIP20
|
[Pin]		signal_name 	model_name  		direction
|
1			OE1- 				74ASXX:GATE			IN
2			1A1  				74ASXX:GATE			IN
3			2Y4  				74ASXX:LINE-DRV  	ENBO
4			1A2  				74ASXX:GATE			IN
5			2Y3  				74ASXX:LINE-DRV  	ENBO
6			1A3  				74ASXX:GATE			IN
7			2Y2  				74ASXX:LINE-DRV  	ENBO
8			1A4  				74ASXX:GATE			IN
9			2Y1  				74ASXX:LINE-DRV  	ENBO
10			GND 				GND  					NA
11			2A1 				74ASXX:GATE			IN
12			1Y4 				74ASXX:LINE-DRV  	ENBO
13			2A2 				74ASXX:GATE			IN
14			1Y3 				74ASXX:LINE-DRV  	ENBO
15			2A3 				74ASXX:GATE			IN
16			1Y2 				74ASXX:LINE-DRV  	ENBO
17			2A4 				74ASXX:GATE			IN
18			1Y1 				74ASXX:LINE-DRV  	ENBO
19			OE2-				74ASXX:GATE			IN
20			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS244_SOIC
[Model File]		PML.MOD
[Package Model]    SOIC20
|
[Pin]		signal_name 	model_name  		direction
|
1			OE1- 				74ASXX:GATE			IN
2			1A1  				74ASXX:GATE			IN
3			2Y4  				74ASXX:LINE-DRV  	ENBO
4			1A2  				74ASXX:GATE			IN
5			2Y3  				74ASXX:LINE-DRV  	ENBO
6			1A3  				74ASXX:GATE			IN
7			2Y2  				74ASXX:LINE-DRV  	ENBO
8			1A4  				74ASXX:GATE			IN
9			2Y1  				74ASXX:LINE-DRV  	ENBO
10			GND 				GND  					NA
11			2A1 				74ASXX:GATE			IN
12			1Y4 				74ASXX:LINE-DRV  	ENBO
13			2A2 				74ASXX:GATE			IN
14			1Y3 				74ASXX:LINE-DRV  	ENBO
15			2A3 				74ASXX:GATE			IN
16			1Y2 				74ASXX:LINE-DRV  	ENBO
17			2A4 				74ASXX:GATE			IN
18			1Y1 				74ASXX:LINE-DRV  	ENBO
19			OE2-				74ASXX:GATE			IN
20			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS244_SSOP
[Model File]		PML.MOD
[Package Model]    SSOP20
|
[Pin]		signal_name 	model_name  		direction
|
1			OE1- 				74ASXX:GATE			IN
2			1A1  				74ASXX:GATE			IN
3			2Y4  				74ASXX:LINE-DRV  	ENBO
4			1A2  				74ASXX:GATE			IN
5			2Y3  				74ASXX:LINE-DRV  	ENBO
6			1A3  				74ASXX:GATE			IN
7			2Y2  				74ASXX:LINE-DRV  	ENBO
8			1A4  				74ASXX:GATE			IN
9			2Y1  				74ASXX:LINE-DRV  	ENBO
10			GND 				GND  					NA
11			2A1 				74ASXX:GATE			IN
12			1Y4 				74ASXX:LINE-DRV  	ENBO
13			2A2 				74ASXX:GATE			IN
14			1Y3 				74ASXX:LINE-DRV  	ENBO
15			2A3 				74ASXX:GATE			IN
16			1Y2 				74ASXX:LINE-DRV  	ENBO
17			2A4 				74ASXX:GATE			IN
18			1Y1 				74ASXX:LINE-DRV  	ENBO
19			OE2-				74ASXX:GATE			IN
20			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS244_TSSOP
[Model File]		PML.MOD
[Package Model]    TSSOP20
|
[Pin]		signal_name 	model_name  		direction
|
1			OE1- 				74ASXX:GATE			IN
2			1A1  				74ASXX:GATE			IN
3			2Y4  				74ASXX:LINE-DRV  	ENBO
4			1A2  				74ASXX:GATE			IN
5			2Y3  				74ASXX:LINE-DRV  	ENBO
6			1A3  				74ASXX:GATE			IN
7			2Y2  				74ASXX:LINE-DRV  	ENBO
8			1A4  				74ASXX:GATE			IN
9			2Y1  				74ASXX:LINE-DRV  	ENBO
10			GND 				GND  					NA
11			2A1 				74ASXX:GATE			IN
12			1Y4 				74ASXX:LINE-DRV  	ENBO
13			2A2 				74ASXX:GATE			IN
14			1Y3 				74ASXX:LINE-DRV  	ENBO
15			2A3 				74ASXX:GATE			IN
16			1Y2 				74ASXX:LINE-DRV  	ENBO
17			2A4 				74ASXX:GATE			IN
18			1Y1 				74ASXX:LINE-DRV  	ENBO
19			OE2-				74ASXX:GATE			IN
20			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS245_DIP
[Model File]		PML.MOD
[Package Model]    DIP20
|
[Pin]		signal_name 	model_name  		direction
|
1			T/R- 				74ASXX:GATE			IN
2			A1					74ASXX:LINE-DRV  	BIDIR
3			A2					74ASXX:LINE-DRV  	BIDIR
4			A3					74ASXX:LINE-DRV  	BIDIR
5			A4					74ASXX:LINE-DRV  	BIDIR
6			A5					74ASXX:LINE-DRV  	BIDIR
7			A6					74ASXX:LINE-DRV  	BIDIR
8			A7					74ASXX:LINE-DRV  	BIDIR
9			A8					74ASXX:LINE-DRV  	BIDIR
10			GND 				GND  					NA
11			B8  				74ASXX:LINE-DRV  	BIDIR
12			B7  				74ASXX:LINE-DRV  	BIDIR
13			B6  				74ASXX:LINE-DRV  	BIDIR
14			B5  				74ASXX:LINE-DRV  	BIDIR
15			B4  				74ASXX:LINE-DRV  	BIDIR
16			B3  				74ASXX:LINE-DRV  	BIDIR
17			B2  				74ASXX:LINE-DRV  	BIDIR
18			B1  				74ASXX:LINE-DRV  	BIDIR
19			OE- 				74ASXX:GATE			IN
20			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS245_SOIC
[Model File]		PML.MOD
[Package Model]    SOIC20
|
[Pin]		signal_name 	model_name  		direction
|
1			T/R- 				74ASXX:GATE			IN
2			A1					74ASXX:LINE-DRV  	BIDIR
3			A2					74ASXX:LINE-DRV  	BIDIR
4			A3					74ASXX:LINE-DRV  	BIDIR
5			A4					74ASXX:LINE-DRV  	BIDIR
6			A5					74ASXX:LINE-DRV  	BIDIR
7			A6					74ASXX:LINE-DRV  	BIDIR
8			A7					74ASXX:LINE-DRV  	BIDIR
9			A8					74ASXX:LINE-DRV  	BIDIR
10			GND 				GND  					NA
11			B8  				74ASXX:LINE-DRV  	BIDIR
12			B7  				74ASXX:LINE-DRV  	BIDIR
13			B6  				74ASXX:LINE-DRV  	BIDIR
14			B5  				74ASXX:LINE-DRV  	BIDIR
15			B4  				74ASXX:LINE-DRV  	BIDIR
16			B3  				74ASXX:LINE-DRV  	BIDIR
17			B2  				74ASXX:LINE-DRV  	BIDIR
18			B1  				74ASXX:LINE-DRV  	BIDIR
19			OE- 				74ASXX:GATE			IN
20			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS245_SSOP
[Model File]		PML.MOD
[Package Model]    SSOP20
|
[Pin]		signal_name 	model_name  		direction
|
1			T/R- 				74ASXX:GATE			IN
2			A1					74ASXX:LINE-DRV  	BIDIR
3			A2					74ASXX:LINE-DRV  	BIDIR
4			A3					74ASXX:LINE-DRV  	BIDIR
5			A4					74ASXX:LINE-DRV  	BIDIR
6			A5					74ASXX:LINE-DRV  	BIDIR
7			A6					74ASXX:LINE-DRV  	BIDIR
8			A7					74ASXX:LINE-DRV  	BIDIR
9			A8					74ASXX:LINE-DRV  	BIDIR
10			GND 				GND  					NA
11			B8  				74ASXX:LINE-DRV  	BIDIR
12			B7  				74ASXX:LINE-DRV  	BIDIR
13			B6  				74ASXX:LINE-DRV  	BIDIR
14			B5  				74ASXX:LINE-DRV  	BIDIR
15			B4  				74ASXX:LINE-DRV  	BIDIR
16			B3  				74ASXX:LINE-DRV  	BIDIR
17			B2  				74ASXX:LINE-DRV  	BIDIR
18			B1  				74ASXX:LINE-DRV  	BIDIR
19			OE- 				74ASXX:GATE			IN
20			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS245_TSSOP
[Model File]		PML.MOD
[Package Model]    TSSOP20
|
[Pin]		signal_name 	model_name  		direction
|
1			T/R- 				74ASXX:GATE			IN
2			A1					74ASXX:LINE-DRV  	BIDIR
3			A2					74ASXX:LINE-DRV  	BIDIR
4			A3					74ASXX:LINE-DRV  	BIDIR
5			A4					74ASXX:LINE-DRV  	BIDIR
6			A5					74ASXX:LINE-DRV  	BIDIR
7			A6					74ASXX:LINE-DRV  	BIDIR
8			A7					74ASXX:LINE-DRV  	BIDIR
9			A8					74ASXX:LINE-DRV  	BIDIR
10			GND 				GND  					NA
11			B8  				74ASXX:LINE-DRV  	BIDIR
12			B7  				74ASXX:LINE-DRV  	BIDIR
13			B6  				74ASXX:LINE-DRV  	BIDIR
14			B5  				74ASXX:LINE-DRV  	BIDIR
15			B4  				74ASXX:LINE-DRV  	BIDIR
16			B3  				74ASXX:LINE-DRV  	BIDIR
17			B2  				74ASXX:LINE-DRV  	BIDIR
18			B1  				74ASXX:LINE-DRV  	BIDIR
19			OE- 				74ASXX:GATE			IN
20			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS250_DIP
[Model File]		PML.MOD
[Package Model]    DIP24
|
[Pin]		signal_name 	model_name  		direction
|
1			E7					74ASXX:GATE			IN
2			E6					74ASXX:GATE			IN
3			E5					74ASXX:GATE			IN
4			E4					74ASXX:GATE			IN
5			E3					74ASXX:GATE			IN
6			E2					74ASXX:GATE			IN
7			E1					74ASXX:GATE			IN
8			E0					74ASXX:GATE			IN
9			G-					74ASXX:GATE			IN
10			W-  				74ASXX:OPEN-COL  	ENBO
11			D					74ASXX:GATE			IN
12			GND 				GND  					NA
13			C					74ASXX:GATE			IN
14			B					74ASXX:GATE			IN
15			A					74ASXX:GATE			IN
16			E15 				74ASXX:GATE			IN
17			E14 				74ASXX:GATE			IN
18			E13 				74ASXX:GATE			IN
19			E12 				74ASXX:GATE			IN
20			E11 				74ASXX:GATE			IN
21			E10 				74ASXX:GATE			IN
22			E9  				74ASXX:GATE			IN
23			E8  				74ASXX:GATE			IN
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS250_SOIC
[Model File]		PML.MOD
[Package Model]    SOIC24
|
[Pin]		signal_name 	model_name  		direction
|
1			E7					74ASXX:GATE			IN
2			E6					74ASXX:GATE			IN
3			E5					74ASXX:GATE			IN
4			E4					74ASXX:GATE			IN
5			E3					74ASXX:GATE			IN
6			E2					74ASXX:GATE			IN
7			E1					74ASXX:GATE			IN
8			E0					74ASXX:GATE			IN
9			G-					74ASXX:GATE			IN
10			W-  				74ASXX:OPEN-COL  	ENBO
11			D					74ASXX:GATE			IN
12			GND 				GND  					NA
13			C					74ASXX:GATE			IN
14			B					74ASXX:GATE			IN
15			A					74ASXX:GATE			IN
16			E15 				74ASXX:GATE			IN
17			E14 				74ASXX:GATE			IN
18			E13 				74ASXX:GATE			IN
19			E12 				74ASXX:GATE			IN
20			E11 				74ASXX:GATE			IN
21			E10 				74ASXX:GATE			IN
22			E9  				74ASXX:GATE			IN
23			E8  				74ASXX:GATE			IN
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS250_SSOP
[Model File]		PML.MOD
[Package Model]    SSOP24
|
[Pin]		signal_name 	model_name  		direction
|
1			E7					74ASXX:GATE			IN
2			E6					74ASXX:GATE			IN
3			E5					74ASXX:GATE			IN
4			E4					74ASXX:GATE			IN
5			E3					74ASXX:GATE			IN
6			E2					74ASXX:GATE			IN
7			E1					74ASXX:GATE			IN
8			E0					74ASXX:GATE			IN
9			G-					74ASXX:GATE			IN
10			W-  				74ASXX:OPEN-COL  	ENBO
11			D					74ASXX:GATE			IN
12			GND 				GND  					NA
13			C					74ASXX:GATE			IN
14			B					74ASXX:GATE			IN
15			A					74ASXX:GATE			IN
16			E15 				74ASXX:GATE			IN
17			E14 				74ASXX:GATE			IN
18			E13 				74ASXX:GATE			IN
19			E12 				74ASXX:GATE			IN
20			E11 				74ASXX:GATE			IN
21			E10 				74ASXX:GATE			IN
22			E9  				74ASXX:GATE			IN
23			E8  				74ASXX:GATE			IN
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS250_TSSOP
[Model File]		PML.MOD
[Package Model]    TSSOP24
|
[Pin]		signal_name 	model_name  		direction
|
1			E7					74ASXX:GATE			IN
2			E6					74ASXX:GATE			IN
3			E5					74ASXX:GATE			IN
4			E4					74ASXX:GATE			IN
5			E3					74ASXX:GATE			IN
6			E2					74ASXX:GATE			IN
7			E1					74ASXX:GATE			IN
8			E0					74ASXX:GATE			IN
9			G-					74ASXX:GATE			IN
10			W-  				74ASXX:OPEN-COL  	ENBO
11			D					74ASXX:GATE			IN
12			GND 				GND  					NA
13			C					74ASXX:GATE			IN
14			B					74ASXX:GATE			IN
15			A					74ASXX:GATE			IN
16			E15 				74ASXX:GATE			IN
17			E14 				74ASXX:GATE			IN
18			E13 				74ASXX:GATE			IN
19			E12 				74ASXX:GATE			IN
20			E11 				74ASXX:GATE			IN
21			E10 				74ASXX:GATE			IN
22			E9  				74ASXX:GATE			IN
23			E8  				74ASXX:GATE			IN
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS251_DIP
[Model File]		PML.MOD
[Package Model]    DIP16
|
[Pin]		signal_name 	model_name  		direction
|
1			D3					74ASXX:GATE			IN
2			D2					74ASXX:GATE			IN
3			D1					74ASXX:GATE			IN
4			D0					74ASXX:GATE			IN
5			Y 					74ASXX:GATE			ENBO
6			W 					74ASXX:GATE			ENBO
7			STROBE(G-) 		74ASXX:GATE			IN
8			GND  				GND  					NA
9			C 					74ASXX:GATE			IN
10			B					74ASXX:GATE			IN
11			A					74ASXX:GATE			IN
12			D7  				74ASXX:GATE			IN
13			D6  				74ASXX:GATE			IN
14			D5  				74ASXX:GATE			IN
15			D4  				74ASXX:GATE			IN
16			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS251_SOIC
[Model File]		PML.MOD
[Package Model]    SOIC16
|
[Pin]		signal_name 	model_name  		direction
|
1			D3					74ASXX:GATE			IN
2			D2					74ASXX:GATE			IN
3			D1					74ASXX:GATE			IN
4			D0					74ASXX:GATE			IN
5			Y 					74ASXX:GATE			ENBO
6			W 					74ASXX:GATE			ENBO
7			STROBE(G-) 		74ASXX:GATE			IN
8			GND  				GND  					NA
9			C 					74ASXX:GATE			IN
10			B					74ASXX:GATE			IN
11			A					74ASXX:GATE			IN
12			D7  				74ASXX:GATE			IN
13			D6  				74ASXX:GATE			IN
14			D5  				74ASXX:GATE			IN
15			D4  				74ASXX:GATE			IN
16			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS251_SSOP
[Model File]		PML.MOD
[Package Model]    SSOP16
|
[Pin]		signal_name 	model_name  		direction
|
1			D3					74ASXX:GATE			IN
2			D2					74ASXX:GATE			IN
3			D1					74ASXX:GATE			IN
4			D0					74ASXX:GATE			IN
5			Y 					74ASXX:GATE			ENBO
6			W 					74ASXX:GATE			ENBO
7			STROBE(G-) 		74ASXX:GATE			IN
8			GND  				GND  					NA
9			C 					74ASXX:GATE			IN
10			B					74ASXX:GATE			IN
11			A					74ASXX:GATE			IN
12			D7  				74ASXX:GATE			IN
13			D6  				74ASXX:GATE			IN
14			D5  				74ASXX:GATE			IN
15			D4  				74ASXX:GATE			IN
16			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS253_DIP
[Model File]		PML.MOD
[Package Model]    DIP16
|
[Pin]		signal_name 	model_name  		direction
|
1			G1-  				74ASXX:GATE			IN
2			B_SEL				74ASXX:GATE			IN
3			1C3  				74ASXX:GATE			IN
4			1C2  				74ASXX:GATE			IN
5			1C1  				74ASXX:GATE			IN
6			1C0  				74ASXX:GATE			IN
7			Y1					74ASXX:GATE			ENBO
8			GND  				GND  					NA
9			Y2					74ASXX:GATE			ENBO
10			2C0 				74ASXX:GATE			IN
11			2C1 				74ASXX:GATE			IN
12			2C2 				74ASXX:GATE			IN
13			2C3 				74ASXX:GATE			IN
14			A_SEL  			74ASXX:GATE			IN
15			G2- 				74ASXX:GATE			IN
16			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS253_SOIC
[Model File]		PML.MOD
[Package Model]    SOIC16
|
[Pin]		signal_name 	model_name  		direction
|
1			G1-  				74ASXX:GATE			IN
2			B_SEL				74ASXX:GATE			IN
3			1C3  				74ASXX:GATE			IN
4			1C2  				74ASXX:GATE			IN
5			1C1  				74ASXX:GATE			IN
6			1C0  				74ASXX:GATE			IN
7			Y1					74ASXX:GATE			ENBO
8			GND  				GND  					NA
9			Y2					74ASXX:GATE			ENBO
10			2C0 				74ASXX:GATE			IN
11			2C1 				74ASXX:GATE			IN
12			2C2 				74ASXX:GATE			IN
13			2C3 				74ASXX:GATE			IN
14			A_SEL  			74ASXX:GATE			IN
15			G2- 				74ASXX:GATE			IN
16			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS253_SSOP
[Model File]		PML.MOD
[Package Model]    SSOP16
|
[Pin]		signal_name 	model_name  		direction
|
1			G1-  				74ASXX:GATE			IN
2			B_SEL				74ASXX:GATE			IN
3			1C3  				74ASXX:GATE			IN
4			1C2  				74ASXX:GATE			IN
5			1C1  				74ASXX:GATE			IN
6			1C0  				74ASXX:GATE			IN
7			Y1					74ASXX:GATE			ENBO
8			GND  				GND  					NA
9			Y2					74ASXX:GATE			ENBO
10			2C0 				74ASXX:GATE			IN
11			2C1 				74ASXX:GATE			IN
12			2C2 				74ASXX:GATE			IN
13			2C3 				74ASXX:GATE			IN
14			A_SEL  			74ASXX:GATE			IN
15			G2- 				74ASXX:GATE			IN
16			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS257_DIP
[Model File]		PML.MOD
[Package Model]    DIP16
|
[Pin]		signal_name 	model_name  		direction
|
1			SELECT(A-/B)  	74ASXX:GATE			IN
2			A1					74ASXX:GATE			IN
3			B1					74ASXX:GATE			IN
4			Y1					74ASXX:GATE			ENBO
5			A2					74ASXX:GATE			IN
6			B2					74ASXX:GATE			IN
7			Y2					74ASXX:GATE			ENBO
8			GND  				GND  					NA
9			Y3					74ASXX:GATE			ENBO
10			B3  				74ASXX:GATE			IN
11			A3  				74ASXX:GATE			IN
12			Y4  				74ASXX:GATE			ENBO
13			B4  				74ASXX:GATE			IN
14			A4  				74ASXX:GATE			IN
15			OUT_CTRL(G-) 	74ASXX:GATE			IN
16			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS257_SOIC
[Model File]		PML.MOD
[Package Model]    SOIC16
|
[Pin]		signal_name 	model_name  		direction
|
1			SELECT(A-/B)  	74ASXX:GATE			IN
2			A1					74ASXX:GATE			IN
3			B1					74ASXX:GATE			IN
4			Y1					74ASXX:GATE			ENBO
5			A2					74ASXX:GATE			IN
6			B2					74ASXX:GATE			IN
7			Y2					74ASXX:GATE			ENBO
8			GND  				GND  					NA
9			Y3					74ASXX:GATE			ENBO
10			B3  				74ASXX:GATE			IN
11			A3  				74ASXX:GATE			IN
12			Y4  				74ASXX:GATE			ENBO
13			B4  				74ASXX:GATE			IN
14			A4  				74ASXX:GATE			IN
15			OUT_CTRL(G-) 	74ASXX:GATE			IN
16			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS257_SSOP
[Model File]		PML.MOD
[Package Model]    SSOP16
|
[Pin]		signal_name 	model_name  		direction
|
1			SELECT(A-/B)  	74ASXX:GATE			IN
2			A1					74ASXX:GATE			IN
3			B1					74ASXX:GATE			IN
4			Y1					74ASXX:GATE			ENBO
5			A2					74ASXX:GATE			IN
6			B2					74ASXX:GATE			IN
7			Y2					74ASXX:GATE			ENBO
8			GND  				GND  					NA
9			Y3					74ASXX:GATE			ENBO
10			B3  				74ASXX:GATE			IN
11			A3  				74ASXX:GATE			IN
12			Y4  				74ASXX:GATE			ENBO
13			B4  				74ASXX:GATE			IN
14			A4  				74ASXX:GATE			IN
15			OUT_CTRL(G-) 	74ASXX:GATE			IN
16			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS258_DIP
[Model File]		PML.MOD
[Package Model]    DIP16
|
[Pin]		signal_name 	model_name  		direction
|
1			SELECT(A-/B)  	74ASXX:GATE			IN
2			A1					74ASXX:GATE			IN
3			B1					74ASXX:GATE			IN
4			Y1-  				74ASXX:GATE			ENBO
5			A2					74ASXX:GATE			IN
6			B2					74ASXX:GATE			IN
7			Y2-  				74ASXX:GATE			ENBO
8			GND  				GND  					NA
9			Y3-  				74ASXX:GATE			ENBO
10			B3  				74ASXX:GATE			IN
11			A3  				74ASXX:GATE			IN
12			Y4- 				74ASXX:GATE			ENBO
13			B4  				74ASXX:GATE			IN
14			A4  				74ASXX:GATE			IN
15			OUT_CTRL(G-) 	74ASXX:GATE			IN
16			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS258_SOIC
[Model File]		PML.MOD
[Package Model]    SOIC16
|
[Pin]		signal_name 	model_name  		direction
|
1			SELECT(A-/B)  	74ASXX:GATE			IN
2			A1					74ASXX:GATE			IN
3			B1					74ASXX:GATE			IN
4			Y1-  				74ASXX:GATE			ENBO
5			A2					74ASXX:GATE			IN
6			B2					74ASXX:GATE			IN
7			Y2-  				74ASXX:GATE			ENBO
8			GND  				GND  					NA
9			Y3-  				74ASXX:GATE			ENBO
10			B3  				74ASXX:GATE			IN
11			A3  				74ASXX:GATE			IN
12			Y4- 				74ASXX:GATE			ENBO
13			B4  				74ASXX:GATE			IN
14			A4  				74ASXX:GATE			IN
15			OUT_CTRL(G-) 	74ASXX:GATE			IN
16			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS258_SSOP
[Model File]		PML.MOD
[Package Model]    SSOP16
|
[Pin]		signal_name 	model_name  		direction
|
1			SELECT(A-/B)  	74ASXX:GATE			IN
2			A1					74ASXX:GATE			IN
3			B1					74ASXX:GATE			IN
4			Y1-  				74ASXX:GATE			ENBO
5			A2					74ASXX:GATE			IN
6			B2					74ASXX:GATE			IN
7			Y2-  				74ASXX:GATE			ENBO
8			GND  				GND  					NA
9			Y3-  				74ASXX:GATE			ENBO
10			B3  				74ASXX:GATE			IN
11			A3  				74ASXX:GATE			IN
12			Y4- 				74ASXX:GATE			ENBO
13			B4  				74ASXX:GATE			IN
14			A4  				74ASXX:GATE			IN
15			OUT_CTRL(G-) 	74ASXX:GATE			IN
16			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS264_DIP
[Model File]		PML.MOD
[Package Model]    DIP16
|
[Pin]		signal_name 	model_name  		direction
|
1			G1					74ASXX:GATE			IN
2			P1					74ASXX:GATE			IN
3			G0					74ASXX:GATE			IN
4			P0					74ASXX:GATE			IN
5			G3					74ASXX:GATE			IN
6			P3					74ASXX:GATE			IN
7			P_OUT				74ASXX:GATE			OUT
8			GND  				GND  					NA
9			C(n+z)  			74ASXX:GATE			OUT
10			G					74ASXX:GATE			OUT
11			C(n+y) 			74ASXX:GATE			OUT
12			C(n+x) 			74ASXX:GATE			OUT
13			Cn  				74ASXX:GATE			IN
14			G2  				74ASXX:GATE			IN
15			P2  				74ASXX:GATE			IN
16			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS264_SOIC
[Model File]		PML.MOD
[Package Model]    SOIC16
|
[Pin]		signal_name 	model_name  		direction
|
1			G1					74ASXX:GATE			IN
2			P1					74ASXX:GATE			IN
3			G0					74ASXX:GATE			IN
4			P0					74ASXX:GATE			IN
5			G3					74ASXX:GATE			IN
6			P3					74ASXX:GATE			IN
7			P_OUT				74ASXX:GATE			OUT
8			GND  				GND  					NA
9			C(n+z)  			74ASXX:GATE			OUT
10			G					74ASXX:GATE			OUT
11			C(n+y) 			74ASXX:GATE			OUT
12			C(n+x) 			74ASXX:GATE			OUT
13			Cn  				74ASXX:GATE			IN
14			G2  				74ASXX:GATE			IN
15			P2  				74ASXX:GATE			IN
16			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS264_SSOP
[Model File]		PML.MOD
[Package Model]    SSOP16
|
[Pin]		signal_name 	model_name  		direction
|
1			G1					74ASXX:GATE			IN
2			P1					74ASXX:GATE			IN
3			G0					74ASXX:GATE			IN
4			P0					74ASXX:GATE			IN
5			G3					74ASXX:GATE			IN
6			P3					74ASXX:GATE			IN
7			P_OUT				74ASXX:GATE			OUT
8			GND  				GND  					NA
9			C(n+z)  			74ASXX:GATE			OUT
10			G					74ASXX:GATE			OUT
11			C(n+y) 			74ASXX:GATE			OUT
12			C(n+x) 			74ASXX:GATE			OUT
13			Cn  				74ASXX:GATE			IN
14			G2  				74ASXX:GATE			IN
15			P2  				74ASXX:GATE			IN
16			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS280_DIP
[Model File]		PML.MOD
[Package Model]    DIP14
|
[Pin]		signal_name 	model_name  		direction
|
1			I6					74ASXX:GATE			IN
2			I7					74ASXX:GATE			IN
3			NC					NC						NA
4			I8					74ASXX:GATE			IN
5			SUM_EVEN			74ASXX:GATE			OUT
6			SUM_ODD 			74ASXX:GATE			OUT
7			GND  				GND  					NA
8			I0					74ASXX:GATE			IN
9			I1					74ASXX:GATE			IN
10			I2  				74ASXX:GATE			IN
11			I3  				74ASXX:GATE			IN
12			I4  				74ASXX:GATE			IN
13			I5  				74ASXX:GATE			IN
14			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS280_SOIC
[Model File]		PML.MOD
[Package Model]    SOIC14
|
[Pin]		signal_name 	model_name  		direction
|
1			I6					74ASXX:GATE			IN
2			I7					74ASXX:GATE			IN
3			NC					NC						NA
4			I8					74ASXX:GATE			IN
5			SUM_EVEN			74ASXX:GATE			OUT
6			SUM_ODD 			74ASXX:GATE			OUT
7			GND  				GND  					NA
8			I0					74ASXX:GATE			IN
9			I1					74ASXX:GATE			IN
10			I2  				74ASXX:GATE			IN
11			I3  				74ASXX:GATE			IN
12			I4  				74ASXX:GATE			IN
13			I5  				74ASXX:GATE			IN
14			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS280_SSOP
[Model File]		PML.MOD
[Package Model]    SSOP14
|
[Pin]		signal_name 	model_name  		direction
|
1			I6					74ASXX:GATE			IN
2			I7					74ASXX:GATE			IN
3			NC					NC						NA
4			I8					74ASXX:GATE			IN
5			SUM_EVEN			74ASXX:GATE			OUT
6			SUM_ODD 			74ASXX:GATE			OUT
7			GND  				GND  					NA
8			I0					74ASXX:GATE			IN
9			I1					74ASXX:GATE			IN
10			I2  				74ASXX:GATE			IN
11			I3  				74ASXX:GATE			IN
12			I4  				74ASXX:GATE			IN
13			I5  				74ASXX:GATE			IN
14			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS280_TSSOP
[Model File]		PML.MOD
[Package Model]    TSSOP14
|
[Pin]		signal_name 	model_name  		direction
|
1			I6					74ASXX:GATE			IN
2			I7					74ASXX:GATE			IN
3			NC					NC						NA
4			I8					74ASXX:GATE			IN
5			SUM_EVEN			74ASXX:GATE			OUT
6			SUM_ODD 			74ASXX:GATE			OUT
7			GND  				GND  					NA
8			I0					74ASXX:GATE			IN
9			I1					74ASXX:GATE			IN
10			I2  				74ASXX:GATE			IN
11			I3  				74ASXX:GATE			IN
12			I4  				74ASXX:GATE			IN
13			I5  				74ASXX:GATE			IN
14			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS282_DIP
[Model File]		PML.MOD
[Package Model]    DIP20
|
[Pin]		signal_name 	model_name  		direction
|
1			G1					74ASXX:GATE			IN
2			P1					74ASXX:GATE			IN
3			G0					74ASXX:GATE			IN
4			P0					74ASXX:GATE			IN
5			G3					74ASXX:GATE			IN
6			P3					74ASXX:GATE			IN
7			S0					74ASXX:GATE			IN
8			S1					74ASXX:GATE			IN
9			P 					74ASXX:GATE			OUT
10			GND 				GND  					NA
11			C(n+z) 			74ASXX:GATE			OUT
12			G					74ASXX:GATE			OUT
13			Cn' 				74ASXX:GATE			OUT
14			C(n+y) 			74ASXX:GATE			OUT
15			C(n+x) 			74ASXX:GATE			OUT
16			Cn2 				74ASXX:GATE			IN
17			Cn1 				74ASXX:GATE			IN
18			G2  				74ASXX:GATE			IN
19			P2  				74ASXX:GATE			IN
20			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS282_SOIC
[Model File]		PML.MOD
[Package Model]    SOIC20
|
[Pin]		signal_name 	model_name  		direction
|
1			G1					74ASXX:GATE			IN
2			P1					74ASXX:GATE			IN
3			G0					74ASXX:GATE			IN
4			P0					74ASXX:GATE			IN
5			G3					74ASXX:GATE			IN
6			P3					74ASXX:GATE			IN
7			S0					74ASXX:GATE			IN
8			S1					74ASXX:GATE			IN
9			P 					74ASXX:GATE			OUT
10			GND 				GND  					NA
11			C(n+z) 			74ASXX:GATE			OUT
12			G					74ASXX:GATE			OUT
13			Cn' 				74ASXX:GATE			OUT
14			C(n+y) 			74ASXX:GATE			OUT
15			C(n+x) 			74ASXX:GATE			OUT
16			Cn2 				74ASXX:GATE			IN
17			Cn1 				74ASXX:GATE			IN
18			G2  				74ASXX:GATE			IN
19			P2  				74ASXX:GATE			IN
20			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS282_SSOP
[Model File]		PML.MOD
[Package Model]    SSOP20
|
[Pin]		signal_name 	model_name  		direction
|
1			G1					74ASXX:GATE			IN
2			P1					74ASXX:GATE			IN
3			G0					74ASXX:GATE			IN
4			P0					74ASXX:GATE			IN
5			G3					74ASXX:GATE			IN
6			P3					74ASXX:GATE			IN
7			S0					74ASXX:GATE			IN
8			S1					74ASXX:GATE			IN
9			P 					74ASXX:GATE			OUT
10			GND 				GND  					NA
11			C(n+z) 			74ASXX:GATE			OUT
12			G					74ASXX:GATE			OUT
13			Cn' 				74ASXX:GATE			OUT
14			C(n+y) 			74ASXX:GATE			OUT
15			C(n+x) 			74ASXX:GATE			OUT
16			Cn2 				74ASXX:GATE			IN
17			Cn1 				74ASXX:GATE			IN
18			G2  				74ASXX:GATE			IN
19			P2  				74ASXX:GATE			IN
20			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS282_TSSOP
[Model File]		PML.MOD
[Package Model]    TSSOP20
|
[Pin]		signal_name 	model_name  		direction
|
1			G1					74ASXX:GATE			IN
2			P1					74ASXX:GATE			IN
3			G0					74ASXX:GATE			IN
4			P0					74ASXX:GATE			IN
5			G3					74ASXX:GATE			IN
6			P3					74ASXX:GATE			IN
7			S0					74ASXX:GATE			IN
8			S1					74ASXX:GATE			IN
9			P 					74ASXX:GATE			OUT
10			GND 				GND  					NA
11			C(n+z) 			74ASXX:GATE			OUT
12			G					74ASXX:GATE			OUT
13			Cn' 				74ASXX:GATE			OUT
14			C(n+y) 			74ASXX:GATE			OUT
15			C(n+x) 			74ASXX:GATE			OUT
16			Cn2 				74ASXX:GATE			IN
17			Cn1 				74ASXX:GATE			IN
18			G2  				74ASXX:GATE			IN
19			P2  				74ASXX:GATE			IN
20			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS286_DIP
[Model File]		PML.MOD
[Package Model]    DIP14
|
[Pin]		signal_name 	model_name  		direction
|
1			G 					74ASXX:GATE			IN
2			H 					74ASXX:GATE			IN
3			XMIT-				74ASXX:GATE			IN
4			I 					74ASXX:GATE			IN
5			PARITY_ERROR  	74ASXX:LINE-DRV  	OUT
6			PARITY_I/O 		74ASXX:LINE-DRV  	OUT
7			GND  				GND  					NA
8			A 					74ASXX:GATE			IN
9			B 					74ASXX:GATE			IN
10			C					74ASXX:GATE			IN
11			D					74ASXX:GATE			IN
12			E					74ASXX:GATE			IN
13			F					74ASXX:GATE			IN
14			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS286_SOIC
[Model File]		PML.MOD
[Package Model]    SOIC14
|
[Pin]		signal_name 	model_name  		direction
|
1			G 					74ASXX:GATE			IN
2			H 					74ASXX:GATE			IN
3			XMIT-				74ASXX:GATE			IN
4			I 					74ASXX:GATE			IN
5			PARITY_ERROR  	74ASXX:LINE-DRV  	OUT
6			PARITY_I/O 		74ASXX:LINE-DRV  	OUT
7			GND  				GND  					NA
8			A 					74ASXX:GATE			IN
9			B 					74ASXX:GATE			IN
10			C					74ASXX:GATE			IN
11			D					74ASXX:GATE			IN
12			E					74ASXX:GATE			IN
13			F					74ASXX:GATE			IN
14			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS286_SSOP
[Model File]		PML.MOD
[Package Model]    SSOP14
|
[Pin]		signal_name 	model_name  		direction
|
1			G 					74ASXX:GATE			IN
2			H 					74ASXX:GATE			IN
3			XMIT-				74ASXX:GATE			IN
4			I 					74ASXX:GATE			IN
5			PARITY_ERROR  	74ASXX:LINE-DRV  	OUT
6			PARITY_I/O 		74ASXX:LINE-DRV  	OUT
7			GND  				GND  					NA
8			A 					74ASXX:GATE			IN
9			B 					74ASXX:GATE			IN
10			C					74ASXX:GATE			IN
11			D					74ASXX:GATE			IN
12			E					74ASXX:GATE			IN
13			F					74ASXX:GATE			IN
14			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS286_TSSOP
[Model File]		PML.MOD
[Package Model]    TSSOP14
|
[Pin]		signal_name 	model_name  		direction
|
1			G 					74ASXX:GATE			IN
2			H 					74ASXX:GATE			IN
3			XMIT-				74ASXX:GATE			IN
4			I 					74ASXX:GATE			IN
5			PARITY_ERROR  	74ASXX:LINE-DRV  	OUT
6			PARITY_I/O 		74ASXX:LINE-DRV  	OUT
7			GND  				GND  					NA
8			A 					74ASXX:GATE			IN
9			B 					74ASXX:GATE			IN
10			C					74ASXX:GATE			IN
11			D					74ASXX:GATE			IN
12			E					74ASXX:GATE			IN
13			F					74ASXX:GATE			IN
14			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS352_DIP
[Model File]		PML.MOD
[Package Model]    DIP16
|
[Pin]		signal_name 	model_name  		direction
|
1			G1-  				74ASXX:GATE			IN
2			B 					74ASXX:GATE			IN
3			1C3  				74ASXX:GATE			IN
4			1C2  				74ASXX:GATE			IN
5			1C1  				74ASXX:GATE			IN
6			1C0  				74ASXX:GATE			IN
7			Y1					74ASXX:GATE			OUT
8			GND  				GND  					NA
9			Y2					74ASXX:GATE			OUT
10			2C0 				74ASXX:GATE			IN
11			2C1 				74ASXX:GATE			IN
12			2C2 				74ASXX:GATE			IN
13			2C3 				74ASXX:GATE			IN
14			A					74ASXX:GATE			IN
15			G2- 				74ASXX:GATE			IN
16			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS352_SOIC
[Model File]		PML.MOD
[Package Model]    SOIC16
|
[Pin]		signal_name 	model_name  		direction
|
1			G1-  				74ASXX:GATE			IN
2			B 					74ASXX:GATE			IN
3			1C3  				74ASXX:GATE			IN
4			1C2  				74ASXX:GATE			IN
5			1C1  				74ASXX:GATE			IN
6			1C0  				74ASXX:GATE			IN
7			Y1					74ASXX:GATE			OUT
8			GND  				GND  					NA
9			Y2					74ASXX:GATE			OUT
10			2C0 				74ASXX:GATE			IN
11			2C1 				74ASXX:GATE			IN
12			2C2 				74ASXX:GATE			IN
13			2C3 				74ASXX:GATE			IN
14			A					74ASXX:GATE			IN
15			G2- 				74ASXX:GATE			IN
16			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS352_SSOP
[Model File]		PML.MOD
[Package Model]    SSOP16
|
[Pin]		signal_name 	model_name  		direction
|
1			G1-  				74ASXX:GATE			IN
2			B 					74ASXX:GATE			IN
3			1C3  				74ASXX:GATE			IN
4			1C2  				74ASXX:GATE			IN
5			1C1  				74ASXX:GATE			IN
6			1C0  				74ASXX:GATE			IN
7			Y1					74ASXX:GATE			OUT
8			GND  				GND  					NA
9			Y2					74ASXX:GATE			OUT
10			2C0 				74ASXX:GATE			IN
11			2C1 				74ASXX:GATE			IN
12			2C2 				74ASXX:GATE			IN
13			2C3 				74ASXX:GATE			IN
14			A					74ASXX:GATE			IN
15			G2- 				74ASXX:GATE			IN
16			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS353_DIP
[Model File]		PML.MOD
[Package Model]    DIP16
|
[Pin]		signal_name 	model_name  		direction
|
1			G1-  				74ASXX:GATE			IN
2			B_SEL				74ASXX:GATE			IN
3			1C3  				74ASXX:GATE			IN
4			1C2  				74ASXX:GATE			IN
5			1C1  				74ASXX:GATE			IN
6			1C0  				74ASXX:GATE			IN
7			Y1					74ASXX:GATE			ENBO
8			GND  				GND  					NA
9			Y2					74ASXX:GATE			ENBO
10			2C0 				74ASXX:GATE			IN
11			2C1 				74ASXX:GATE			IN
12			2C2 				74ASXX:GATE			IN
13			2C3 				74ASXX:GATE			IN
14			A_SEL  			74ASXX:GATE			IN
15			G2- 				74ASXX:GATE			IN
16			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS353_SOIC
[Model File]		PML.MOD
[Package Model]    SOIC16
|
[Pin]		signal_name 	model_name  		direction
|
1			G1-  				74ASXX:GATE			IN
2			B_SEL				74ASXX:GATE			IN
3			1C3  				74ASXX:GATE			IN
4			1C2  				74ASXX:GATE			IN
5			1C1  				74ASXX:GATE			IN
6			1C0  				74ASXX:GATE			IN
7			Y1					74ASXX:GATE			ENBO
8			GND  				GND  					NA
9			Y2					74ASXX:GATE			ENBO
10			2C0 				74ASXX:GATE			IN
11			2C1 				74ASXX:GATE			IN
12			2C2 				74ASXX:GATE			IN
13			2C3 				74ASXX:GATE			IN
14			A_SEL  			74ASXX:GATE			IN
15			G2- 				74ASXX:GATE			IN
16			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS353_SSOP
[Model File]		PML.MOD
[Package Model]    SSOP16
|
[Pin]		signal_name 	model_name  		direction
|
1			G1-  				74ASXX:GATE			IN
2			B_SEL				74ASXX:GATE			IN
3			1C3  				74ASXX:GATE			IN
4			1C2  				74ASXX:GATE			IN
5			1C1  				74ASXX:GATE			IN
6			1C0  				74ASXX:GATE			IN
7			Y1					74ASXX:GATE			ENBO
8			GND  				GND  					NA
9			Y2					74ASXX:GATE			ENBO
10			2C0 				74ASXX:GATE			IN
11			2C1 				74ASXX:GATE			IN
12			2C2 				74ASXX:GATE			IN
13			2C3 				74ASXX:GATE			IN
14			A_SEL  			74ASXX:GATE			IN
15			G2- 				74ASXX:GATE			IN
16			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS373_DIP
[Model File]		PML.MOD
[Package Model]    DIP20
|
[Pin]		signal_name 	model_name  		direction
|
1			OE-  				74ASXX:GATE			IN
2			O0					74ASXX:LINE-DRV  	ENBO
3			D0					74ASXX:GATE			IN
4			D1					74ASXX:GATE			IN
5			O1					74ASXX:LINE-DRV  	ENBO
6			O2					74ASXX:LINE-DRV  	ENBO
7			D2					74ASXX:GATE			IN
8			D3					74ASXX:GATE			IN
9			O3					74ASXX:LINE-DRV  	ENBO
10			GND 				GND  					NA
11			LE  				74ASXX:GATE			IN
12			O4  				74ASXX:LINE-DRV  	ENBO
13			D4  				74ASXX:GATE			IN
14			D5  				74ASXX:GATE			IN
15			O5  				74ASXX:LINE-DRV  	ENBO
16			O6  				74ASXX:LINE-DRV  	ENBO
17			D6  				74ASXX:GATE			IN
18			D7  				74ASXX:GATE			IN
19			O7  				74ASXX:LINE-DRV  	ENBO
20			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS373_SOIC
[Model File]		PML.MOD
[Package Model]    SOIC20
|
[Pin]		signal_name 	model_name  		direction
|
1			OE-  				74ASXX:GATE			IN
2			O0					74ASXX:LINE-DRV  	ENBO
3			D0					74ASXX:GATE			IN
4			D1					74ASXX:GATE			IN
5			O1					74ASXX:LINE-DRV  	ENBO
6			O2					74ASXX:LINE-DRV  	ENBO
7			D2					74ASXX:GATE			IN
8			D3					74ASXX:GATE			IN
9			O3					74ASXX:LINE-DRV  	ENBO
10			GND 				GND  					NA
11			LE  				74ASXX:GATE			IN
12			O4  				74ASXX:LINE-DRV  	ENBO
13			D4  				74ASXX:GATE			IN
14			D5  				74ASXX:GATE			IN
15			O5  				74ASXX:LINE-DRV  	ENBO
16			O6  				74ASXX:LINE-DRV  	ENBO
17			D6  				74ASXX:GATE			IN
18			D7  				74ASXX:GATE			IN
19			O7  				74ASXX:LINE-DRV  	ENBO
20			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS373_SSOP
[Model File]		PML.MOD
[Package Model]    SSOP20
|
[Pin]		signal_name 	model_name  		direction
|
1			OE-  				74ASXX:GATE			IN
2			O0					74ASXX:LINE-DRV  	ENBO
3			D0					74ASXX:GATE			IN
4			D1					74ASXX:GATE			IN
5			O1					74ASXX:LINE-DRV  	ENBO
6			O2					74ASXX:LINE-DRV  	ENBO
7			D2					74ASXX:GATE			IN
8			D3					74ASXX:GATE			IN
9			O3					74ASXX:LINE-DRV  	ENBO
10			GND 				GND  					NA
11			LE  				74ASXX:GATE			IN
12			O4  				74ASXX:LINE-DRV  	ENBO
13			D4  				74ASXX:GATE			IN
14			D5  				74ASXX:GATE			IN
15			O5  				74ASXX:LINE-DRV  	ENBO
16			O6  				74ASXX:LINE-DRV  	ENBO
17			D6  				74ASXX:GATE			IN
18			D7  				74ASXX:GATE			IN
19			O7  				74ASXX:LINE-DRV  	ENBO
20			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS373_TSSOP
[Model File]		PML.MOD
[Package Model]    TSSOP20
|
[Pin]		signal_name 	model_name  		direction
|
1			OE-  				74ASXX:GATE			IN
2			O0					74ASXX:LINE-DRV  	ENBO
3			D0					74ASXX:GATE			IN
4			D1					74ASXX:GATE			IN
5			O1					74ASXX:LINE-DRV  	ENBO
6			O2					74ASXX:LINE-DRV  	ENBO
7			D2					74ASXX:GATE			IN
8			D3					74ASXX:GATE			IN
9			O3					74ASXX:LINE-DRV  	ENBO
10			GND 				GND  					NA
11			LE  				74ASXX:GATE			IN
12			O4  				74ASXX:LINE-DRV  	ENBO
13			D4  				74ASXX:GATE			IN
14			D5  				74ASXX:GATE			IN
15			O5  				74ASXX:LINE-DRV  	ENBO
16			O6  				74ASXX:LINE-DRV  	ENBO
17			D6  				74ASXX:GATE			IN
18			D7  				74ASXX:GATE			IN
19			O7  				74ASXX:LINE-DRV  	ENBO
20			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS374_DIP
[Model File]		PML.MOD
[Package Model]    DIP20
|
[Pin]		signal_name 	model_name  		direction
|
1			OE-  				74ASXX:GATE			IN
2			Q0					74ASXX:LINE-DRV  	ENBO
3			D0					74ASXX:GATE			IN
4			D1					74ASXX:GATE			IN
5			Q1					74ASXX:LINE-DRV  	ENBO
6			Q2					74ASXX:LINE-DRV  	ENBO
7			D2					74ASXX:GATE			IN
8			D3					74ASXX:GATE			IN
9			Q3					74ASXX:LINE-DRV  	ENBO
10			GND 				GND  					NA
11			CP  				74ASXX:GATE			IN
12			Q4  				74ASXX:LINE-DRV  	ENBO
13			D4  				74ASXX:GATE			IN
14			D5  				74ASXX:GATE			IN
15			Q5  				74ASXX:LINE-DRV  	ENBO
16			Q6  				74ASXX:LINE-DRV  	ENBO
17			D6  				74ASXX:GATE			IN
18			D7  				74ASXX:GATE			IN
19			Q7  				74ASXX:LINE-DRV  	ENBO
20			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS374_SOIC
[Model File]		PML.MOD
[Package Model]    SOIC20
|
[Pin]		signal_name 	model_name  		direction
|
1			OE-  				74ASXX:GATE			IN
2			Q0					74ASXX:LINE-DRV  	ENBO
3			D0					74ASXX:GATE			IN
4			D1					74ASXX:GATE			IN
5			Q1					74ASXX:LINE-DRV  	ENBO
6			Q2					74ASXX:LINE-DRV  	ENBO
7			D2					74ASXX:GATE			IN
8			D3					74ASXX:GATE			IN
9			Q3					74ASXX:LINE-DRV  	ENBO
10			GND 				GND  					NA
11			CP  				74ASXX:GATE			IN
12			Q4  				74ASXX:LINE-DRV  	ENBO
13			D4  				74ASXX:GATE			IN
14			D5  				74ASXX:GATE			IN
15			Q5  				74ASXX:LINE-DRV  	ENBO
16			Q6  				74ASXX:LINE-DRV  	ENBO
17			D6  				74ASXX:GATE			IN
18			D7  				74ASXX:GATE			IN
19			Q7  				74ASXX:LINE-DRV  	ENBO
20			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS374_SSOP
[Model File]		PML.MOD
[Package Model]    SSOP20
|
[Pin]		signal_name 	model_name  		direction
|
1			OE-  				74ASXX:GATE			IN
2			Q0					74ASXX:LINE-DRV  	ENBO
3			D0					74ASXX:GATE			IN
4			D1					74ASXX:GATE			IN
5			Q1					74ASXX:LINE-DRV  	ENBO
6			Q2					74ASXX:LINE-DRV  	ENBO
7			D2					74ASXX:GATE			IN
8			D3					74ASXX:GATE			IN
9			Q3					74ASXX:LINE-DRV  	ENBO
10			GND 				GND  					NA
11			CP  				74ASXX:GATE			IN
12			Q4  				74ASXX:LINE-DRV  	ENBO
13			D4  				74ASXX:GATE			IN
14			D5  				74ASXX:GATE			IN
15			Q5  				74ASXX:LINE-DRV  	ENBO
16			Q6  				74ASXX:LINE-DRV  	ENBO
17			D6  				74ASXX:GATE			IN
18			D7  				74ASXX:GATE			IN
19			Q7  				74ASXX:LINE-DRV  	ENBO
20			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS374_TSSOP
[Model File]		PML.MOD
[Package Model]    TSSOP20
|
[Pin]		signal_name 	model_name  		direction
|
1			OE-  				74ASXX:GATE			IN
2			Q0					74ASXX:LINE-DRV  	ENBO
3			D0					74ASXX:GATE			IN
4			D1					74ASXX:GATE			IN
5			Q1					74ASXX:LINE-DRV  	ENBO
6			Q2					74ASXX:LINE-DRV  	ENBO
7			D2					74ASXX:GATE			IN
8			D3					74ASXX:GATE			IN
9			Q3					74ASXX:LINE-DRV  	ENBO
10			GND 				GND  					NA
11			CP  				74ASXX:GATE			IN
12			Q4  				74ASXX:LINE-DRV  	ENBO
13			D4  				74ASXX:GATE			IN
14			D5  				74ASXX:GATE			IN
15			Q5  				74ASXX:LINE-DRV  	ENBO
16			Q6  				74ASXX:LINE-DRV  	ENBO
17			D6  				74ASXX:GATE			IN
18			D7  				74ASXX:GATE			IN
19			Q7  				74ASXX:LINE-DRV  	ENBO
20			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS533_DIP
[Model File]		PML.MOD
[Package Model]    DIP20
|
[Pin]		signal_name 	model_name  		direction
|
1			OE-  				74ASXX:GATE			IN
2			Q1-  				74ASXX:LINE-DRV  	ENBO
3			D1					74ASXX:GATE			IN
4			D2					74ASXX:GATE			IN
5			Q2-  				74ASXX:LINE-DRV  	ENBO
6			Q3-  				74ASXX:LINE-DRV  	ENBO
7			D3					74ASXX:GATE			IN
8			D4					74ASXX:GATE			IN
9			Q4-  				74ASXX:LINE-DRV  	ENBO
10			GND 				GND  					NA
11			LATCH_ENB 		74ASXX:GATE			IN
12			Q5- 				74ASXX:LINE-DRV  	ENBO
13			D5  				74ASXX:GATE			IN
14			D6  				74ASXX:GATE			IN
15			Q6- 				74ASXX:LINE-DRV  	ENBO
16			Q7- 				74ASXX:LINE-DRV  	ENBO
17			D7  				74ASXX:GATE			IN
18			D8  				74ASXX:GATE			IN
19			Q8- 				74ASXX:LINE-DRV  	ENBO
20			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS533_SOIC
[Model File]		PML.MOD
[Package Model]    SOIC20
|
[Pin]		signal_name 	model_name  		direction
|
1			OE-  				74ASXX:GATE			IN
2			Q1-  				74ASXX:LINE-DRV  	ENBO
3			D1					74ASXX:GATE			IN
4			D2					74ASXX:GATE			IN
5			Q2-  				74ASXX:LINE-DRV  	ENBO
6			Q3-  				74ASXX:LINE-DRV  	ENBO
7			D3					74ASXX:GATE			IN
8			D4					74ASXX:GATE			IN
9			Q4-  				74ASXX:LINE-DRV  	ENBO
10			GND 				GND  					NA
11			LATCH_ENB 		74ASXX:GATE			IN
12			Q5- 				74ASXX:LINE-DRV  	ENBO
13			D5  				74ASXX:GATE			IN
14			D6  				74ASXX:GATE			IN
15			Q6- 				74ASXX:LINE-DRV  	ENBO
16			Q7- 				74ASXX:LINE-DRV  	ENBO
17			D7  				74ASXX:GATE			IN
18			D8  				74ASXX:GATE			IN
19			Q8- 				74ASXX:LINE-DRV  	ENBO
20			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS533_SSOP
[Model File]		PML.MOD
[Package Model]    SSOP20
|
[Pin]		signal_name 	model_name  		direction
|
1			OE-  				74ASXX:GATE			IN
2			Q1-  				74ASXX:LINE-DRV  	ENBO
3			D1					74ASXX:GATE			IN
4			D2					74ASXX:GATE			IN
5			Q2-  				74ASXX:LINE-DRV  	ENBO
6			Q3-  				74ASXX:LINE-DRV  	ENBO
7			D3					74ASXX:GATE			IN
8			D4					74ASXX:GATE			IN
9			Q4-  				74ASXX:LINE-DRV  	ENBO
10			GND 				GND  					NA
11			LATCH_ENB 		74ASXX:GATE			IN
12			Q5- 				74ASXX:LINE-DRV  	ENBO
13			D5  				74ASXX:GATE			IN
14			D6  				74ASXX:GATE			IN
15			Q6- 				74ASXX:LINE-DRV  	ENBO
16			Q7- 				74ASXX:LINE-DRV  	ENBO
17			D7  				74ASXX:GATE			IN
18			D8  				74ASXX:GATE			IN
19			Q8- 				74ASXX:LINE-DRV  	ENBO
20			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS533_TSSOP
[Model File]		PML.MOD
[Package Model]    TSSOP20
|
[Pin]		signal_name 	model_name  		direction
|
1			OE-  				74ASXX:GATE			IN
2			Q1-  				74ASXX:LINE-DRV  	ENBO
3			D1					74ASXX:GATE			IN
4			D2					74ASXX:GATE			IN
5			Q2-  				74ASXX:LINE-DRV  	ENBO
6			Q3-  				74ASXX:LINE-DRV  	ENBO
7			D3					74ASXX:GATE			IN
8			D4					74ASXX:GATE			IN
9			Q4-  				74ASXX:LINE-DRV  	ENBO
10			GND 				GND  					NA
11			LATCH_ENB 		74ASXX:GATE			IN
12			Q5- 				74ASXX:LINE-DRV  	ENBO
13			D5  				74ASXX:GATE			IN
14			D6  				74ASXX:GATE			IN
15			Q6- 				74ASXX:LINE-DRV  	ENBO
16			Q7- 				74ASXX:LINE-DRV  	ENBO
17			D7  				74ASXX:GATE			IN
18			D8  				74ASXX:GATE			IN
19			Q8- 				74ASXX:LINE-DRV  	ENBO
20			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS534_DIP
[Model File]		PML.MOD
[Package Model]    DIP20
|
[Pin]		signal_name 	model_name  		direction
|
1			OE-  				74ASXX:GATE			IN
2			Q1-  				74ASXX:LINE-DRV  	ENBO
3			D1					74ASXX:GATE			IN
4			D2					74ASXX:GATE			IN
5			Q2-  				74ASXX:LINE-DRV  	ENBO
6			Q3-  				74ASXX:LINE-DRV  	ENBO
7			D3					74ASXX:GATE			IN
8			D4					74ASXX:GATE			IN
9			Q4-  				74ASXX:LINE-DRV  	ENBO
10			GND 				GND  					NA
11			CLK 				74ASXX:GATE			IN
12			Q5- 				74ASXX:LINE-DRV  	ENBO
13			D5  				74ASXX:GATE			IN
14			D6  				74ASXX:GATE			IN
15			Q6- 				74ASXX:LINE-DRV  	ENBO
16			Q7- 				74ASXX:LINE-DRV  	ENBO
17			D7  				74ASXX:GATE			IN
18			D8  				74ASXX:GATE			IN
19			Q8- 				74ASXX:LINE-DRV  	ENBO
20			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS534_SOIC
[Model File]		PML.MOD
[Package Model]    SOIC20
|
[Pin]		signal_name 	model_name  		direction
|
1			OE-  				74ASXX:GATE			IN
2			Q1-  				74ASXX:LINE-DRV  	ENBO
3			D1					74ASXX:GATE			IN
4			D2					74ASXX:GATE			IN
5			Q2-  				74ASXX:LINE-DRV  	ENBO
6			Q3-  				74ASXX:LINE-DRV  	ENBO
7			D3					74ASXX:GATE			IN
8			D4					74ASXX:GATE			IN
9			Q4-  				74ASXX:LINE-DRV  	ENBO
10			GND 				GND  					NA
11			CLK 				74ASXX:GATE			IN
12			Q5- 				74ASXX:LINE-DRV  	ENBO
13			D5  				74ASXX:GATE			IN
14			D6  				74ASXX:GATE			IN
15			Q6- 				74ASXX:LINE-DRV  	ENBO
16			Q7- 				74ASXX:LINE-DRV  	ENBO
17			D7  				74ASXX:GATE			IN
18			D8  				74ASXX:GATE			IN
19			Q8- 				74ASXX:LINE-DRV  	ENBO
20			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS534_SSOP
[Model File]		PML.MOD
[Package Model]    SSOP20
|
[Pin]		signal_name 	model_name  		direction
|
1			OE-  				74ASXX:GATE			IN
2			Q1-  				74ASXX:LINE-DRV  	ENBO
3			D1					74ASXX:GATE			IN
4			D2					74ASXX:GATE			IN
5			Q2-  				74ASXX:LINE-DRV  	ENBO
6			Q3-  				74ASXX:LINE-DRV  	ENBO
7			D3					74ASXX:GATE			IN
8			D4					74ASXX:GATE			IN
9			Q4-  				74ASXX:LINE-DRV  	ENBO
10			GND 				GND  					NA
11			CLK 				74ASXX:GATE			IN
12			Q5- 				74ASXX:LINE-DRV  	ENBO
13			D5  				74ASXX:GATE			IN
14			D6  				74ASXX:GATE			IN
15			Q6- 				74ASXX:LINE-DRV  	ENBO
16			Q7- 				74ASXX:LINE-DRV  	ENBO
17			D7  				74ASXX:GATE			IN
18			D8  				74ASXX:GATE			IN
19			Q8- 				74ASXX:LINE-DRV  	ENBO
20			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS534_TSSOP
[Model File]		PML.MOD
[Package Model]    TSSOP20
|
[Pin]		signal_name 	model_name  		direction
|
1			OE-  				74ASXX:GATE			IN
2			Q1-  				74ASXX:LINE-DRV  	ENBO
3			D1					74ASXX:GATE			IN
4			D2					74ASXX:GATE			IN
5			Q2-  				74ASXX:LINE-DRV  	ENBO
6			Q3-  				74ASXX:LINE-DRV  	ENBO
7			D3					74ASXX:GATE			IN
8			D4					74ASXX:GATE			IN
9			Q4-  				74ASXX:LINE-DRV  	ENBO
10			GND 				GND  					NA
11			CLK 				74ASXX:GATE			IN
12			Q5- 				74ASXX:LINE-DRV  	ENBO
13			D5  				74ASXX:GATE			IN
14			D6  				74ASXX:GATE			IN
15			Q6- 				74ASXX:LINE-DRV  	ENBO
16			Q7- 				74ASXX:LINE-DRV  	ENBO
17			D7  				74ASXX:GATE			IN
18			D8  				74ASXX:GATE			IN
19			Q8- 				74ASXX:LINE-DRV  	ENBO
20			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS573_DIP
[Model File]		PML.MOD
[Package Model]    DIP20
|
[Pin]		signal_name 	model_name  		direction
|
1			OE-  				74ASXX:GATE			IN
2			D1					74ASXX:GATE			IN
3			D2					74ASXX:GATE			IN
4			D3					74ASXX:GATE			IN
5			D4					74ASXX:GATE			IN
6			D5					74ASXX:GATE			IN
7			D6					74ASXX:GATE			IN
8			D7					74ASXX:GATE			IN
9			D8					74ASXX:GATE			IN
10			GND 				GND  					NA
11			LE  				74ASXX:GATE			IN
12			Q8  				74ASXX:LINE-DRV  	ENBO
13			Q7  				74ASXX:LINE-DRV  	ENBO
14			Q6  				74ASXX:LINE-DRV  	ENBO
15			Q5  				74ASXX:LINE-DRV  	ENBO
16			Q4  				74ASXX:LINE-DRV  	ENBO
17			Q3  				74ASXX:LINE-DRV  	ENBO
18			Q2  				74ASXX:LINE-DRV  	ENBO
19			Q1  				74ASXX:LINE-DRV  	ENBO
20			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS573_SOIC
[Model File]		PML.MOD
[Package Model]    SOIC20
|
[Pin]		signal_name 	model_name  		direction
|
1			OE-  				74ASXX:GATE			IN
2			D1					74ASXX:GATE			IN
3			D2					74ASXX:GATE			IN
4			D3					74ASXX:GATE			IN
5			D4					74ASXX:GATE			IN
6			D5					74ASXX:GATE			IN
7			D6					74ASXX:GATE			IN
8			D7					74ASXX:GATE			IN
9			D8					74ASXX:GATE			IN
10			GND 				GND  					NA
11			LE  				74ASXX:GATE			IN
12			Q8  				74ASXX:LINE-DRV  	ENBO
13			Q7  				74ASXX:LINE-DRV  	ENBO
14			Q6  				74ASXX:LINE-DRV  	ENBO
15			Q5  				74ASXX:LINE-DRV  	ENBO
16			Q4  				74ASXX:LINE-DRV  	ENBO
17			Q3  				74ASXX:LINE-DRV  	ENBO
18			Q2  				74ASXX:LINE-DRV  	ENBO
19			Q1  				74ASXX:LINE-DRV  	ENBO
20			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS573_SSOP
[Model File]		PML.MOD
[Package Model]    SSOP20
|
[Pin]		signal_name 	model_name  		direction
|
1			OE-  				74ASXX:GATE			IN
2			D1					74ASXX:GATE			IN
3			D2					74ASXX:GATE			IN
4			D3					74ASXX:GATE			IN
5			D4					74ASXX:GATE			IN
6			D5					74ASXX:GATE			IN
7			D6					74ASXX:GATE			IN
8			D7					74ASXX:GATE			IN
9			D8					74ASXX:GATE			IN
10			GND 				GND  					NA
11			LE  				74ASXX:GATE			IN
12			Q8  				74ASXX:LINE-DRV  	ENBO
13			Q7  				74ASXX:LINE-DRV  	ENBO
14			Q6  				74ASXX:LINE-DRV  	ENBO
15			Q5  				74ASXX:LINE-DRV  	ENBO
16			Q4  				74ASXX:LINE-DRV  	ENBO
17			Q3  				74ASXX:LINE-DRV  	ENBO
18			Q2  				74ASXX:LINE-DRV  	ENBO
19			Q1  				74ASXX:LINE-DRV  	ENBO
20			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS573_TSSOP
[Model File]		PML.MOD
[Package Model]    TSSOP20
|
[Pin]		signal_name 	model_name  		direction
|
1			OE-  				74ASXX:GATE			IN
2			D1					74ASXX:GATE			IN
3			D2					74ASXX:GATE			IN
4			D3					74ASXX:GATE			IN
5			D4					74ASXX:GATE			IN
6			D5					74ASXX:GATE			IN
7			D6					74ASXX:GATE			IN
8			D7					74ASXX:GATE			IN
9			D8					74ASXX:GATE			IN
10			GND 				GND  					NA
11			LE  				74ASXX:GATE			IN
12			Q8  				74ASXX:LINE-DRV  	ENBO
13			Q7  				74ASXX:LINE-DRV  	ENBO
14			Q6  				74ASXX:LINE-DRV  	ENBO
15			Q5  				74ASXX:LINE-DRV  	ENBO
16			Q4  				74ASXX:LINE-DRV  	ENBO
17			Q3  				74ASXX:LINE-DRV  	ENBO
18			Q2  				74ASXX:LINE-DRV  	ENBO
19			Q1  				74ASXX:LINE-DRV  	ENBO
20			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS574_DIP
[Model File]		PML.MOD
[Package Model]    DIP20
|
[Pin]		signal_name 	model_name  		direction
|
1			OE-  				74ASXX:GATE			IN
2			D1					74ASXX:GATE			IN
3			D2					74ASXX:GATE			IN
4			D3					74ASXX:GATE			IN
5			D4					74ASXX:GATE			IN
6			D5					74ASXX:GATE			IN
7			D6					74ASXX:GATE			IN
8			D7					74ASXX:GATE			IN
9			D8					74ASXX:GATE			IN
10			GND 				GND  					NA
11			CLK 				74ASXX:GATE			IN
12			Q8  				74ASXX:LINE-DRV  	ENBO
13			Q7  				74ASXX:LINE-DRV  	ENBO
14			Q6  				74ASXX:LINE-DRV  	ENBO
15			Q5  				74ASXX:LINE-DRV  	ENBO
16			Q4  				74ASXX:LINE-DRV  	ENBO
17			Q3  				74ASXX:LINE-DRV  	ENBO
18			Q2  				74ASXX:LINE-DRV  	ENBO
19			Q1  				74ASXX:LINE-DRV  	ENBO
20			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS574_SOIC
[Model File]		PML.MOD
[Package Model]    SOIC20
|
[Pin]		signal_name 	model_name  		direction
|
1			OE-  				74ASXX:GATE			IN
2			D1					74ASXX:GATE			IN
3			D2					74ASXX:GATE			IN
4			D3					74ASXX:GATE			IN
5			D4					74ASXX:GATE			IN
6			D5					74ASXX:GATE			IN
7			D6					74ASXX:GATE			IN
8			D7					74ASXX:GATE			IN
9			D8					74ASXX:GATE			IN
10			GND 				GND  					NA
11			CLK 				74ASXX:GATE			IN
12			Q8  				74ASXX:LINE-DRV  	ENBO
13			Q7  				74ASXX:LINE-DRV  	ENBO
14			Q6  				74ASXX:LINE-DRV  	ENBO
15			Q5  				74ASXX:LINE-DRV  	ENBO
16			Q4  				74ASXX:LINE-DRV  	ENBO
17			Q3  				74ASXX:LINE-DRV  	ENBO
18			Q2  				74ASXX:LINE-DRV  	ENBO
19			Q1  				74ASXX:LINE-DRV  	ENBO
20			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS574_SSOP
[Model File]		PML.MOD
[Package Model]    SSOP20
|
[Pin]		signal_name 	model_name  		direction
|
1			OE-  				74ASXX:GATE			IN
2			D1					74ASXX:GATE			IN
3			D2					74ASXX:GATE			IN
4			D3					74ASXX:GATE			IN
5			D4					74ASXX:GATE			IN
6			D5					74ASXX:GATE			IN
7			D6					74ASXX:GATE			IN
8			D7					74ASXX:GATE			IN
9			D8					74ASXX:GATE			IN
10			GND 				GND  					NA
11			CLK 				74ASXX:GATE			IN
12			Q8  				74ASXX:LINE-DRV  	ENBO
13			Q7  				74ASXX:LINE-DRV  	ENBO
14			Q6  				74ASXX:LINE-DRV  	ENBO
15			Q5  				74ASXX:LINE-DRV  	ENBO
16			Q4  				74ASXX:LINE-DRV  	ENBO
17			Q3  				74ASXX:LINE-DRV  	ENBO
18			Q2  				74ASXX:LINE-DRV  	ENBO
19			Q1  				74ASXX:LINE-DRV  	ENBO
20			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS574_TSSOP
[Model File]		PML.MOD
[Package Model]    TSSOP20
|
[Pin]		signal_name 	model_name  		direction
|
1			OE-  				74ASXX:GATE			IN
2			D1					74ASXX:GATE			IN
3			D2					74ASXX:GATE			IN
4			D3					74ASXX:GATE			IN
5			D4					74ASXX:GATE			IN
6			D5					74ASXX:GATE			IN
7			D6					74ASXX:GATE			IN
8			D7					74ASXX:GATE			IN
9			D8					74ASXX:GATE			IN
10			GND 				GND  					NA
11			CLK 				74ASXX:GATE			IN
12			Q8  				74ASXX:LINE-DRV  	ENBO
13			Q7  				74ASXX:LINE-DRV  	ENBO
14			Q6  				74ASXX:LINE-DRV  	ENBO
15			Q5  				74ASXX:LINE-DRV  	ENBO
16			Q4  				74ASXX:LINE-DRV  	ENBO
17			Q3  				74ASXX:LINE-DRV  	ENBO
18			Q2  				74ASXX:LINE-DRV  	ENBO
19			Q1  				74ASXX:LINE-DRV  	ENBO
20			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS575_DIP
[Model File]		PML.MOD
[Package Model]    DIP24
|
[Pin]		signal_name 	model_name  		direction
|
1			CLR  				74ASXX:GATE			IN
2			OE-  				74ASXX:GATE			IN
3			D1					74ASXX:GATE			IN
4			D2					74ASXX:GATE			IN
5			D3					74ASXX:GATE			IN
6			D4					74ASXX:GATE			IN
7			D5					74ASXX:GATE			IN
8			D6					74ASXX:GATE			IN
9			D7					74ASXX:GATE			IN
10			D8  				74ASXX:GATE			IN
11			NC  				NC						NA
12			GND 				GND  					NA
13			NC  				NC						NA
14			CLK 				74ASXX:GATE			IN
15			Q8  				74ASXX:GATE			ENBO
16			Q7  				74ASXX:GATE			ENBO
17			Q6  				74ASXX:GATE			ENBO
18			Q5  				74ASXX:GATE			ENBO
19			Q4  				74ASXX:GATE			ENBO
20			Q3  				74ASXX:GATE			ENBO
21			Q2  				74ASXX:GATE			ENBO
22			Q1  				74ASXX:GATE			ENBO
23			NC  				NC						NA
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS575_SOIC
[Model File]		PML.MOD
[Package Model]    SOIC24
|
[Pin]		signal_name 	model_name  		direction
|
1			CLR  				74ASXX:GATE			IN
2			OE-  				74ASXX:GATE			IN
3			D1					74ASXX:GATE			IN
4			D2					74ASXX:GATE			IN
5			D3					74ASXX:GATE			IN
6			D4					74ASXX:GATE			IN
7			D5					74ASXX:GATE			IN
8			D6					74ASXX:GATE			IN
9			D7					74ASXX:GATE			IN
10			D8  				74ASXX:GATE			IN
11			NC  				NC						NA
12			GND 				GND  					NA
13			NC  				NC						NA
14			CLK 				74ASXX:GATE			IN
15			Q8  				74ASXX:GATE			ENBO
16			Q7  				74ASXX:GATE			ENBO
17			Q6  				74ASXX:GATE			ENBO
18			Q5  				74ASXX:GATE			ENBO
19			Q4  				74ASXX:GATE			ENBO
20			Q3  				74ASXX:GATE			ENBO
21			Q2  				74ASXX:GATE			ENBO
22			Q1  				74ASXX:GATE			ENBO
23			NC  				NC						NA
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS575_SSOP
[Model File]		PML.MOD
[Package Model]    SSOP24
|
[Pin]		signal_name 	model_name  		direction
|
1			CLR  				74ASXX:GATE			IN
2			OE-  				74ASXX:GATE			IN
3			D1					74ASXX:GATE			IN
4			D2					74ASXX:GATE			IN
5			D3					74ASXX:GATE			IN
6			D4					74ASXX:GATE			IN
7			D5					74ASXX:GATE			IN
8			D6					74ASXX:GATE			IN
9			D7					74ASXX:GATE			IN
10			D8  				74ASXX:GATE			IN
11			NC  				NC						NA
12			GND 				GND  					NA
13			NC  				NC						NA
14			CLK 				74ASXX:GATE			IN
15			Q8  				74ASXX:GATE			ENBO
16			Q7  				74ASXX:GATE			ENBO
17			Q6  				74ASXX:GATE			ENBO
18			Q5  				74ASXX:GATE			ENBO
19			Q4  				74ASXX:GATE			ENBO
20			Q3  				74ASXX:GATE			ENBO
21			Q2  				74ASXX:GATE			ENBO
22			Q1  				74ASXX:GATE			ENBO
23			NC  				NC						NA
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS575_TSSOP
[Model File]		PML.MOD
[Package Model]    TSSOP24
|
[Pin]		signal_name 	model_name  		direction
|
1			CLR  				74ASXX:GATE			IN
2			OE-  				74ASXX:GATE			IN
3			D1					74ASXX:GATE			IN
4			D2					74ASXX:GATE			IN
5			D3					74ASXX:GATE			IN
6			D4					74ASXX:GATE			IN
7			D5					74ASXX:GATE			IN
8			D6					74ASXX:GATE			IN
9			D7					74ASXX:GATE			IN
10			D8  				74ASXX:GATE			IN
11			NC  				NC						NA
12			GND 				GND  					NA
13			NC  				NC						NA
14			CLK 				74ASXX:GATE			IN
15			Q8  				74ASXX:GATE			ENBO
16			Q7  				74ASXX:GATE			ENBO
17			Q6  				74ASXX:GATE			ENBO
18			Q5  				74ASXX:GATE			ENBO
19			Q4  				74ASXX:GATE			ENBO
20			Q3  				74ASXX:GATE			ENBO
21			Q2  				74ASXX:GATE			ENBO
22			Q1  				74ASXX:GATE			ENBO
23			NC  				NC						NA
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS576_DIP
[Model File]		PML.MOD
[Package Model]    DIP20
|
[Pin]		signal_name 	model_name  		direction
|
1			OE-  				74ASXX:GATE			IN
2			D1					74ASXX:GATE			IN
3			D2					74ASXX:GATE			IN
4			D3					74ASXX:GATE			IN
5			D4					74ASXX:GATE			IN
6			D5					74ASXX:GATE			IN
7			D6					74ASXX:GATE			IN
8			D7					74ASXX:GATE			IN
9			D8					74ASXX:GATE			IN
10			GND 				GND  					NA
11			CLK 				74ASXX:GATE			IN
12			Q8- 				74ASXX:LINE-DRV  	ENBO
13			Q7- 				74ASXX:LINE-DRV  	ENBO
14			Q6- 				74ASXX:LINE-DRV  	ENBO
15			Q5- 				74ASXX:LINE-DRV  	ENBO
16			Q4- 				74ASXX:LINE-DRV  	ENBO
17			Q3- 				74ASXX:LINE-DRV  	ENBO
18			Q2- 				74ASXX:LINE-DRV  	ENBO
19			Q1- 				74ASXX:LINE-DRV  	ENBO
20			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS576_SOIC
[Model File]		PML.MOD
[Package Model]    SOIC20
|
[Pin]		signal_name 	model_name  		direction
|
1			OE-  				74ASXX:GATE			IN
2			D1					74ASXX:GATE			IN
3			D2					74ASXX:GATE			IN
4			D3					74ASXX:GATE			IN
5			D4					74ASXX:GATE			IN
6			D5					74ASXX:GATE			IN
7			D6					74ASXX:GATE			IN
8			D7					74ASXX:GATE			IN
9			D8					74ASXX:GATE			IN
10			GND 				GND  					NA
11			CLK 				74ASXX:GATE			IN
12			Q8- 				74ASXX:LINE-DRV  	ENBO
13			Q7- 				74ASXX:LINE-DRV  	ENBO
14			Q6- 				74ASXX:LINE-DRV  	ENBO
15			Q5- 				74ASXX:LINE-DRV  	ENBO
16			Q4- 				74ASXX:LINE-DRV  	ENBO
17			Q3- 				74ASXX:LINE-DRV  	ENBO
18			Q2- 				74ASXX:LINE-DRV  	ENBO
19			Q1- 				74ASXX:LINE-DRV  	ENBO
20			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS576_SSOP
[Model File]		PML.MOD
[Package Model]    SSOP20
|
[Pin]		signal_name 	model_name  		direction
|
1			OE-  				74ASXX:GATE			IN
2			D1					74ASXX:GATE			IN
3			D2					74ASXX:GATE			IN
4			D3					74ASXX:GATE			IN
5			D4					74ASXX:GATE			IN
6			D5					74ASXX:GATE			IN
7			D6					74ASXX:GATE			IN
8			D7					74ASXX:GATE			IN
9			D8					74ASXX:GATE			IN
10			GND 				GND  					NA
11			CLK 				74ASXX:GATE			IN
12			Q8- 				74ASXX:LINE-DRV  	ENBO
13			Q7- 				74ASXX:LINE-DRV  	ENBO
14			Q6- 				74ASXX:LINE-DRV  	ENBO
15			Q5- 				74ASXX:LINE-DRV  	ENBO
16			Q4- 				74ASXX:LINE-DRV  	ENBO
17			Q3- 				74ASXX:LINE-DRV  	ENBO
18			Q2- 				74ASXX:LINE-DRV  	ENBO
19			Q1- 				74ASXX:LINE-DRV  	ENBO
20			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS576_TSSOP
[Model File]		PML.MOD
[Package Model]    TSSOP20
|
[Pin]		signal_name 	model_name  		direction
|
1			OE-  				74ASXX:GATE			IN
2			D1					74ASXX:GATE			IN
3			D2					74ASXX:GATE			IN
4			D3					74ASXX:GATE			IN
5			D4					74ASXX:GATE			IN
6			D5					74ASXX:GATE			IN
7			D6					74ASXX:GATE			IN
8			D7					74ASXX:GATE			IN
9			D8					74ASXX:GATE			IN
10			GND 				GND  					NA
11			CLK 				74ASXX:GATE			IN
12			Q8- 				74ASXX:LINE-DRV  	ENBO
13			Q7- 				74ASXX:LINE-DRV  	ENBO
14			Q6- 				74ASXX:LINE-DRV  	ENBO
15			Q5- 				74ASXX:LINE-DRV  	ENBO
16			Q4- 				74ASXX:LINE-DRV  	ENBO
17			Q3- 				74ASXX:LINE-DRV  	ENBO
18			Q2- 				74ASXX:LINE-DRV  	ENBO
19			Q1- 				74ASXX:LINE-DRV  	ENBO
20			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS577_DIP
[Model File]		PML.MOD
[Package Model]    DIP24
|
[Pin]		signal_name 	model_name  		direction
|
1			CLR  				74ASXX:GATE			IN
2			OE-  				74ASXX:GATE			IN
3			D1-  				74ASXX:GATE			IN
4			D2-  				74ASXX:GATE			IN
5			D3-  				74ASXX:GATE			IN
6			D4-  				74ASXX:GATE			IN
7			D5-  				74ASXX:GATE			IN
8			D6-  				74ASXX:GATE			IN
9			D7-  				74ASXX:GATE			IN
10			D8- 				74ASXX:GATE			IN
11			NC  				NC						NA
12			GND 				GND  					NA
13			NC  				NC						NA
14			CLK 				74ASXX:GATE			IN
15			Q8  				74ASXX:LINE-DRV  	ENBO
16			Q7  				74ASXX:LINE-DRV  	ENBO
17			Q6  				74ASXX:LINE-DRV  	ENBO
18			Q5  				74ASXX:LINE-DRV  	ENBO
19			Q4  				74ASXX:LINE-DRV  	ENBO
20			Q3  				74ASXX:LINE-DRV  	ENBO
21			Q2  				74ASXX:LINE-DRV  	ENBO
22			Q1  				74ASXX:LINE-DRV  	ENBO
23			NC  				NC						NA
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS577_SOIC
[Model File]		PML.MOD
[Package Model]    SOIC24
|
[Pin]		signal_name 	model_name  		direction
|
1			CLR  				74ASXX:GATE			IN
2			OE-  				74ASXX:GATE			IN
3			D1-  				74ASXX:GATE			IN
4			D2-  				74ASXX:GATE			IN
5			D3-  				74ASXX:GATE			IN
6			D4-  				74ASXX:GATE			IN
7			D5-  				74ASXX:GATE			IN
8			D6-  				74ASXX:GATE			IN
9			D7-  				74ASXX:GATE			IN
10			D8- 				74ASXX:GATE			IN
11			NC  				NC						NA
12			GND 				GND  					NA
13			NC  				NC						NA
14			CLK 				74ASXX:GATE			IN
15			Q8  				74ASXX:LINE-DRV  	ENBO
16			Q7  				74ASXX:LINE-DRV  	ENBO
17			Q6  				74ASXX:LINE-DRV  	ENBO
18			Q5  				74ASXX:LINE-DRV  	ENBO
19			Q4  				74ASXX:LINE-DRV  	ENBO
20			Q3  				74ASXX:LINE-DRV  	ENBO
21			Q2  				74ASXX:LINE-DRV  	ENBO
22			Q1  				74ASXX:LINE-DRV  	ENBO
23			NC  				NC						NA
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS577_SSOP
[Model File]		PML.MOD
[Package Model]    SSOP24
|
[Pin]		signal_name 	model_name  		direction
|
1			CLR  				74ASXX:GATE			IN
2			OE-  				74ASXX:GATE			IN
3			D1-  				74ASXX:GATE			IN
4			D2-  				74ASXX:GATE			IN
5			D3-  				74ASXX:GATE			IN
6			D4-  				74ASXX:GATE			IN
7			D5-  				74ASXX:GATE			IN
8			D6-  				74ASXX:GATE			IN
9			D7-  				74ASXX:GATE			IN
10			D8- 				74ASXX:GATE			IN
11			NC  				NC						NA
12			GND 				GND  					NA
13			NC  				NC						NA
14			CLK 				74ASXX:GATE			IN
15			Q8  				74ASXX:LINE-DRV  	ENBO
16			Q7  				74ASXX:LINE-DRV  	ENBO
17			Q6  				74ASXX:LINE-DRV  	ENBO
18			Q5  				74ASXX:LINE-DRV  	ENBO
19			Q4  				74ASXX:LINE-DRV  	ENBO
20			Q3  				74ASXX:LINE-DRV  	ENBO
21			Q2  				74ASXX:LINE-DRV  	ENBO
22			Q1  				74ASXX:LINE-DRV  	ENBO
23			NC  				NC						NA
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS577_TSSOP
[Model File]		PML.MOD
[Package Model]    TSSOP24
|
[Pin]		signal_name 	model_name  		direction
|
1			CLR  				74ASXX:GATE			IN
2			OE-  				74ASXX:GATE			IN
3			D1-  				74ASXX:GATE			IN
4			D2-  				74ASXX:GATE			IN
5			D3-  				74ASXX:GATE			IN
6			D4-  				74ASXX:GATE			IN
7			D5-  				74ASXX:GATE			IN
8			D6-  				74ASXX:GATE			IN
9			D7-  				74ASXX:GATE			IN
10			D8- 				74ASXX:GATE			IN
11			NC  				NC						NA
12			GND 				GND  					NA
13			NC  				NC						NA
14			CLK 				74ASXX:GATE			IN
15			Q8  				74ASXX:LINE-DRV  	ENBO
16			Q7  				74ASXX:LINE-DRV  	ENBO
17			Q6  				74ASXX:LINE-DRV  	ENBO
18			Q5  				74ASXX:LINE-DRV  	ENBO
19			Q4  				74ASXX:LINE-DRV  	ENBO
20			Q3  				74ASXX:LINE-DRV  	ENBO
21			Q2  				74ASXX:LINE-DRV  	ENBO
22			Q1  				74ASXX:LINE-DRV  	ENBO
23			NC  				NC						NA
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS580_DIP
[Model File]		PML.MOD
[Package Model]    DIP20
|
[Pin]		signal_name 	model_name  		direction
|
1			OE-  				74ASXX:GATE			IN
2			D1					74ASXX:GATE			IN
3			D2					74ASXX:GATE			IN
4			D3					74ASXX:GATE			IN
5			D4					74ASXX:GATE			IN
6			D5					74ASXX:GATE			IN
7			D6					74ASXX:GATE			IN
8			D7					74ASXX:GATE			IN
9			D8					74ASXX:GATE			IN
10			GND 				GND  					NA
11			CLK 				74ASXX:GATE			IN
12			Q8- 				74ASXX:GATE			ENBO
13			Q7- 				74ASXX:GATE			ENBO
14			Q6- 				74ASXX:GATE			ENBO
15			Q5- 				74ASXX:GATE			ENBO
16			Q4- 				74ASXX:GATE			ENBO
17			Q3- 				74ASXX:GATE			ENBO
18			Q2- 				74ASXX:GATE			ENBO
19			Q1- 				74ASXX:GATE			ENBO
20			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS580_SOIC
[Model File]		PML.MOD
[Package Model]    SOIC20
|
[Pin]		signal_name 	model_name  		direction
|
1			OE-  				74ASXX:GATE			IN
2			D1					74ASXX:GATE			IN
3			D2					74ASXX:GATE			IN
4			D3					74ASXX:GATE			IN
5			D4					74ASXX:GATE			IN
6			D5					74ASXX:GATE			IN
7			D6					74ASXX:GATE			IN
8			D7					74ASXX:GATE			IN
9			D8					74ASXX:GATE			IN
10			GND 				GND  					NA
11			CLK 				74ASXX:GATE			IN
12			Q8- 				74ASXX:GATE			ENBO
13			Q7- 				74ASXX:GATE			ENBO
14			Q6- 				74ASXX:GATE			ENBO
15			Q5- 				74ASXX:GATE			ENBO
16			Q4- 				74ASXX:GATE			ENBO
17			Q3- 				74ASXX:GATE			ENBO
18			Q2- 				74ASXX:GATE			ENBO
19			Q1- 				74ASXX:GATE			ENBO
20			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS580_SSOP
[Model File]		PML.MOD
[Package Model]    SSOP20
|
[Pin]		signal_name 	model_name  		direction
|
1			OE-  				74ASXX:GATE			IN
2			D1					74ASXX:GATE			IN
3			D2					74ASXX:GATE			IN
4			D3					74ASXX:GATE			IN
5			D4					74ASXX:GATE			IN
6			D5					74ASXX:GATE			IN
7			D6					74ASXX:GATE			IN
8			D7					74ASXX:GATE			IN
9			D8					74ASXX:GATE			IN
10			GND 				GND  					NA
11			CLK 				74ASXX:GATE			IN
12			Q8- 				74ASXX:GATE			ENBO
13			Q7- 				74ASXX:GATE			ENBO
14			Q6- 				74ASXX:GATE			ENBO
15			Q5- 				74ASXX:GATE			ENBO
16			Q4- 				74ASXX:GATE			ENBO
17			Q3- 				74ASXX:GATE			ENBO
18			Q2- 				74ASXX:GATE			ENBO
19			Q1- 				74ASXX:GATE			ENBO
20			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS580_TSSOP
[Model File]		PML.MOD
[Package Model]    TSSOP20
|
[Pin]		signal_name 	model_name  		direction
|
1			OE-  				74ASXX:GATE			IN
2			D1					74ASXX:GATE			IN
3			D2					74ASXX:GATE			IN
4			D3					74ASXX:GATE			IN
5			D4					74ASXX:GATE			IN
6			D5					74ASXX:GATE			IN
7			D6					74ASXX:GATE			IN
8			D7					74ASXX:GATE			IN
9			D8					74ASXX:GATE			IN
10			GND 				GND  					NA
11			CLK 				74ASXX:GATE			IN
12			Q8- 				74ASXX:GATE			ENBO
13			Q7- 				74ASXX:GATE			ENBO
14			Q6- 				74ASXX:GATE			ENBO
15			Q5- 				74ASXX:GATE			ENBO
16			Q4- 				74ASXX:GATE			ENBO
17			Q3- 				74ASXX:GATE			ENBO
18			Q2- 				74ASXX:GATE			ENBO
19			Q1- 				74ASXX:GATE			ENBO
20			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS620_DIP
[Model File]		PML.MOD
[Package Model]    DIP20
|
[Pin]		signal_name 	model_name  		direction
|
1			GAB  				74ASXX:GATE			IN
2			A1					74ASXX:LINE-DRV  	BIDIR
3			A2					74ASXX:LINE-DRV  	BIDIR
4			A3					74ASXX:LINE-DRV  	BIDIR
5			A4					74ASXX:LINE-DRV  	BIDIR
6			A5					74ASXX:LINE-DRV  	BIDIR
7			A6					74ASXX:LINE-DRV  	BIDIR
8			A7					74ASXX:LINE-DRV  	BIDIR
9			A8					74ASXX:LINE-DRV  	BIDIR
10			GND 				GND  					NA
11			B8  				74ASXX:LINE-DRV  	BIDIR
12			B7  				74ASXX:LINE-DRV  	BIDIR
13			B6  				74ASXX:LINE-DRV  	BIDIR
14			B5  				74ASXX:LINE-DRV  	BIDIR
15			B4  				74ASXX:LINE-DRV  	BIDIR
16			B3  				74ASXX:LINE-DRV  	BIDIR
17			B2  				74ASXX:LINE-DRV  	BIDIR
18			B1  				74ASXX:LINE-DRV  	BIDIR
19			(G-)BA 			74ASXX:GATE			IN
20			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS620_SOIC
[Model File]		PML.MOD
[Package Model]    SOIC20
|
[Pin]		signal_name 	model_name  		direction
|
1			GAB  				74ASXX:GATE			IN
2			A1					74ASXX:LINE-DRV  	BIDIR
3			A2					74ASXX:LINE-DRV  	BIDIR
4			A3					74ASXX:LINE-DRV  	BIDIR
5			A4					74ASXX:LINE-DRV  	BIDIR
6			A5					74ASXX:LINE-DRV  	BIDIR
7			A6					74ASXX:LINE-DRV  	BIDIR
8			A7					74ASXX:LINE-DRV  	BIDIR
9			A8					74ASXX:LINE-DRV  	BIDIR
10			GND 				GND  					NA
11			B8  				74ASXX:LINE-DRV  	BIDIR
12			B7  				74ASXX:LINE-DRV  	BIDIR
13			B6  				74ASXX:LINE-DRV  	BIDIR
14			B5  				74ASXX:LINE-DRV  	BIDIR
15			B4  				74ASXX:LINE-DRV  	BIDIR
16			B3  				74ASXX:LINE-DRV  	BIDIR
17			B2  				74ASXX:LINE-DRV  	BIDIR
18			B1  				74ASXX:LINE-DRV  	BIDIR
19			(G-)BA 			74ASXX:GATE			IN
20			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS620_SSOP
[Model File]		PML.MOD
[Package Model]    SSOP20
|
[Pin]		signal_name 	model_name  		direction
|
1			GAB  				74ASXX:GATE			IN
2			A1					74ASXX:LINE-DRV  	BIDIR
3			A2					74ASXX:LINE-DRV  	BIDIR
4			A3					74ASXX:LINE-DRV  	BIDIR
5			A4					74ASXX:LINE-DRV  	BIDIR
6			A5					74ASXX:LINE-DRV  	BIDIR
7			A6					74ASXX:LINE-DRV  	BIDIR
8			A7					74ASXX:LINE-DRV  	BIDIR
9			A8					74ASXX:LINE-DRV  	BIDIR
10			GND 				GND  					NA
11			B8  				74ASXX:LINE-DRV  	BIDIR
12			B7  				74ASXX:LINE-DRV  	BIDIR
13			B6  				74ASXX:LINE-DRV  	BIDIR
14			B5  				74ASXX:LINE-DRV  	BIDIR
15			B4  				74ASXX:LINE-DRV  	BIDIR
16			B3  				74ASXX:LINE-DRV  	BIDIR
17			B2  				74ASXX:LINE-DRV  	BIDIR
18			B1  				74ASXX:LINE-DRV  	BIDIR
19			(G-)BA 			74ASXX:GATE			IN
20			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS620_TSSOP
[Model File]		PML.MOD
[Package Model]    TSSOP20
|
[Pin]		signal_name 	model_name  		direction
|
1			GAB  				74ASXX:GATE			IN
2			A1					74ASXX:LINE-DRV  	BIDIR
3			A2					74ASXX:LINE-DRV  	BIDIR
4			A3					74ASXX:LINE-DRV  	BIDIR
5			A4					74ASXX:LINE-DRV  	BIDIR
6			A5					74ASXX:LINE-DRV  	BIDIR
7			A6					74ASXX:LINE-DRV  	BIDIR
8			A7					74ASXX:LINE-DRV  	BIDIR
9			A8					74ASXX:LINE-DRV  	BIDIR
10			GND 				GND  					NA
11			B8  				74ASXX:LINE-DRV  	BIDIR
12			B7  				74ASXX:LINE-DRV  	BIDIR
13			B6  				74ASXX:LINE-DRV  	BIDIR
14			B5  				74ASXX:LINE-DRV  	BIDIR
15			B4  				74ASXX:LINE-DRV  	BIDIR
16			B3  				74ASXX:LINE-DRV  	BIDIR
17			B2  				74ASXX:LINE-DRV  	BIDIR
18			B1  				74ASXX:LINE-DRV  	BIDIR
19			(G-)BA 			74ASXX:GATE			IN
20			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS621_DIP
[Model File]		PML.MOD
[Package Model]    DIP20
|
[Pin]		signal_name 	model_name  		direction
|
1			GAB  				74ASXX:GATE			IN
2			A1					74ASXX:LINE-DRV  	BIDIR
3			A2					74ASXX:LINE-DRV  	BIDIR
4			A3					74ASXX:LINE-DRV  	BIDIR
5			A4					74ASXX:LINE-DRV  	BIDIR
6			A5					74ASXX:LINE-DRV  	BIDIR
7			A6					74ASXX:LINE-DRV  	BIDIR
8			A7					74ASXX:LINE-DRV  	BIDIR
9			A8					74ASXX:LINE-DRV  	BIDIR
10			GND 				GND  					NA
11			B8  				74ASXX:LINE-DRV  	BIDIR
12			B7  				74ASXX:LINE-DRV  	BIDIR
13			B6  				74ASXX:LINE-DRV  	BIDIR
14			B5  				74ASXX:LINE-DRV  	BIDIR
15			B4  				74ASXX:LINE-DRV  	BIDIR
16			B3  				74ASXX:LINE-DRV  	BIDIR
17			B2  				74ASXX:LINE-DRV  	BIDIR
18			B1  				74ASXX:LINE-DRV  	BIDIR
19			(G-)BA 			74ASXX:GATE			IN
20			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS621_SOIC
[Model File]		PML.MOD
[Package Model]    SOIC20
|
[Pin]		signal_name 	model_name  		direction
|
1			GAB  				74ASXX:GATE			IN
2			A1					74ASXX:LINE-DRV  	BIDIR
3			A2					74ASXX:LINE-DRV  	BIDIR
4			A3					74ASXX:LINE-DRV  	BIDIR
5			A4					74ASXX:LINE-DRV  	BIDIR
6			A5					74ASXX:LINE-DRV  	BIDIR
7			A6					74ASXX:LINE-DRV  	BIDIR
8			A7					74ASXX:LINE-DRV  	BIDIR
9			A8					74ASXX:LINE-DRV  	BIDIR
10			GND 				GND  					NA
11			B8  				74ASXX:LINE-DRV  	BIDIR
12			B7  				74ASXX:LINE-DRV  	BIDIR
13			B6  				74ASXX:LINE-DRV  	BIDIR
14			B5  				74ASXX:LINE-DRV  	BIDIR
15			B4  				74ASXX:LINE-DRV  	BIDIR
16			B3  				74ASXX:LINE-DRV  	BIDIR
17			B2  				74ASXX:LINE-DRV  	BIDIR
18			B1  				74ASXX:LINE-DRV  	BIDIR
19			(G-)BA 			74ASXX:GATE			IN
20			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS621_SSOP
[Model File]		PML.MOD
[Package Model]    SSOP20
|
[Pin]		signal_name 	model_name  		direction
|
1			GAB  				74ASXX:GATE			IN
2			A1					74ASXX:LINE-DRV  	BIDIR
3			A2					74ASXX:LINE-DRV  	BIDIR
4			A3					74ASXX:LINE-DRV  	BIDIR
5			A4					74ASXX:LINE-DRV  	BIDIR
6			A5					74ASXX:LINE-DRV  	BIDIR
7			A6					74ASXX:LINE-DRV  	BIDIR
8			A7					74ASXX:LINE-DRV  	BIDIR
9			A8					74ASXX:LINE-DRV  	BIDIR
10			GND 				GND  					NA
11			B8  				74ASXX:LINE-DRV  	BIDIR
12			B7  				74ASXX:LINE-DRV  	BIDIR
13			B6  				74ASXX:LINE-DRV  	BIDIR
14			B5  				74ASXX:LINE-DRV  	BIDIR
15			B4  				74ASXX:LINE-DRV  	BIDIR
16			B3  				74ASXX:LINE-DRV  	BIDIR
17			B2  				74ASXX:LINE-DRV  	BIDIR
18			B1  				74ASXX:LINE-DRV  	BIDIR
19			(G-)BA 			74ASXX:GATE			IN
20			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS621_TSSOP
[Model File]		PML.MOD
[Package Model]    TSSOP20
|
[Pin]		signal_name 	model_name  		direction
|
1			GAB  				74ASXX:GATE			IN
2			A1					74ASXX:LINE-DRV  	BIDIR
3			A2					74ASXX:LINE-DRV  	BIDIR
4			A3					74ASXX:LINE-DRV  	BIDIR
5			A4					74ASXX:LINE-DRV  	BIDIR
6			A5					74ASXX:LINE-DRV  	BIDIR
7			A6					74ASXX:LINE-DRV  	BIDIR
8			A7					74ASXX:LINE-DRV  	BIDIR
9			A8					74ASXX:LINE-DRV  	BIDIR
10			GND 				GND  					NA
11			B8  				74ASXX:LINE-DRV  	BIDIR
12			B7  				74ASXX:LINE-DRV  	BIDIR
13			B6  				74ASXX:LINE-DRV  	BIDIR
14			B5  				74ASXX:LINE-DRV  	BIDIR
15			B4  				74ASXX:LINE-DRV  	BIDIR
16			B3  				74ASXX:LINE-DRV  	BIDIR
17			B2  				74ASXX:LINE-DRV  	BIDIR
18			B1  				74ASXX:LINE-DRV  	BIDIR
19			(G-)BA 			74ASXX:GATE			IN
20			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS622_DIP
[Model File]		PML.MOD
[Package Model]    DIP20
|
[Pin]		signal_name 	model_name  		direction
|
1			GAB  				74ASXX:GATE			IN
2			A1					74ASXX:OPEN-COL  	BIDIR
3			A2					74ASXX:OPEN-COL  	BIDIR
4			A3					74ASXX:OPEN-COL  	BIDIR
5			A4					74ASXX:OPEN-COL  	BIDIR
6			A5					74ASXX:OPEN-COL  	BIDIR
7			A6					74ASXX:OPEN-COL  	BIDIR
8			A7					74ASXX:OPEN-COL  	BIDIR
9			A8					74ASXX:OPEN-COL  	BIDIR
10			GND 				GND  					NA
11			B8  				74ASXX:OPEN-COL  	BIDIR
12			B7  				74ASXX:OPEN-COL  	BIDIR
13			B6  				74ASXX:OPEN-COL  	BIDIR
14			B5  				74ASXX:OPEN-COL  	BIDIR
15			B4  				74ASXX:OPEN-COL  	BIDIR
16			B3  				74ASXX:OPEN-COL  	BIDIR
17			B2  				74ASXX:OPEN-COL  	BIDIR
18			B1  				74ASXX:OPEN-COL  	BIDIR
19			(G-)BA 			74ASXX:GATE			IN
20			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS622_SOIC
[Model File]		PML.MOD
[Package Model]    SOIC20
|
[Pin]		signal_name 	model_name  		direction
|
1			GAB  				74ASXX:GATE			IN
2			A1					74ASXX:OPEN-COL  	BIDIR
3			A2					74ASXX:OPEN-COL  	BIDIR
4			A3					74ASXX:OPEN-COL  	BIDIR
5			A4					74ASXX:OPEN-COL  	BIDIR
6			A5					74ASXX:OPEN-COL  	BIDIR
7			A6					74ASXX:OPEN-COL  	BIDIR
8			A7					74ASXX:OPEN-COL  	BIDIR
9			A8					74ASXX:OPEN-COL  	BIDIR
10			GND 				GND  					NA
11			B8  				74ASXX:OPEN-COL  	BIDIR
12			B7  				74ASXX:OPEN-COL  	BIDIR
13			B6  				74ASXX:OPEN-COL  	BIDIR
14			B5  				74ASXX:OPEN-COL  	BIDIR
15			B4  				74ASXX:OPEN-COL  	BIDIR
16			B3  				74ASXX:OPEN-COL  	BIDIR
17			B2  				74ASXX:OPEN-COL  	BIDIR
18			B1  				74ASXX:OPEN-COL  	BIDIR
19			(G-)BA 			74ASXX:GATE			IN
20			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS622_SSOP
[Model File]		PML.MOD
[Package Model]    SSOP20
|
[Pin]		signal_name 	model_name  		direction
|
1			GAB  				74ASXX:GATE			IN
2			A1					74ASXX:OPEN-COL  	BIDIR
3			A2					74ASXX:OPEN-COL  	BIDIR
4			A3					74ASXX:OPEN-COL  	BIDIR
5			A4					74ASXX:OPEN-COL  	BIDIR
6			A5					74ASXX:OPEN-COL  	BIDIR
7			A6					74ASXX:OPEN-COL  	BIDIR
8			A7					74ASXX:OPEN-COL  	BIDIR
9			A8					74ASXX:OPEN-COL  	BIDIR
10			GND 				GND  					NA
11			B8  				74ASXX:OPEN-COL  	BIDIR
12			B7  				74ASXX:OPEN-COL  	BIDIR
13			B6  				74ASXX:OPEN-COL  	BIDIR
14			B5  				74ASXX:OPEN-COL  	BIDIR
15			B4  				74ASXX:OPEN-COL  	BIDIR
16			B3  				74ASXX:OPEN-COL  	BIDIR
17			B2  				74ASXX:OPEN-COL  	BIDIR
18			B1  				74ASXX:OPEN-COL  	BIDIR
19			(G-)BA 			74ASXX:GATE			IN
20			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS622_TSSOP
[Model File]		PML.MOD
[Package Model]    TSSOP20
|
[Pin]		signal_name 	model_name  		direction
|
1			GAB  				74ASXX:GATE			IN
2			A1					74ASXX:OPEN-COL  	BIDIR
3			A2					74ASXX:OPEN-COL  	BIDIR
4			A3					74ASXX:OPEN-COL  	BIDIR
5			A4					74ASXX:OPEN-COL  	BIDIR
6			A5					74ASXX:OPEN-COL  	BIDIR
7			A6					74ASXX:OPEN-COL  	BIDIR
8			A7					74ASXX:OPEN-COL  	BIDIR
9			A8					74ASXX:OPEN-COL  	BIDIR
10			GND 				GND  					NA
11			B8  				74ASXX:OPEN-COL  	BIDIR
12			B7  				74ASXX:OPEN-COL  	BIDIR
13			B6  				74ASXX:OPEN-COL  	BIDIR
14			B5  				74ASXX:OPEN-COL  	BIDIR
15			B4  				74ASXX:OPEN-COL  	BIDIR
16			B3  				74ASXX:OPEN-COL  	BIDIR
17			B2  				74ASXX:OPEN-COL  	BIDIR
18			B1  				74ASXX:OPEN-COL  	BIDIR
19			(G-)BA 			74ASXX:GATE			IN
20			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS623_DIP
[Model File]		PML.MOD
[Package Model]    DIP20
|
[Pin]		signal_name 	model_name  		direction
|
1			GAB  				74ASXX:GATE			IN
2			A1					74ASXX:LINE-DRV  	BIDIR
3			A2					74ASXX:LINE-DRV  	BIDIR
4			A3					74ASXX:LINE-DRV  	BIDIR
5			A4					74ASXX:LINE-DRV  	BIDIR
6			A5					74ASXX:LINE-DRV  	BIDIR
7			A6					74ASXX:LINE-DRV  	BIDIR
8			A7					74ASXX:LINE-DRV  	BIDIR
9			A8					74ASXX:LINE-DRV  	BIDIR
10			GND 				GND  					NA
11			B8  				74ASXX:LINE-DRV  	BIDIR
12			B7  				74ASXX:LINE-DRV  	BIDIR
13			B6  				74ASXX:LINE-DRV  	BIDIR
14			B5  				74ASXX:LINE-DRV  	BIDIR
15			B4  				74ASXX:LINE-DRV  	BIDIR
16			B3  				74ASXX:LINE-DRV  	BIDIR
17			B2  				74ASXX:LINE-DRV  	BIDIR
18			B1  				74ASXX:LINE-DRV  	BIDIR
19			GBA-				74ASXX:GATE			IN
20			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS623_SOIC
[Model File]		PML.MOD
[Package Model]    SOIC20
|
[Pin]		signal_name 	model_name  		direction
|
1			GAB  				74ASXX:GATE			IN
2			A1					74ASXX:LINE-DRV  	BIDIR
3			A2					74ASXX:LINE-DRV  	BIDIR
4			A3					74ASXX:LINE-DRV  	BIDIR
5			A4					74ASXX:LINE-DRV  	BIDIR
6			A5					74ASXX:LINE-DRV  	BIDIR
7			A6					74ASXX:LINE-DRV  	BIDIR
8			A7					74ASXX:LINE-DRV  	BIDIR
9			A8					74ASXX:LINE-DRV  	BIDIR
10			GND 				GND  					NA
11			B8  				74ASXX:LINE-DRV  	BIDIR
12			B7  				74ASXX:LINE-DRV  	BIDIR
13			B6  				74ASXX:LINE-DRV  	BIDIR
14			B5  				74ASXX:LINE-DRV  	BIDIR
15			B4  				74ASXX:LINE-DRV  	BIDIR
16			B3  				74ASXX:LINE-DRV  	BIDIR
17			B2  				74ASXX:LINE-DRV  	BIDIR
18			B1  				74ASXX:LINE-DRV  	BIDIR
19			GBA-				74ASXX:GATE			IN
20			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS623_SSOP
[Model File]		PML.MOD
[Package Model]    SSOP20
|
[Pin]		signal_name 	model_name  		direction
|
1			GAB  				74ASXX:GATE			IN
2			A1					74ASXX:LINE-DRV  	BIDIR
3			A2					74ASXX:LINE-DRV  	BIDIR
4			A3					74ASXX:LINE-DRV  	BIDIR
5			A4					74ASXX:LINE-DRV  	BIDIR
6			A5					74ASXX:LINE-DRV  	BIDIR
7			A6					74ASXX:LINE-DRV  	BIDIR
8			A7					74ASXX:LINE-DRV  	BIDIR
9			A8					74ASXX:LINE-DRV  	BIDIR
10			GND 				GND  					NA
11			B8  				74ASXX:LINE-DRV  	BIDIR
12			B7  				74ASXX:LINE-DRV  	BIDIR
13			B6  				74ASXX:LINE-DRV  	BIDIR
14			B5  				74ASXX:LINE-DRV  	BIDIR
15			B4  				74ASXX:LINE-DRV  	BIDIR
16			B3  				74ASXX:LINE-DRV  	BIDIR
17			B2  				74ASXX:LINE-DRV  	BIDIR
18			B1  				74ASXX:LINE-DRV  	BIDIR
19			GBA-				74ASXX:GATE			IN
20			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS623_TSSOP
[Model File]		PML.MOD
[Package Model]    TSSOP20
|
[Pin]		signal_name 	model_name  		direction
|
1			GAB  				74ASXX:GATE			IN
2			A1					74ASXX:LINE-DRV  	BIDIR
3			A2					74ASXX:LINE-DRV  	BIDIR
4			A3					74ASXX:LINE-DRV  	BIDIR
5			A4					74ASXX:LINE-DRV  	BIDIR
6			A5					74ASXX:LINE-DRV  	BIDIR
7			A6					74ASXX:LINE-DRV  	BIDIR
8			A7					74ASXX:LINE-DRV  	BIDIR
9			A8					74ASXX:LINE-DRV  	BIDIR
10			GND 				GND  					NA
11			B8  				74ASXX:LINE-DRV  	BIDIR
12			B7  				74ASXX:LINE-DRV  	BIDIR
13			B6  				74ASXX:LINE-DRV  	BIDIR
14			B5  				74ASXX:LINE-DRV  	BIDIR
15			B4  				74ASXX:LINE-DRV  	BIDIR
16			B3  				74ASXX:LINE-DRV  	BIDIR
17			B2  				74ASXX:LINE-DRV  	BIDIR
18			B1  				74ASXX:LINE-DRV  	BIDIR
19			GBA-				74ASXX:GATE			IN
20			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS638_DIP
[Model File]		PML.MOD
[Package Model]    DIP20
|
[Pin]		signal_name 	model_name  		direction
|
1			DIR  				74ASXX:GATE			IN
2			A1					74ASXX:OPEN-COL  	BIDIR
3			A2					74ASXX:OPEN-COL  	BIDIR
4			A3					74ASXX:OPEN-COL  	BIDIR
5			A4					74ASXX:OPEN-COL  	BIDIR
6			A5					74ASXX:OPEN-COL  	BIDIR
7			A6					74ASXX:OPEN-COL  	BIDIR
8			A7					74ASXX:OPEN-COL  	BIDIR
9			A8					74ASXX:OPEN-COL  	BIDIR
10			GND 				GND  					NA
11			B8  				74ASXX:LINE-DRV  	BIDIR
12			B7  				74ASXX:LINE-DRV  	BIDIR
13			B6  				74ASXX:LINE-DRV  	BIDIR
14			B5  				74ASXX:LINE-DRV  	BIDIR
15			B4  				74ASXX:LINE-DRV  	BIDIR
16			B3  				74ASXX:LINE-DRV  	BIDIR
17			B2  				74ASXX:LINE-DRV  	BIDIR
18			B1  				74ASXX:LINE-DRV  	BIDIR
19			G-  				74ASXX:GATE			IN
20			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS638_SOIC
[Model File]		PML.MOD
[Package Model]    SOIC20
|
[Pin]		signal_name 	model_name  		direction
|
1			DIR  				74ASXX:GATE			IN
2			A1					74ASXX:OPEN-COL  	BIDIR
3			A2					74ASXX:OPEN-COL  	BIDIR
4			A3					74ASXX:OPEN-COL  	BIDIR
5			A4					74ASXX:OPEN-COL  	BIDIR
6			A5					74ASXX:OPEN-COL  	BIDIR
7			A6					74ASXX:OPEN-COL  	BIDIR
8			A7					74ASXX:OPEN-COL  	BIDIR
9			A8					74ASXX:OPEN-COL  	BIDIR
10			GND 				GND  					NA
11			B8  				74ASXX:LINE-DRV  	BIDIR
12			B7  				74ASXX:LINE-DRV  	BIDIR
13			B6  				74ASXX:LINE-DRV  	BIDIR
14			B5  				74ASXX:LINE-DRV  	BIDIR
15			B4  				74ASXX:LINE-DRV  	BIDIR
16			B3  				74ASXX:LINE-DRV  	BIDIR
17			B2  				74ASXX:LINE-DRV  	BIDIR
18			B1  				74ASXX:LINE-DRV  	BIDIR
19			G-  				74ASXX:GATE			IN
20			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS638_SSOP
[Model File]		PML.MOD
[Package Model]    SSOP20
|
[Pin]		signal_name 	model_name  		direction
|
1			DIR  				74ASXX:GATE			IN
2			A1					74ASXX:OPEN-COL  	BIDIR
3			A2					74ASXX:OPEN-COL  	BIDIR
4			A3					74ASXX:OPEN-COL  	BIDIR
5			A4					74ASXX:OPEN-COL  	BIDIR
6			A5					74ASXX:OPEN-COL  	BIDIR
7			A6					74ASXX:OPEN-COL  	BIDIR
8			A7					74ASXX:OPEN-COL  	BIDIR
9			A8					74ASXX:OPEN-COL  	BIDIR
10			GND 				GND  					NA
11			B8  				74ASXX:LINE-DRV  	BIDIR
12			B7  				74ASXX:LINE-DRV  	BIDIR
13			B6  				74ASXX:LINE-DRV  	BIDIR
14			B5  				74ASXX:LINE-DRV  	BIDIR
15			B4  				74ASXX:LINE-DRV  	BIDIR
16			B3  				74ASXX:LINE-DRV  	BIDIR
17			B2  				74ASXX:LINE-DRV  	BIDIR
18			B1  				74ASXX:LINE-DRV  	BIDIR
19			G-  				74ASXX:GATE			IN
20			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS638_TSSOP
[Model File]		PML.MOD
[Package Model]    TSSOP20
|
[Pin]		signal_name 	model_name  		direction
|
1			DIR  				74ASXX:GATE			IN
2			A1					74ASXX:OPEN-COL  	BIDIR
3			A2					74ASXX:OPEN-COL  	BIDIR
4			A3					74ASXX:OPEN-COL  	BIDIR
5			A4					74ASXX:OPEN-COL  	BIDIR
6			A5					74ASXX:OPEN-COL  	BIDIR
7			A6					74ASXX:OPEN-COL  	BIDIR
8			A7					74ASXX:OPEN-COL  	BIDIR
9			A8					74ASXX:OPEN-COL  	BIDIR
10			GND 				GND  					NA
11			B8  				74ASXX:LINE-DRV  	BIDIR
12			B7  				74ASXX:LINE-DRV  	BIDIR
13			B6  				74ASXX:LINE-DRV  	BIDIR
14			B5  				74ASXX:LINE-DRV  	BIDIR
15			B4  				74ASXX:LINE-DRV  	BIDIR
16			B3  				74ASXX:LINE-DRV  	BIDIR
17			B2  				74ASXX:LINE-DRV  	BIDIR
18			B1  				74ASXX:LINE-DRV  	BIDIR
19			G-  				74ASXX:GATE			IN
20			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS639_DIP
[Model File]		PML.MOD
[Package Model]    DIP20
|
[Pin]		signal_name 	model_name  		direction
|
1			DIR  				74ASXX:GATE			IN
2			A1					74ASXX:OPEN-COL  	BIDIR
3			A2					74ASXX:OPEN-COL  	BIDIR
4			A3					74ASXX:OPEN-COL  	BIDIR
5			A4					74ASXX:OPEN-COL  	BIDIR
6			A5					74ASXX:OPEN-COL  	BIDIR
7			A6					74ASXX:OPEN-COL  	BIDIR
8			A7					74ASXX:OPEN-COL  	BIDIR
9			A8					74ASXX:OPEN-COL  	BIDIR
10			GND 				GND  					NA
11			B8  				74ASXX:LINE-DRV  	BIDIR
12			B7  				74ASXX:LINE-DRV  	BIDIR
13			B6  				74ASXX:LINE-DRV  	BIDIR
14			B5  				74ASXX:LINE-DRV  	BIDIR
15			B4  				74ASXX:LINE-DRV  	BIDIR
16			B3  				74ASXX:LINE-DRV  	BIDIR
17			B2  				74ASXX:LINE-DRV  	BIDIR
18			B1  				74ASXX:LINE-DRV  	BIDIR
19			G-  				74ASXX:GATE			IN
20			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS639_SOIC
[Model File]		PML.MOD
[Package Model]    SOIC20
|
[Pin]		signal_name 	model_name  		direction
|
1			DIR  				74ASXX:GATE			IN
2			A1					74ASXX:OPEN-COL  	BIDIR
3			A2					74ASXX:OPEN-COL  	BIDIR
4			A3					74ASXX:OPEN-COL  	BIDIR
5			A4					74ASXX:OPEN-COL  	BIDIR
6			A5					74ASXX:OPEN-COL  	BIDIR
7			A6					74ASXX:OPEN-COL  	BIDIR
8			A7					74ASXX:OPEN-COL  	BIDIR
9			A8					74ASXX:OPEN-COL  	BIDIR
10			GND 				GND  					NA
11			B8  				74ASXX:LINE-DRV  	BIDIR
12			B7  				74ASXX:LINE-DRV  	BIDIR
13			B6  				74ASXX:LINE-DRV  	BIDIR
14			B5  				74ASXX:LINE-DRV  	BIDIR
15			B4  				74ASXX:LINE-DRV  	BIDIR
16			B3  				74ASXX:LINE-DRV  	BIDIR
17			B2  				74ASXX:LINE-DRV  	BIDIR
18			B1  				74ASXX:LINE-DRV  	BIDIR
19			G-  				74ASXX:GATE			IN
20			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS639_SSOP
[Model File]		PML.MOD
[Package Model]    SSOP20
|
[Pin]		signal_name 	model_name  		direction
|
1			DIR  				74ASXX:GATE			IN
2			A1					74ASXX:OPEN-COL  	BIDIR
3			A2					74ASXX:OPEN-COL  	BIDIR
4			A3					74ASXX:OPEN-COL  	BIDIR
5			A4					74ASXX:OPEN-COL  	BIDIR
6			A5					74ASXX:OPEN-COL  	BIDIR
7			A6					74ASXX:OPEN-COL  	BIDIR
8			A7					74ASXX:OPEN-COL  	BIDIR
9			A8					74ASXX:OPEN-COL  	BIDIR
10			GND 				GND  					NA
11			B8  				74ASXX:LINE-DRV  	BIDIR
12			B7  				74ASXX:LINE-DRV  	BIDIR
13			B6  				74ASXX:LINE-DRV  	BIDIR
14			B5  				74ASXX:LINE-DRV  	BIDIR
15			B4  				74ASXX:LINE-DRV  	BIDIR
16			B3  				74ASXX:LINE-DRV  	BIDIR
17			B2  				74ASXX:LINE-DRV  	BIDIR
18			B1  				74ASXX:LINE-DRV  	BIDIR
19			G-  				74ASXX:GATE			IN
20			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS639_TSSOP
[Model File]		PML.MOD
[Package Model]    TSSOP20
|
[Pin]		signal_name 	model_name  		direction
|
1			DIR  				74ASXX:GATE			IN
2			A1					74ASXX:OPEN-COL  	BIDIR
3			A2					74ASXX:OPEN-COL  	BIDIR
4			A3					74ASXX:OPEN-COL  	BIDIR
5			A4					74ASXX:OPEN-COL  	BIDIR
6			A5					74ASXX:OPEN-COL  	BIDIR
7			A6					74ASXX:OPEN-COL  	BIDIR
8			A7					74ASXX:OPEN-COL  	BIDIR
9			A8					74ASXX:OPEN-COL  	BIDIR
10			GND 				GND  					NA
11			B8  				74ASXX:LINE-DRV  	BIDIR
12			B7  				74ASXX:LINE-DRV  	BIDIR
13			B6  				74ASXX:LINE-DRV  	BIDIR
14			B5  				74ASXX:LINE-DRV  	BIDIR
15			B4  				74ASXX:LINE-DRV  	BIDIR
16			B3  				74ASXX:LINE-DRV  	BIDIR
17			B2  				74ASXX:LINE-DRV  	BIDIR
18			B1  				74ASXX:LINE-DRV  	BIDIR
19			G-  				74ASXX:GATE			IN
20			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS640_DIP
[Model File]		PML.MOD
[Package Model]    DIP20
|
[Pin]		signal_name 	model_name  		direction
|
1			DIR  				74ASXX:GATE			IN
2			A1					74ASXX:LINE-DRV  	BIDIR
3			A2					74ASXX:LINE-DRV  	BIDIR
4			A3					74ASXX:LINE-DRV  	BIDIR
5			A4					74ASXX:LINE-DRV  	BIDIR
6			A5					74ASXX:LINE-DRV  	BIDIR
7			A6					74ASXX:LINE-DRV  	BIDIR
8			A7					74ASXX:LINE-DRV  	BIDIR
9			A8					74ASXX:LINE-DRV  	BIDIR
10			GND 				GND  					NA
11			B8  				74ASXX:LINE-DRV  	BIDIR
12			B7  				74ASXX:LINE-DRV  	BIDIR
13			B6  				74ASXX:LINE-DRV  	BIDIR
14			B5  				74ASXX:LINE-DRV  	BIDIR
15			B4  				74ASXX:LINE-DRV  	BIDIR
16			B3  				74ASXX:LINE-DRV  	BIDIR
17			B2  				74ASXX:LINE-DRV  	BIDIR
18			B1  				74ASXX:LINE-DRV  	BIDIR
19			G-  				74ASXX:GATE			IN
20			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS640_SOIC
[Model File]		PML.MOD
[Package Model]    SOIC20
|
[Pin]		signal_name 	model_name  		direction
|
1			DIR  				74ASXX:GATE			IN
2			A1					74ASXX:LINE-DRV  	BIDIR
3			A2					74ASXX:LINE-DRV  	BIDIR
4			A3					74ASXX:LINE-DRV  	BIDIR
5			A4					74ASXX:LINE-DRV  	BIDIR
6			A5					74ASXX:LINE-DRV  	BIDIR
7			A6					74ASXX:LINE-DRV  	BIDIR
8			A7					74ASXX:LINE-DRV  	BIDIR
9			A8					74ASXX:LINE-DRV  	BIDIR
10			GND 				GND  					NA
11			B8  				74ASXX:LINE-DRV  	BIDIR
12			B7  				74ASXX:LINE-DRV  	BIDIR
13			B6  				74ASXX:LINE-DRV  	BIDIR
14			B5  				74ASXX:LINE-DRV  	BIDIR
15			B4  				74ASXX:LINE-DRV  	BIDIR
16			B3  				74ASXX:LINE-DRV  	BIDIR
17			B2  				74ASXX:LINE-DRV  	BIDIR
18			B1  				74ASXX:LINE-DRV  	BIDIR
19			G-  				74ASXX:GATE			IN
20			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS640_SSOP
[Model File]		PML.MOD
[Package Model]    SSOP20
|
[Pin]		signal_name 	model_name  		direction
|
1			DIR  				74ASXX:GATE			IN
2			A1					74ASXX:LINE-DRV  	BIDIR
3			A2					74ASXX:LINE-DRV  	BIDIR
4			A3					74ASXX:LINE-DRV  	BIDIR
5			A4					74ASXX:LINE-DRV  	BIDIR
6			A5					74ASXX:LINE-DRV  	BIDIR
7			A6					74ASXX:LINE-DRV  	BIDIR
8			A7					74ASXX:LINE-DRV  	BIDIR
9			A8					74ASXX:LINE-DRV  	BIDIR
10			GND 				GND  					NA
11			B8  				74ASXX:LINE-DRV  	BIDIR
12			B7  				74ASXX:LINE-DRV  	BIDIR
13			B6  				74ASXX:LINE-DRV  	BIDIR
14			B5  				74ASXX:LINE-DRV  	BIDIR
15			B4  				74ASXX:LINE-DRV  	BIDIR
16			B3  				74ASXX:LINE-DRV  	BIDIR
17			B2  				74ASXX:LINE-DRV  	BIDIR
18			B1  				74ASXX:LINE-DRV  	BIDIR
19			G-  				74ASXX:GATE			IN
20			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS640_TSSOP
[Model File]		PML.MOD
[Package Model]    TSSOP20
|
[Pin]		signal_name 	model_name  		direction
|
1			DIR  				74ASXX:GATE			IN
2			A1					74ASXX:LINE-DRV  	BIDIR
3			A2					74ASXX:LINE-DRV  	BIDIR
4			A3					74ASXX:LINE-DRV  	BIDIR
5			A4					74ASXX:LINE-DRV  	BIDIR
6			A5					74ASXX:LINE-DRV  	BIDIR
7			A6					74ASXX:LINE-DRV  	BIDIR
8			A7					74ASXX:LINE-DRV  	BIDIR
9			A8					74ASXX:LINE-DRV  	BIDIR
10			GND 				GND  					NA
11			B8  				74ASXX:LINE-DRV  	BIDIR
12			B7  				74ASXX:LINE-DRV  	BIDIR
13			B6  				74ASXX:LINE-DRV  	BIDIR
14			B5  				74ASXX:LINE-DRV  	BIDIR
15			B4  				74ASXX:LINE-DRV  	BIDIR
16			B3  				74ASXX:LINE-DRV  	BIDIR
17			B2  				74ASXX:LINE-DRV  	BIDIR
18			B1  				74ASXX:LINE-DRV  	BIDIR
19			G-  				74ASXX:GATE			IN
20			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS641_DIP
[Model File]		PML.MOD
[Package Model]    DIP20
|
[Pin]		signal_name 	model_name  		direction
|
1			T/R- 				74ASXX:GATE			IN
2			A1					74ASXX:OPEN-COL  	BIDIR
3			A2					74ASXX:OPEN-COL  	BIDIR
4			A3					74ASXX:OPEN-COL  	BIDIR
5			A4					74ASXX:OPEN-COL  	BIDIR
6			A5					74ASXX:OPEN-COL  	BIDIR
7			A6					74ASXX:OPEN-COL  	BIDIR
8			A7					74ASXX:OPEN-COL  	BIDIR
9			A8					74ASXX:OPEN-COL  	BIDIR
10			GND 				GND  					NA
11			B8  				74ASXX:OPEN-COL  	BIDIR
12			B7  				74ASXX:OPEN-COL  	BIDIR
13			B6  				74ASXX:OPEN-COL  	BIDIR
14			B5  				74ASXX:OPEN-COL  	BIDIR
15			B4  				74ASXX:OPEN-COL  	BIDIR
16			B3  				74ASXX:OPEN-COL  	BIDIR
17			B2  				74ASXX:OPEN-COL  	BIDIR
18			B1  				74ASXX:OPEN-COL  	BIDIR
19			G-  				74ASXX:GATE			IN
20			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS641_SOIC
[Model File]		PML.MOD
[Package Model]    SOIC20
|
[Pin]		signal_name 	model_name  		direction
|
1			T/R- 				74ASXX:GATE			IN
2			A1					74ASXX:OPEN-COL  	BIDIR
3			A2					74ASXX:OPEN-COL  	BIDIR
4			A3					74ASXX:OPEN-COL  	BIDIR
5			A4					74ASXX:OPEN-COL  	BIDIR
6			A5					74ASXX:OPEN-COL  	BIDIR
7			A6					74ASXX:OPEN-COL  	BIDIR
8			A7					74ASXX:OPEN-COL  	BIDIR
9			A8					74ASXX:OPEN-COL  	BIDIR
10			GND 				GND  					NA
11			B8  				74ASXX:OPEN-COL  	BIDIR
12			B7  				74ASXX:OPEN-COL  	BIDIR
13			B6  				74ASXX:OPEN-COL  	BIDIR
14			B5  				74ASXX:OPEN-COL  	BIDIR
15			B4  				74ASXX:OPEN-COL  	BIDIR
16			B3  				74ASXX:OPEN-COL  	BIDIR
17			B2  				74ASXX:OPEN-COL  	BIDIR
18			B1  				74ASXX:OPEN-COL  	BIDIR
19			G-  				74ASXX:GATE			IN
20			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS641_SSOP
[Model File]		PML.MOD
[Package Model]    SSOP20
|
[Pin]		signal_name 	model_name  		direction
|
1			T/R- 				74ASXX:GATE			IN
2			A1					74ASXX:OPEN-COL  	BIDIR
3			A2					74ASXX:OPEN-COL  	BIDIR
4			A3					74ASXX:OPEN-COL  	BIDIR
5			A4					74ASXX:OPEN-COL  	BIDIR
6			A5					74ASXX:OPEN-COL  	BIDIR
7			A6					74ASXX:OPEN-COL  	BIDIR
8			A7					74ASXX:OPEN-COL  	BIDIR
9			A8					74ASXX:OPEN-COL  	BIDIR
10			GND 				GND  					NA
11			B8  				74ASXX:OPEN-COL  	BIDIR
12			B7  				74ASXX:OPEN-COL  	BIDIR
13			B6  				74ASXX:OPEN-COL  	BIDIR
14			B5  				74ASXX:OPEN-COL  	BIDIR
15			B4  				74ASXX:OPEN-COL  	BIDIR
16			B3  				74ASXX:OPEN-COL  	BIDIR
17			B2  				74ASXX:OPEN-COL  	BIDIR
18			B1  				74ASXX:OPEN-COL  	BIDIR
19			G-  				74ASXX:GATE			IN
20			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS641_TSSOP
[Model File]		PML.MOD
[Package Model]    TSSOP20
|
[Pin]		signal_name 	model_name  		direction
|
1			T/R- 				74ASXX:GATE			IN
2			A1					74ASXX:OPEN-COL  	BIDIR
3			A2					74ASXX:OPEN-COL  	BIDIR
4			A3					74ASXX:OPEN-COL  	BIDIR
5			A4					74ASXX:OPEN-COL  	BIDIR
6			A5					74ASXX:OPEN-COL  	BIDIR
7			A6					74ASXX:OPEN-COL  	BIDIR
8			A7					74ASXX:OPEN-COL  	BIDIR
9			A8					74ASXX:OPEN-COL  	BIDIR
10			GND 				GND  					NA
11			B8  				74ASXX:OPEN-COL  	BIDIR
12			B7  				74ASXX:OPEN-COL  	BIDIR
13			B6  				74ASXX:OPEN-COL  	BIDIR
14			B5  				74ASXX:OPEN-COL  	BIDIR
15			B4  				74ASXX:OPEN-COL  	BIDIR
16			B3  				74ASXX:OPEN-COL  	BIDIR
17			B2  				74ASXX:OPEN-COL  	BIDIR
18			B1  				74ASXX:OPEN-COL  	BIDIR
19			G-  				74ASXX:GATE			IN
20			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS642_DIP
[Model File]		PML.MOD
[Package Model]    DIP20
|
[Pin]		signal_name 	model_name  		direction
|
1			T/R- 				74ASXX:GATE			IN
2			A1					74ASXX:OPEN-COL  	BIDIR
3			A2					74ASXX:OPEN-COL  	BIDIR
4			A3					74ASXX:OPEN-COL  	BIDIR
5			A4					74ASXX:OPEN-COL  	BIDIR
6			A5					74ASXX:OPEN-COL  	BIDIR
7			A6					74ASXX:OPEN-COL  	BIDIR
8			A7					74ASXX:OPEN-COL  	BIDIR
9			A8					74ASXX:OPEN-COL  	BIDIR
10			GND 				GND  					NA
11			B8  				74ASXX:OPEN-COL  	BIDIR
12			B7  				74ASXX:OPEN-COL  	BIDIR
13			B6  				74ASXX:OPEN-COL  	BIDIR
14			B5  				74ASXX:OPEN-COL  	BIDIR
15			B4  				74ASXX:OPEN-COL  	BIDIR
16			B3  				74ASXX:OPEN-COL  	BIDIR
17			B2  				74ASXX:OPEN-COL  	BIDIR
18			B1  				74ASXX:OPEN-COL  	BIDIR
19			G-  				74ASXX:GATE			IN
20			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS642_SOIC
[Model File]		PML.MOD
[Package Model]    SOIC20
|
[Pin]		signal_name 	model_name  		direction
|
1			T/R- 				74ASXX:GATE			IN
2			A1					74ASXX:OPEN-COL  	BIDIR
3			A2					74ASXX:OPEN-COL  	BIDIR
4			A3					74ASXX:OPEN-COL  	BIDIR
5			A4					74ASXX:OPEN-COL  	BIDIR
6			A5					74ASXX:OPEN-COL  	BIDIR
7			A6					74ASXX:OPEN-COL  	BIDIR
8			A7					74ASXX:OPEN-COL  	BIDIR
9			A8					74ASXX:OPEN-COL  	BIDIR
10			GND 				GND  					NA
11			B8  				74ASXX:OPEN-COL  	BIDIR
12			B7  				74ASXX:OPEN-COL  	BIDIR
13			B6  				74ASXX:OPEN-COL  	BIDIR
14			B5  				74ASXX:OPEN-COL  	BIDIR
15			B4  				74ASXX:OPEN-COL  	BIDIR
16			B3  				74ASXX:OPEN-COL  	BIDIR
17			B2  				74ASXX:OPEN-COL  	BIDIR
18			B1  				74ASXX:OPEN-COL  	BIDIR
19			G-  				74ASXX:GATE			IN
20			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS642_SSOP
[Model File]		PML.MOD
[Package Model]    SSOP20
|
[Pin]		signal_name 	model_name  		direction
|
1			T/R- 				74ASXX:GATE			IN
2			A1					74ASXX:OPEN-COL  	BIDIR
3			A2					74ASXX:OPEN-COL  	BIDIR
4			A3					74ASXX:OPEN-COL  	BIDIR
5			A4					74ASXX:OPEN-COL  	BIDIR
6			A5					74ASXX:OPEN-COL  	BIDIR
7			A6					74ASXX:OPEN-COL  	BIDIR
8			A7					74ASXX:OPEN-COL  	BIDIR
9			A8					74ASXX:OPEN-COL  	BIDIR
10			GND 				GND  					NA
11			B8  				74ASXX:OPEN-COL  	BIDIR
12			B7  				74ASXX:OPEN-COL  	BIDIR
13			B6  				74ASXX:OPEN-COL  	BIDIR
14			B5  				74ASXX:OPEN-COL  	BIDIR
15			B4  				74ASXX:OPEN-COL  	BIDIR
16			B3  				74ASXX:OPEN-COL  	BIDIR
17			B2  				74ASXX:OPEN-COL  	BIDIR
18			B1  				74ASXX:OPEN-COL  	BIDIR
19			G-  				74ASXX:GATE			IN
20			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS642_TSSOP
[Model File]		PML.MOD
[Package Model]    TSSOP20
|
[Pin]		signal_name 	model_name  		direction
|
1			T/R- 				74ASXX:GATE			IN
2			A1					74ASXX:OPEN-COL  	BIDIR
3			A2					74ASXX:OPEN-COL  	BIDIR
4			A3					74ASXX:OPEN-COL  	BIDIR
5			A4					74ASXX:OPEN-COL  	BIDIR
6			A5					74ASXX:OPEN-COL  	BIDIR
7			A6					74ASXX:OPEN-COL  	BIDIR
8			A7					74ASXX:OPEN-COL  	BIDIR
9			A8					74ASXX:OPEN-COL  	BIDIR
10			GND 				GND  					NA
11			B8  				74ASXX:OPEN-COL  	BIDIR
12			B7  				74ASXX:OPEN-COL  	BIDIR
13			B6  				74ASXX:OPEN-COL  	BIDIR
14			B5  				74ASXX:OPEN-COL  	BIDIR
15			B4  				74ASXX:OPEN-COL  	BIDIR
16			B3  				74ASXX:OPEN-COL  	BIDIR
17			B2  				74ASXX:OPEN-COL  	BIDIR
18			B1  				74ASXX:OPEN-COL  	BIDIR
19			G-  				74ASXX:GATE			IN
20			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS643_DIP
[Model File]		PML.MOD
[Package Model]    DIP20
|
[Pin]		signal_name 	model_name  		direction
|
1			DIR  				74ASXX:GATE			IN
2			A1					74ASXX:LINE-DRV  	BIDIR
3			A2					74ASXX:LINE-DRV  	BIDIR
4			A3					74ASXX:LINE-DRV  	BIDIR
5			A4					74ASXX:LINE-DRV  	BIDIR
6			A5					74ASXX:LINE-DRV  	BIDIR
7			A6					74ASXX:LINE-DRV  	BIDIR
8			A7					74ASXX:LINE-DRV  	BIDIR
9			A8					74ASXX:LINE-DRV  	BIDIR
10			GND 				GND  					NA
11			B8  				74ASXX:LINE-DRV  	BIDIR
12			B7  				74ASXX:LINE-DRV  	BIDIR
13			B6  				74ASXX:LINE-DRV  	BIDIR
14			B5  				74ASXX:LINE-DRV  	BIDIR
15			B4  				74ASXX:LINE-DRV  	BIDIR
16			B3  				74ASXX:LINE-DRV  	BIDIR
17			B2  				74ASXX:LINE-DRV  	BIDIR
18			B1  				74ASXX:LINE-DRV  	BIDIR
19			G-  				74ASXX:GATE			IN
20			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS643_SOIC
[Model File]		PML.MOD
[Package Model]    SOIC20
|
[Pin]		signal_name 	model_name  		direction
|
1			DIR  				74ASXX:GATE			IN
2			A1					74ASXX:LINE-DRV  	BIDIR
3			A2					74ASXX:LINE-DRV  	BIDIR
4			A3					74ASXX:LINE-DRV  	BIDIR
5			A4					74ASXX:LINE-DRV  	BIDIR
6			A5					74ASXX:LINE-DRV  	BIDIR
7			A6					74ASXX:LINE-DRV  	BIDIR
8			A7					74ASXX:LINE-DRV  	BIDIR
9			A8					74ASXX:LINE-DRV  	BIDIR
10			GND 				GND  					NA
11			B8  				74ASXX:LINE-DRV  	BIDIR
12			B7  				74ASXX:LINE-DRV  	BIDIR
13			B6  				74ASXX:LINE-DRV  	BIDIR
14			B5  				74ASXX:LINE-DRV  	BIDIR
15			B4  				74ASXX:LINE-DRV  	BIDIR
16			B3  				74ASXX:LINE-DRV  	BIDIR
17			B2  				74ASXX:LINE-DRV  	BIDIR
18			B1  				74ASXX:LINE-DRV  	BIDIR
19			G-  				74ASXX:GATE			IN
20			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS643_SSOP
[Model File]		PML.MOD
[Package Model]    SSOP20
|
[Pin]		signal_name 	model_name  		direction
|
1			DIR  				74ASXX:GATE			IN
2			A1					74ASXX:LINE-DRV  	BIDIR
3			A2					74ASXX:LINE-DRV  	BIDIR
4			A3					74ASXX:LINE-DRV  	BIDIR
5			A4					74ASXX:LINE-DRV  	BIDIR
6			A5					74ASXX:LINE-DRV  	BIDIR
7			A6					74ASXX:LINE-DRV  	BIDIR
8			A7					74ASXX:LINE-DRV  	BIDIR
9			A8					74ASXX:LINE-DRV  	BIDIR
10			GND 				GND  					NA
11			B8  				74ASXX:LINE-DRV  	BIDIR
12			B7  				74ASXX:LINE-DRV  	BIDIR
13			B6  				74ASXX:LINE-DRV  	BIDIR
14			B5  				74ASXX:LINE-DRV  	BIDIR
15			B4  				74ASXX:LINE-DRV  	BIDIR
16			B3  				74ASXX:LINE-DRV  	BIDIR
17			B2  				74ASXX:LINE-DRV  	BIDIR
18			B1  				74ASXX:LINE-DRV  	BIDIR
19			G-  				74ASXX:GATE			IN
20			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS643_TSSOP
[Model File]		PML.MOD
[Package Model]    TSSOP20
|
[Pin]		signal_name 	model_name  		direction
|
1			DIR  				74ASXX:GATE			IN
2			A1					74ASXX:LINE-DRV  	BIDIR
3			A2					74ASXX:LINE-DRV  	BIDIR
4			A3					74ASXX:LINE-DRV  	BIDIR
5			A4					74ASXX:LINE-DRV  	BIDIR
6			A5					74ASXX:LINE-DRV  	BIDIR
7			A6					74ASXX:LINE-DRV  	BIDIR
8			A7					74ASXX:LINE-DRV  	BIDIR
9			A8					74ASXX:LINE-DRV  	BIDIR
10			GND 				GND  					NA
11			B8  				74ASXX:LINE-DRV  	BIDIR
12			B7  				74ASXX:LINE-DRV  	BIDIR
13			B6  				74ASXX:LINE-DRV  	BIDIR
14			B5  				74ASXX:LINE-DRV  	BIDIR
15			B4  				74ASXX:LINE-DRV  	BIDIR
16			B3  				74ASXX:LINE-DRV  	BIDIR
17			B2  				74ASXX:LINE-DRV  	BIDIR
18			B1  				74ASXX:LINE-DRV  	BIDIR
19			G-  				74ASXX:GATE			IN
20			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS644_DIP
[Model File]		PML.MOD
[Package Model]    DIP20
|
[Pin]		signal_name 	model_name  		direction
|
1			DIR  				74ASXX:GATE			IN
2			A1					74ASXX:OPEN-COL  	BIDIR
3			A2					74ASXX:OPEN-COL  	BIDIR
4			A3					74ASXX:OPEN-COL  	BIDIR
5			A4					74ASXX:OPEN-COL  	BIDIR
6			A5					74ASXX:OPEN-COL  	BIDIR
7			A6					74ASXX:OPEN-COL  	BIDIR
8			A7					74ASXX:OPEN-COL  	BIDIR
9			A8					74ASXX:OPEN-COL  	BIDIR
10			GND 				GND  					NA
11			B8  				74ASXX:OPEN-COL  	BIDIR
12			B7  				74ASXX:OPEN-COL  	BIDIR
13			B6  				74ASXX:OPEN-COL  	BIDIR
14			B5  				74ASXX:OPEN-COL  	BIDIR
15			B4  				74ASXX:OPEN-COL  	BIDIR
16			B3  				74ASXX:OPEN-COL  	BIDIR
17			B2  				74ASXX:OPEN-COL  	BIDIR
18			B1  				74ASXX:OPEN-COL  	BIDIR
19			G-  				74ASXX:GATE			IN
20			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS644_SOIC
[Model File]		PML.MOD
[Package Model]    SOIC20
|
[Pin]		signal_name 	model_name  		direction
|
1			DIR  				74ASXX:GATE			IN
2			A1					74ASXX:OPEN-COL  	BIDIR
3			A2					74ASXX:OPEN-COL  	BIDIR
4			A3					74ASXX:OPEN-COL  	BIDIR
5			A4					74ASXX:OPEN-COL  	BIDIR
6			A5					74ASXX:OPEN-COL  	BIDIR
7			A6					74ASXX:OPEN-COL  	BIDIR
8			A7					74ASXX:OPEN-COL  	BIDIR
9			A8					74ASXX:OPEN-COL  	BIDIR
10			GND 				GND  					NA
11			B8  				74ASXX:OPEN-COL  	BIDIR
12			B7  				74ASXX:OPEN-COL  	BIDIR
13			B6  				74ASXX:OPEN-COL  	BIDIR
14			B5  				74ASXX:OPEN-COL  	BIDIR
15			B4  				74ASXX:OPEN-COL  	BIDIR
16			B3  				74ASXX:OPEN-COL  	BIDIR
17			B2  				74ASXX:OPEN-COL  	BIDIR
18			B1  				74ASXX:OPEN-COL  	BIDIR
19			G-  				74ASXX:GATE			IN
20			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS644_SSOP
[Model File]		PML.MOD
[Package Model]    SSOP20
|
[Pin]		signal_name 	model_name  		direction
|
1			DIR  				74ASXX:GATE			IN
2			A1					74ASXX:OPEN-COL  	BIDIR
3			A2					74ASXX:OPEN-COL  	BIDIR
4			A3					74ASXX:OPEN-COL  	BIDIR
5			A4					74ASXX:OPEN-COL  	BIDIR
6			A5					74ASXX:OPEN-COL  	BIDIR
7			A6					74ASXX:OPEN-COL  	BIDIR
8			A7					74ASXX:OPEN-COL  	BIDIR
9			A8					74ASXX:OPEN-COL  	BIDIR
10			GND 				GND  					NA
11			B8  				74ASXX:OPEN-COL  	BIDIR
12			B7  				74ASXX:OPEN-COL  	BIDIR
13			B6  				74ASXX:OPEN-COL  	BIDIR
14			B5  				74ASXX:OPEN-COL  	BIDIR
15			B4  				74ASXX:OPEN-COL  	BIDIR
16			B3  				74ASXX:OPEN-COL  	BIDIR
17			B2  				74ASXX:OPEN-COL  	BIDIR
18			B1  				74ASXX:OPEN-COL  	BIDIR
19			G-  				74ASXX:GATE			IN
20			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS644_TSSOP
[Model File]		PML.MOD
[Package Model]    TSSOP20
|
[Pin]		signal_name 	model_name  		direction
|
1			DIR  				74ASXX:GATE			IN
2			A1					74ASXX:OPEN-COL  	BIDIR
3			A2					74ASXX:OPEN-COL  	BIDIR
4			A3					74ASXX:OPEN-COL  	BIDIR
5			A4					74ASXX:OPEN-COL  	BIDIR
6			A5					74ASXX:OPEN-COL  	BIDIR
7			A6					74ASXX:OPEN-COL  	BIDIR
8			A7					74ASXX:OPEN-COL  	BIDIR
9			A8					74ASXX:OPEN-COL  	BIDIR
10			GND 				GND  					NA
11			B8  				74ASXX:OPEN-COL  	BIDIR
12			B7  				74ASXX:OPEN-COL  	BIDIR
13			B6  				74ASXX:OPEN-COL  	BIDIR
14			B5  				74ASXX:OPEN-COL  	BIDIR
15			B4  				74ASXX:OPEN-COL  	BIDIR
16			B3  				74ASXX:OPEN-COL  	BIDIR
17			B2  				74ASXX:OPEN-COL  	BIDIR
18			B1  				74ASXX:OPEN-COL  	BIDIR
19			G-  				74ASXX:GATE			IN
20			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS645_DIP
[Model File]		PML.MOD
[Package Model]    DIP20
|
[Pin]		signal_name 	model_name  		direction
|
1			DIR  				74ASXX:GATE			IN
2			A1					74ASXX:LINE-DRV  	BIDIR
3			A2					74ASXX:LINE-DRV  	BIDIR
4			A3					74ASXX:LINE-DRV  	BIDIR
5			A4					74ASXX:LINE-DRV  	BIDIR
6			A5					74ASXX:LINE-DRV  	BIDIR
7			A6					74ASXX:LINE-DRV  	BIDIR
8			A7					74ASXX:LINE-DRV  	BIDIR
9			A8					74ASXX:LINE-DRV  	BIDIR
10			GND 				GND  					NA
11			B8  				74ASXX:LINE-DRV  	BIDIR
12			B7  				74ASXX:LINE-DRV  	BIDIR
13			B6  				74ASXX:LINE-DRV  	BIDIR
14			B5  				74ASXX:LINE-DRV  	BIDIR
15			B4  				74ASXX:LINE-DRV  	BIDIR
16			B3  				74ASXX:LINE-DRV  	BIDIR
17			B2  				74ASXX:LINE-DRV  	BIDIR
18			B1  				74ASXX:LINE-DRV  	BIDIR
19			G-  				74ASXX:GATE			IN
20			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS645_SOIC
[Model File]		PML.MOD
[Package Model]    SOIC20
|
[Pin]		signal_name 	model_name  		direction
|
1			DIR  				74ASXX:GATE			IN
2			A1					74ASXX:LINE-DRV  	BIDIR
3			A2					74ASXX:LINE-DRV  	BIDIR
4			A3					74ASXX:LINE-DRV  	BIDIR
5			A4					74ASXX:LINE-DRV  	BIDIR
6			A5					74ASXX:LINE-DRV  	BIDIR
7			A6					74ASXX:LINE-DRV  	BIDIR
8			A7					74ASXX:LINE-DRV  	BIDIR
9			A8					74ASXX:LINE-DRV  	BIDIR
10			GND 				GND  					NA
11			B8  				74ASXX:LINE-DRV  	BIDIR
12			B7  				74ASXX:LINE-DRV  	BIDIR
13			B6  				74ASXX:LINE-DRV  	BIDIR
14			B5  				74ASXX:LINE-DRV  	BIDIR
15			B4  				74ASXX:LINE-DRV  	BIDIR
16			B3  				74ASXX:LINE-DRV  	BIDIR
17			B2  				74ASXX:LINE-DRV  	BIDIR
18			B1  				74ASXX:LINE-DRV  	BIDIR
19			G-  				74ASXX:GATE			IN
20			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS645_SSOP
[Model File]		PML.MOD
[Package Model]    SSOP20
|
[Pin]		signal_name 	model_name  		direction
|
1			DIR  				74ASXX:GATE			IN
2			A1					74ASXX:LINE-DRV  	BIDIR
3			A2					74ASXX:LINE-DRV  	BIDIR
4			A3					74ASXX:LINE-DRV  	BIDIR
5			A4					74ASXX:LINE-DRV  	BIDIR
6			A5					74ASXX:LINE-DRV  	BIDIR
7			A6					74ASXX:LINE-DRV  	BIDIR
8			A7					74ASXX:LINE-DRV  	BIDIR
9			A8					74ASXX:LINE-DRV  	BIDIR
10			GND 				GND  					NA
11			B8  				74ASXX:LINE-DRV  	BIDIR
12			B7  				74ASXX:LINE-DRV  	BIDIR
13			B6  				74ASXX:LINE-DRV  	BIDIR
14			B5  				74ASXX:LINE-DRV  	BIDIR
15			B4  				74ASXX:LINE-DRV  	BIDIR
16			B3  				74ASXX:LINE-DRV  	BIDIR
17			B2  				74ASXX:LINE-DRV  	BIDIR
18			B1  				74ASXX:LINE-DRV  	BIDIR
19			G-  				74ASXX:GATE			IN
20			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS645_TSSOP
[Model File]		PML.MOD
[Package Model]    TSSOP20
|
[Pin]		signal_name 	model_name  		direction
|
1			DIR  				74ASXX:GATE			IN
2			A1					74ASXX:LINE-DRV  	BIDIR
3			A2					74ASXX:LINE-DRV  	BIDIR
4			A3					74ASXX:LINE-DRV  	BIDIR
5			A4					74ASXX:LINE-DRV  	BIDIR
6			A5					74ASXX:LINE-DRV  	BIDIR
7			A6					74ASXX:LINE-DRV  	BIDIR
8			A7					74ASXX:LINE-DRV  	BIDIR
9			A8					74ASXX:LINE-DRV  	BIDIR
10			GND 				GND  					NA
11			B8  				74ASXX:LINE-DRV  	BIDIR
12			B7  				74ASXX:LINE-DRV  	BIDIR
13			B6  				74ASXX:LINE-DRV  	BIDIR
14			B5  				74ASXX:LINE-DRV  	BIDIR
15			B4  				74ASXX:LINE-DRV  	BIDIR
16			B3  				74ASXX:LINE-DRV  	BIDIR
17			B2  				74ASXX:LINE-DRV  	BIDIR
18			B1  				74ASXX:LINE-DRV  	BIDIR
19			G-  				74ASXX:GATE			IN
20			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS646_DIP
[Model File]		PML.MOD
[Package Model]    DIP24
|
[Pin]		signal_name 	model_name  		direction
|
1			CAB  				74ASXX:GATE			IN
2			SAB  				74ASXX:GATE			IN
3			DIR  				74ASXX:GATE			IN
4			A1					74ASXX:LINE-DRV  	BIDIR
5			A2					74ASXX:LINE-DRV  	BIDIR
6			A3					74ASXX:LINE-DRV  	BIDIR
7			A4					74ASXX:LINE-DRV  	BIDIR
8			A5					74ASXX:LINE-DRV  	BIDIR
9			A6					74ASXX:LINE-DRV  	BIDIR
10			A7  				74ASXX:LINE-DRV  	BIDIR
11			A8  				74ASXX:LINE-DRV  	BIDIR
12			GND 				GND  					NA
13			B8  				74ASXX:LINE-DRV  	BIDIR
14			B7  				74ASXX:LINE-DRV  	BIDIR
15			B6  				74ASXX:LINE-DRV  	BIDIR
16			B5  				74ASXX:LINE-DRV  	BIDIR
17			B4  				74ASXX:LINE-DRV  	BIDIR
18			B3  				74ASXX:LINE-DRV  	BIDIR
19			B2  				74ASXX:LINE-DRV  	BIDIR
20			B1  				74ASXX:LINE-DRV  	BIDIR
21			G-  				74ASXX:GATE			IN
22			SBA 				74ASXX:GATE			IN
23			CBA 				74ASXX:GATE			IN
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS646_SOIC
[Model File]		PML.MOD
[Package Model]    SOIC24
|
[Pin]		signal_name 	model_name  		direction
|
1			CAB  				74ASXX:GATE			IN
2			SAB  				74ASXX:GATE			IN
3			DIR  				74ASXX:GATE			IN
4			A1					74ASXX:LINE-DRV  	BIDIR
5			A2					74ASXX:LINE-DRV  	BIDIR
6			A3					74ASXX:LINE-DRV  	BIDIR
7			A4					74ASXX:LINE-DRV  	BIDIR
8			A5					74ASXX:LINE-DRV  	BIDIR
9			A6					74ASXX:LINE-DRV  	BIDIR
10			A7  				74ASXX:LINE-DRV  	BIDIR
11			A8  				74ASXX:LINE-DRV  	BIDIR
12			GND 				GND  					NA
13			B8  				74ASXX:LINE-DRV  	BIDIR
14			B7  				74ASXX:LINE-DRV  	BIDIR
15			B6  				74ASXX:LINE-DRV  	BIDIR
16			B5  				74ASXX:LINE-DRV  	BIDIR
17			B4  				74ASXX:LINE-DRV  	BIDIR
18			B3  				74ASXX:LINE-DRV  	BIDIR
19			B2  				74ASXX:LINE-DRV  	BIDIR
20			B1  				74ASXX:LINE-DRV  	BIDIR
21			G-  				74ASXX:GATE			IN
22			SBA 				74ASXX:GATE			IN
23			CBA 				74ASXX:GATE			IN
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS646_SSOP
[Model File]		PML.MOD
[Package Model]    SSOP24
|
[Pin]		signal_name 	model_name  		direction
|
1			CAB  				74ASXX:GATE			IN
2			SAB  				74ASXX:GATE			IN
3			DIR  				74ASXX:GATE			IN
4			A1					74ASXX:LINE-DRV  	BIDIR
5			A2					74ASXX:LINE-DRV  	BIDIR
6			A3					74ASXX:LINE-DRV  	BIDIR
7			A4					74ASXX:LINE-DRV  	BIDIR
8			A5					74ASXX:LINE-DRV  	BIDIR
9			A6					74ASXX:LINE-DRV  	BIDIR
10			A7  				74ASXX:LINE-DRV  	BIDIR
11			A8  				74ASXX:LINE-DRV  	BIDIR
12			GND 				GND  					NA
13			B8  				74ASXX:LINE-DRV  	BIDIR
14			B7  				74ASXX:LINE-DRV  	BIDIR
15			B6  				74ASXX:LINE-DRV  	BIDIR
16			B5  				74ASXX:LINE-DRV  	BIDIR
17			B4  				74ASXX:LINE-DRV  	BIDIR
18			B3  				74ASXX:LINE-DRV  	BIDIR
19			B2  				74ASXX:LINE-DRV  	BIDIR
20			B1  				74ASXX:LINE-DRV  	BIDIR
21			G-  				74ASXX:GATE			IN
22			SBA 				74ASXX:GATE			IN
23			CBA 				74ASXX:GATE			IN
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS646_TSSOP
[Model File]		PML.MOD
[Package Model]    TSSOP24
|
[Pin]		signal_name 	model_name  		direction
|
1			CAB  				74ASXX:GATE			IN
2			SAB  				74ASXX:GATE			IN
3			DIR  				74ASXX:GATE			IN
4			A1					74ASXX:LINE-DRV  	BIDIR
5			A2					74ASXX:LINE-DRV  	BIDIR
6			A3					74ASXX:LINE-DRV  	BIDIR
7			A4					74ASXX:LINE-DRV  	BIDIR
8			A5					74ASXX:LINE-DRV  	BIDIR
9			A6					74ASXX:LINE-DRV  	BIDIR
10			A7  				74ASXX:LINE-DRV  	BIDIR
11			A8  				74ASXX:LINE-DRV  	BIDIR
12			GND 				GND  					NA
13			B8  				74ASXX:LINE-DRV  	BIDIR
14			B7  				74ASXX:LINE-DRV  	BIDIR
15			B6  				74ASXX:LINE-DRV  	BIDIR
16			B5  				74ASXX:LINE-DRV  	BIDIR
17			B4  				74ASXX:LINE-DRV  	BIDIR
18			B3  				74ASXX:LINE-DRV  	BIDIR
19			B2  				74ASXX:LINE-DRV  	BIDIR
20			B1  				74ASXX:LINE-DRV  	BIDIR
21			G-  				74ASXX:GATE			IN
22			SBA 				74ASXX:GATE			IN
23			CBA 				74ASXX:GATE			IN
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS646_DIP
[Model File]		PML.MOD
[Package Model]    DIP24
|
[Pin]		signal_name 	model_name  		direction
|
1			CAB  				74ASXX:GATE			IN
2			SAB  				74ASXX:GATE			IN
3			DIR  				74ASXX:GATE			IN
4			A1					74ASXX:LINE-DRV  	BIDIR
5			A2					74ASXX:LINE-DRV  	BIDIR
6			A3					74ASXX:LINE-DRV  	BIDIR
7			A4					74ASXX:LINE-DRV  	BIDIR
8			A5					74ASXX:LINE-DRV  	BIDIR
9			A6					74ASXX:LINE-DRV  	BIDIR
10			A7  				74ASXX:LINE-DRV  	BIDIR
11			A8  				74ASXX:LINE-DRV  	BIDIR
12			GND 				GND  					NA
13			B8  				74ASXX:LINE-DRV  	BIDIR
14			B7  				74ASXX:LINE-DRV  	BIDIR
15			B6  				74ASXX:LINE-DRV  	BIDIR
16			B5  				74ASXX:LINE-DRV  	BIDIR
17			B4  				74ASXX:LINE-DRV  	BIDIR
18			B3  				74ASXX:LINE-DRV  	BIDIR
19			B2  				74ASXX:LINE-DRV  	BIDIR
20			B1  				74ASXX:LINE-DRV  	BIDIR
21			G-  				74ASXX:GATE			IN
22			SBA 				74ASXX:GATE			IN
23			CBA 				74ASXX:GATE			IN
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS646_SOIC
[Model File]		PML.MOD
[Package Model]    SOIC24
|
[Pin]		signal_name 	model_name  		direction
|
1			CAB  				74ASXX:GATE			IN
2			SAB  				74ASXX:GATE			IN
3			DIR  				74ASXX:GATE			IN
4			A1					74ASXX:LINE-DRV  	BIDIR
5			A2					74ASXX:LINE-DRV  	BIDIR
6			A3					74ASXX:LINE-DRV  	BIDIR
7			A4					74ASXX:LINE-DRV  	BIDIR
8			A5					74ASXX:LINE-DRV  	BIDIR
9			A6					74ASXX:LINE-DRV  	BIDIR
10			A7  				74ASXX:LINE-DRV  	BIDIR
11			A8  				74ASXX:LINE-DRV  	BIDIR
12			GND 				GND  					NA
13			B8  				74ASXX:LINE-DRV  	BIDIR
14			B7  				74ASXX:LINE-DRV  	BIDIR
15			B6  				74ASXX:LINE-DRV  	BIDIR
16			B5  				74ASXX:LINE-DRV  	BIDIR
17			B4  				74ASXX:LINE-DRV  	BIDIR
18			B3  				74ASXX:LINE-DRV  	BIDIR
19			B2  				74ASXX:LINE-DRV  	BIDIR
20			B1  				74ASXX:LINE-DRV  	BIDIR
21			G-  				74ASXX:GATE			IN
22			SBA 				74ASXX:GATE			IN
23			CBA 				74ASXX:GATE			IN
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS646_SSOP
[Model File]		PML.MOD
[Package Model]    SSOP24
|
[Pin]		signal_name 	model_name  		direction
|
1			CAB  				74ASXX:GATE			IN
2			SAB  				74ASXX:GATE			IN
3			DIR  				74ASXX:GATE			IN
4			A1					74ASXX:LINE-DRV  	BIDIR
5			A2					74ASXX:LINE-DRV  	BIDIR
6			A3					74ASXX:LINE-DRV  	BIDIR
7			A4					74ASXX:LINE-DRV  	BIDIR
8			A5					74ASXX:LINE-DRV  	BIDIR
9			A6					74ASXX:LINE-DRV  	BIDIR
10			A7  				74ASXX:LINE-DRV  	BIDIR
11			A8  				74ASXX:LINE-DRV  	BIDIR
12			GND 				GND  					NA
13			B8  				74ASXX:LINE-DRV  	BIDIR
14			B7  				74ASXX:LINE-DRV  	BIDIR
15			B6  				74ASXX:LINE-DRV  	BIDIR
16			B5  				74ASXX:LINE-DRV  	BIDIR
17			B4  				74ASXX:LINE-DRV  	BIDIR
18			B3  				74ASXX:LINE-DRV  	BIDIR
19			B2  				74ASXX:LINE-DRV  	BIDIR
20			B1  				74ASXX:LINE-DRV  	BIDIR
21			G-  				74ASXX:GATE			IN
22			SBA 				74ASXX:GATE			IN
23			CBA 				74ASXX:GATE			IN
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS646_TSSOP
[Model File]		PML.MOD
[Package Model]    TSSOP24
|
[Pin]		signal_name 	model_name  		direction
|
1			CAB  				74ASXX:GATE			IN
2			SAB  				74ASXX:GATE			IN
3			DIR  				74ASXX:GATE			IN
4			A1					74ASXX:LINE-DRV  	BIDIR
5			A2					74ASXX:LINE-DRV  	BIDIR
6			A3					74ASXX:LINE-DRV  	BIDIR
7			A4					74ASXX:LINE-DRV  	BIDIR
8			A5					74ASXX:LINE-DRV  	BIDIR
9			A6					74ASXX:LINE-DRV  	BIDIR
10			A7  				74ASXX:LINE-DRV  	BIDIR
11			A8  				74ASXX:LINE-DRV  	BIDIR
12			GND 				GND  					NA
13			B8  				74ASXX:LINE-DRV  	BIDIR
14			B7  				74ASXX:LINE-DRV  	BIDIR
15			B6  				74ASXX:LINE-DRV  	BIDIR
16			B5  				74ASXX:LINE-DRV  	BIDIR
17			B4  				74ASXX:LINE-DRV  	BIDIR
18			B3  				74ASXX:LINE-DRV  	BIDIR
19			B2  				74ASXX:LINE-DRV  	BIDIR
20			B1  				74ASXX:LINE-DRV  	BIDIR
21			G-  				74ASXX:GATE			IN
22			SBA 				74ASXX:GATE			IN
23			CBA 				74ASXX:GATE			IN
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS648_DIP
[Model File]		PML.MOD
[Package Model]    DIP24
|
[Pin]		signal_name 	model_name  		direction
|
1			CAB  				74ASXX:GATE			IN
2			SAB  				74ASXX:GATE			IN
3			DIR  				74ASXX:GATE			IN
4			A1					74ASXX:LINE-DRV  	BIDIR
5			A2					74ASXX:LINE-DRV  	BIDIR
6			A3					74ASXX:LINE-DRV  	BIDIR
7			A4					74ASXX:LINE-DRV  	BIDIR
8			A5					74ASXX:LINE-DRV  	BIDIR
9			A6					74ASXX:LINE-DRV  	BIDIR
10			A7  				74ASXX:LINE-DRV  	BIDIR
11			A8  				74ASXX:LINE-DRV  	BIDIR
12			GND 				GND  					NA
13			B8  				74ASXX:LINE-DRV  	BIDIR
14			B7  				74ASXX:LINE-DRV  	BIDIR
15			B6  				74ASXX:LINE-DRV  	BIDIR
16			B5  				74ASXX:LINE-DRV  	BIDIR
17			B4  				74ASXX:LINE-DRV  	BIDIR
18			B3  				74ASXX:LINE-DRV  	BIDIR
19			B2  				74ASXX:LINE-DRV  	BIDIR
20			B1  				74ASXX:LINE-DRV  	BIDIR
21			G-  				74ASXX:GATE			IN
22			SBA 				74ASXX:GATE			IN
23			CBA 				74ASXX:GATE			IN
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS648_SOIC
[Model File]		PML.MOD
[Package Model]    SOIC24
|
[Pin]		signal_name 	model_name  		direction
|
1			CAB  				74ASXX:GATE			IN
2			SAB  				74ASXX:GATE			IN
3			DIR  				74ASXX:GATE			IN
4			A1					74ASXX:LINE-DRV  	BIDIR
5			A2					74ASXX:LINE-DRV  	BIDIR
6			A3					74ASXX:LINE-DRV  	BIDIR
7			A4					74ASXX:LINE-DRV  	BIDIR
8			A5					74ASXX:LINE-DRV  	BIDIR
9			A6					74ASXX:LINE-DRV  	BIDIR
10			A7  				74ASXX:LINE-DRV  	BIDIR
11			A8  				74ASXX:LINE-DRV  	BIDIR
12			GND 				GND  					NA
13			B8  				74ASXX:LINE-DRV  	BIDIR
14			B7  				74ASXX:LINE-DRV  	BIDIR
15			B6  				74ASXX:LINE-DRV  	BIDIR
16			B5  				74ASXX:LINE-DRV  	BIDIR
17			B4  				74ASXX:LINE-DRV  	BIDIR
18			B3  				74ASXX:LINE-DRV  	BIDIR
19			B2  				74ASXX:LINE-DRV  	BIDIR
20			B1  				74ASXX:LINE-DRV  	BIDIR
21			G-  				74ASXX:GATE			IN
22			SBA 				74ASXX:GATE			IN
23			CBA 				74ASXX:GATE			IN
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS648_SSOP
[Model File]		PML.MOD
[Package Model]    SSOP24
|
[Pin]		signal_name 	model_name  		direction
|
1			CAB  				74ASXX:GATE			IN
2			SAB  				74ASXX:GATE			IN
3			DIR  				74ASXX:GATE			IN
4			A1					74ASXX:LINE-DRV  	BIDIR
5			A2					74ASXX:LINE-DRV  	BIDIR
6			A3					74ASXX:LINE-DRV  	BIDIR
7			A4					74ASXX:LINE-DRV  	BIDIR
8			A5					74ASXX:LINE-DRV  	BIDIR
9			A6					74ASXX:LINE-DRV  	BIDIR
10			A7  				74ASXX:LINE-DRV  	BIDIR
11			A8  				74ASXX:LINE-DRV  	BIDIR
12			GND 				GND  					NA
13			B8  				74ASXX:LINE-DRV  	BIDIR
14			B7  				74ASXX:LINE-DRV  	BIDIR
15			B6  				74ASXX:LINE-DRV  	BIDIR
16			B5  				74ASXX:LINE-DRV  	BIDIR
17			B4  				74ASXX:LINE-DRV  	BIDIR
18			B3  				74ASXX:LINE-DRV  	BIDIR
19			B2  				74ASXX:LINE-DRV  	BIDIR
20			B1  				74ASXX:LINE-DRV  	BIDIR
21			G-  				74ASXX:GATE			IN
22			SBA 				74ASXX:GATE			IN
23			CBA 				74ASXX:GATE			IN
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS648_TSSOP
[Model File]		PML.MOD
[Package Model]    TSSOP24
|
[Pin]		signal_name 	model_name  		direction
|
1			CAB  				74ASXX:GATE			IN
2			SAB  				74ASXX:GATE			IN
3			DIR  				74ASXX:GATE			IN
4			A1					74ASXX:LINE-DRV  	BIDIR
5			A2					74ASXX:LINE-DRV  	BIDIR
6			A3					74ASXX:LINE-DRV  	BIDIR
7			A4					74ASXX:LINE-DRV  	BIDIR
8			A5					74ASXX:LINE-DRV  	BIDIR
9			A6					74ASXX:LINE-DRV  	BIDIR
10			A7  				74ASXX:LINE-DRV  	BIDIR
11			A8  				74ASXX:LINE-DRV  	BIDIR
12			GND 				GND  					NA
13			B8  				74ASXX:LINE-DRV  	BIDIR
14			B7  				74ASXX:LINE-DRV  	BIDIR
15			B6  				74ASXX:LINE-DRV  	BIDIR
16			B5  				74ASXX:LINE-DRV  	BIDIR
17			B4  				74ASXX:LINE-DRV  	BIDIR
18			B3  				74ASXX:LINE-DRV  	BIDIR
19			B2  				74ASXX:LINE-DRV  	BIDIR
20			B1  				74ASXX:LINE-DRV  	BIDIR
21			G-  				74ASXX:GATE			IN
22			SBA 				74ASXX:GATE			IN
23			CBA 				74ASXX:GATE			IN
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS648_DIP
[Model File]		PML.MOD
[Package Model]    DIP24
|
[Pin]		signal_name 	model_name  		direction
|
1			CLOCK_AB			74ASXX:GATE			IN
2			SELECT_AB  		74ASXX:GATE			IN
3			DIR  				74ASXX:GATE			IN
4			A1					74ASXX:LINE-DRV  	BIDIR
5			A2					74ASXX:LINE-DRV  	BIDIR
6			A3					74ASXX:LINE-DRV  	BIDIR
7			A4					74ASXX:LINE-DRV  	BIDIR
8			A5					74ASXX:LINE-DRV  	BIDIR
9			A6					74ASXX:LINE-DRV  	BIDIR
10			A7  				74ASXX:LINE-DRV  	BIDIR
11			A8  				74ASXX:LINE-DRV  	BIDIR
12			GND 				GND  					NA
13			B8  				74ASXX:LINE-DRV  	BIDIR
14			B7  				74ASXX:LINE-DRV  	BIDIR
15			B6  				74ASXX:LINE-DRV  	BIDIR
16			B5  				74ASXX:LINE-DRV  	BIDIR
17			B4  				74ASXX:LINE-DRV  	BIDIR
18			B3  				74ASXX:LINE-DRV  	BIDIR
19			B2  				74ASXX:LINE-DRV  	BIDIR
20			B1  				74ASXX:LINE-DRV  	BIDIR
21			ENB(G-)RA 		74ASXX:GATE			IN
22			SELECT_BA 		74ASXX:GATE			IN
23			CLOCK_BA  		74ASXX:GATE			IN
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS648_SOIC
[Model File]		PML.MOD
[Package Model]    SOIC24
|
[Pin]		signal_name 	model_name  		direction
|
1			CLOCK_AB			74ASXX:GATE			IN
2			SELECT_AB  		74ASXX:GATE			IN
3			DIR  				74ASXX:GATE			IN
4			A1					74ASXX:LINE-DRV  	BIDIR
5			A2					74ASXX:LINE-DRV  	BIDIR
6			A3					74ASXX:LINE-DRV  	BIDIR
7			A4					74ASXX:LINE-DRV  	BIDIR
8			A5					74ASXX:LINE-DRV  	BIDIR
9			A6					74ASXX:LINE-DRV  	BIDIR
10			A7  				74ASXX:LINE-DRV  	BIDIR
11			A8  				74ASXX:LINE-DRV  	BIDIR
12			GND 				GND  					NA
13			B8  				74ASXX:LINE-DRV  	BIDIR
14			B7  				74ASXX:LINE-DRV  	BIDIR
15			B6  				74ASXX:LINE-DRV  	BIDIR
16			B5  				74ASXX:LINE-DRV  	BIDIR
17			B4  				74ASXX:LINE-DRV  	BIDIR
18			B3  				74ASXX:LINE-DRV  	BIDIR
19			B2  				74ASXX:LINE-DRV  	BIDIR
20			B1  				74ASXX:LINE-DRV  	BIDIR
21			ENB(G-)RA 		74ASXX:GATE			IN
22			SELECT_BA 		74ASXX:GATE			IN
23			CLOCK_BA  		74ASXX:GATE			IN
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS648_SSOP
[Model File]		PML.MOD
[Package Model]    SSOP24
|
[Pin]		signal_name 	model_name  		direction
|
1			CLOCK_AB			74ASXX:GATE			IN
2			SELECT_AB  		74ASXX:GATE			IN
3			DIR  				74ASXX:GATE			IN
4			A1					74ASXX:LINE-DRV  	BIDIR
5			A2					74ASXX:LINE-DRV  	BIDIR
6			A3					74ASXX:LINE-DRV  	BIDIR
7			A4					74ASXX:LINE-DRV  	BIDIR
8			A5					74ASXX:LINE-DRV  	BIDIR
9			A6					74ASXX:LINE-DRV  	BIDIR
10			A7  				74ASXX:LINE-DRV  	BIDIR
11			A8  				74ASXX:LINE-DRV  	BIDIR
12			GND 				GND  					NA
13			B8  				74ASXX:LINE-DRV  	BIDIR
14			B7  				74ASXX:LINE-DRV  	BIDIR
15			B6  				74ASXX:LINE-DRV  	BIDIR
16			B5  				74ASXX:LINE-DRV  	BIDIR
17			B4  				74ASXX:LINE-DRV  	BIDIR
18			B3  				74ASXX:LINE-DRV  	BIDIR
19			B2  				74ASXX:LINE-DRV  	BIDIR
20			B1  				74ASXX:LINE-DRV  	BIDIR
21			ENB(G-)RA 		74ASXX:GATE			IN
22			SELECT_BA 		74ASXX:GATE			IN
23			CLOCK_BA  		74ASXX:GATE			IN
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS648_TSSOP
[Model File]		PML.MOD
[Package Model]    TSSOP24
|
[Pin]		signal_name 	model_name  		direction
|
1			CLOCK_AB			74ASXX:GATE			IN
2			SELECT_AB  		74ASXX:GATE			IN
3			DIR  				74ASXX:GATE			IN
4			A1					74ASXX:LINE-DRV  	BIDIR
5			A2					74ASXX:LINE-DRV  	BIDIR
6			A3					74ASXX:LINE-DRV  	BIDIR
7			A4					74ASXX:LINE-DRV  	BIDIR
8			A5					74ASXX:LINE-DRV  	BIDIR
9			A6					74ASXX:LINE-DRV  	BIDIR
10			A7  				74ASXX:LINE-DRV  	BIDIR
11			A8  				74ASXX:LINE-DRV  	BIDIR
12			GND 				GND  					NA
13			B8  				74ASXX:LINE-DRV  	BIDIR
14			B7  				74ASXX:LINE-DRV  	BIDIR
15			B6  				74ASXX:LINE-DRV  	BIDIR
16			B5  				74ASXX:LINE-DRV  	BIDIR
17			B4  				74ASXX:LINE-DRV  	BIDIR
18			B3  				74ASXX:LINE-DRV  	BIDIR
19			B2  				74ASXX:LINE-DRV  	BIDIR
20			B1  				74ASXX:LINE-DRV  	BIDIR
21			ENB(G-)RA 		74ASXX:GATE			IN
22			SELECT_BA 		74ASXX:GATE			IN
23			CLOCK_BA  		74ASXX:GATE			IN
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS651_DIP
[Model File]		PML.MOD
[Package Model]    DIP24
|
[Pin]		signal_name 	model_name  		direction
|
1			CAB  				74ASXX:GATE			IN
2			SAB  				74ASXX:GATE			IN
3			GAB  				74ASXX:GATE			IN
4			A1					74ASXX:LINE-DRV  	BIDIR
5			A2					74ASXX:LINE-DRV  	BIDIR
6			A3					74ASXX:LINE-DRV  	BIDIR
7			A4					74ASXX:LINE-DRV  	BIDIR
8			A5					74ASXX:LINE-DRV  	BIDIR
9			A6					74ASXX:LINE-DRV  	BIDIR
10			A7  				74ASXX:LINE-DRV  	BIDIR
11			A8  				74ASXX:LINE-DRV  	BIDIR
12			GND 				GND  					NA
13			B8  				74ASXX:LINE-DRV  	BIDIR
14			B7  				74ASXX:LINE-DRV  	BIDIR
15			B6  				74ASXX:LINE-DRV  	BIDIR
16			B5  				74ASXX:LINE-DRV  	BIDIR
17			B4  				74ASXX:LINE-DRV  	BIDIR
18			B3  				74ASXX:LINE-DRV  	BIDIR
19			B2  				74ASXX:LINE-DRV  	BIDIR
20			B1  				74ASXX:LINE-DRV  	BIDIR
21			(G-)BA 			74ASXX:GATE			IN
22			SBA 				74ASXX:GATE			IN
23			CBA 				74ASXX:GATE			IN
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS651_SOIC
[Model File]		PML.MOD
[Package Model]    SOIC24
|
[Pin]		signal_name 	model_name  		direction
|
1			CAB  				74ASXX:GATE			IN
2			SAB  				74ASXX:GATE			IN
3			GAB  				74ASXX:GATE			IN
4			A1					74ASXX:LINE-DRV  	BIDIR
5			A2					74ASXX:LINE-DRV  	BIDIR
6			A3					74ASXX:LINE-DRV  	BIDIR
7			A4					74ASXX:LINE-DRV  	BIDIR
8			A5					74ASXX:LINE-DRV  	BIDIR
9			A6					74ASXX:LINE-DRV  	BIDIR
10			A7  				74ASXX:LINE-DRV  	BIDIR
11			A8  				74ASXX:LINE-DRV  	BIDIR
12			GND 				GND  					NA
13			B8  				74ASXX:LINE-DRV  	BIDIR
14			B7  				74ASXX:LINE-DRV  	BIDIR
15			B6  				74ASXX:LINE-DRV  	BIDIR
16			B5  				74ASXX:LINE-DRV  	BIDIR
17			B4  				74ASXX:LINE-DRV  	BIDIR
18			B3  				74ASXX:LINE-DRV  	BIDIR
19			B2  				74ASXX:LINE-DRV  	BIDIR
20			B1  				74ASXX:LINE-DRV  	BIDIR
21			(G-)BA 			74ASXX:GATE			IN
22			SBA 				74ASXX:GATE			IN
23			CBA 				74ASXX:GATE			IN
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS651_SSOP
[Model File]		PML.MOD
[Package Model]    SSOP24
|
[Pin]		signal_name 	model_name  		direction
|
1			CAB  				74ASXX:GATE			IN
2			SAB  				74ASXX:GATE			IN
3			GAB  				74ASXX:GATE			IN
4			A1					74ASXX:LINE-DRV  	BIDIR
5			A2					74ASXX:LINE-DRV  	BIDIR
6			A3					74ASXX:LINE-DRV  	BIDIR
7			A4					74ASXX:LINE-DRV  	BIDIR
8			A5					74ASXX:LINE-DRV  	BIDIR
9			A6					74ASXX:LINE-DRV  	BIDIR
10			A7  				74ASXX:LINE-DRV  	BIDIR
11			A8  				74ASXX:LINE-DRV  	BIDIR
12			GND 				GND  					NA
13			B8  				74ASXX:LINE-DRV  	BIDIR
14			B7  				74ASXX:LINE-DRV  	BIDIR
15			B6  				74ASXX:LINE-DRV  	BIDIR
16			B5  				74ASXX:LINE-DRV  	BIDIR
17			B4  				74ASXX:LINE-DRV  	BIDIR
18			B3  				74ASXX:LINE-DRV  	BIDIR
19			B2  				74ASXX:LINE-DRV  	BIDIR
20			B1  				74ASXX:LINE-DRV  	BIDIR
21			(G-)BA 			74ASXX:GATE			IN
22			SBA 				74ASXX:GATE			IN
23			CBA 				74ASXX:GATE			IN
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS651_TSSOP
[Model File]		PML.MOD
[Package Model]    TSSOP24
|
[Pin]		signal_name 	model_name  		direction
|
1			CAB  				74ASXX:GATE			IN
2			SAB  				74ASXX:GATE			IN
3			GAB  				74ASXX:GATE			IN
4			A1					74ASXX:LINE-DRV  	BIDIR
5			A2					74ASXX:LINE-DRV  	BIDIR
6			A3					74ASXX:LINE-DRV  	BIDIR
7			A4					74ASXX:LINE-DRV  	BIDIR
8			A5					74ASXX:LINE-DRV  	BIDIR
9			A6					74ASXX:LINE-DRV  	BIDIR
10			A7  				74ASXX:LINE-DRV  	BIDIR
11			A8  				74ASXX:LINE-DRV  	BIDIR
12			GND 				GND  					NA
13			B8  				74ASXX:LINE-DRV  	BIDIR
14			B7  				74ASXX:LINE-DRV  	BIDIR
15			B6  				74ASXX:LINE-DRV  	BIDIR
16			B5  				74ASXX:LINE-DRV  	BIDIR
17			B4  				74ASXX:LINE-DRV  	BIDIR
18			B3  				74ASXX:LINE-DRV  	BIDIR
19			B2  				74ASXX:LINE-DRV  	BIDIR
20			B1  				74ASXX:LINE-DRV  	BIDIR
21			(G-)BA 			74ASXX:GATE			IN
22			SBA 				74ASXX:GATE			IN
23			CBA 				74ASXX:GATE			IN
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS652_DIP
[Model File]		PML.MOD
[Package Model]    DIP24
|
[Pin]		signal_name 	model_name  		direction
|
1			CAB  				74ASXX:GATE			IN
2			SAB  				74ASXX:GATE			IN
3			GAB  				74ASXX:GATE			IN
4			A1					74ASXX:LINE-DRV  	BIDIR
5			A2					74ASXX:LINE-DRV  	BIDIR
6			A3					74ASXX:LINE-DRV  	BIDIR
7			A4					74ASXX:LINE-DRV  	BIDIR
8			A5					74ASXX:LINE-DRV  	BIDIR
9			A6					74ASXX:LINE-DRV  	BIDIR
10			A7  				74ASXX:LINE-DRV  	BIDIR
11			A8  				74ASXX:LINE-DRV  	BIDIR
12			GND 				GND  					NA
13			B8  				74ASXX:LINE-DRV  	BIDIR
14			B7  				74ASXX:LINE-DRV  	BIDIR
15			B6  				74ASXX:LINE-DRV  	BIDIR
16			B5  				74ASXX:LINE-DRV  	BIDIR
17			B4  				74ASXX:LINE-DRV  	BIDIR
18			B3  				74ASXX:LINE-DRV  	BIDIR
19			B2  				74ASXX:LINE-DRV  	BIDIR
20			B1  				74ASXX:LINE-DRV  	BIDIR
21			(G-)BA 			74ASXX:GATE			IN
22			SBA 				74ASXX:GATE			IN
23			CBA 				74ASXX:GATE			IN
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS652_SOIC
[Model File]		PML.MOD
[Package Model]    SOIC24
|
[Pin]		signal_name 	model_name  		direction
|
1			CAB  				74ASXX:GATE			IN
2			SAB  				74ASXX:GATE			IN
3			GAB  				74ASXX:GATE			IN
4			A1					74ASXX:LINE-DRV  	BIDIR
5			A2					74ASXX:LINE-DRV  	BIDIR
6			A3					74ASXX:LINE-DRV  	BIDIR
7			A4					74ASXX:LINE-DRV  	BIDIR
8			A5					74ASXX:LINE-DRV  	BIDIR
9			A6					74ASXX:LINE-DRV  	BIDIR
10			A7  				74ASXX:LINE-DRV  	BIDIR
11			A8  				74ASXX:LINE-DRV  	BIDIR
12			GND 				GND  					NA
13			B8  				74ASXX:LINE-DRV  	BIDIR
14			B7  				74ASXX:LINE-DRV  	BIDIR
15			B6  				74ASXX:LINE-DRV  	BIDIR
16			B5  				74ASXX:LINE-DRV  	BIDIR
17			B4  				74ASXX:LINE-DRV  	BIDIR
18			B3  				74ASXX:LINE-DRV  	BIDIR
19			B2  				74ASXX:LINE-DRV  	BIDIR
20			B1  				74ASXX:LINE-DRV  	BIDIR
21			(G-)BA 			74ASXX:GATE			IN
22			SBA 				74ASXX:GATE			IN
23			CBA 				74ASXX:GATE			IN
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS652_SSOP
[Model File]		PML.MOD
[Package Model]    SSOP24
|
[Pin]		signal_name 	model_name  		direction
|
1			CAB  				74ASXX:GATE			IN
2			SAB  				74ASXX:GATE			IN
3			GAB  				74ASXX:GATE			IN
4			A1					74ASXX:LINE-DRV  	BIDIR
5			A2					74ASXX:LINE-DRV  	BIDIR
6			A3					74ASXX:LINE-DRV  	BIDIR
7			A4					74ASXX:LINE-DRV  	BIDIR
8			A5					74ASXX:LINE-DRV  	BIDIR
9			A6					74ASXX:LINE-DRV  	BIDIR
10			A7  				74ASXX:LINE-DRV  	BIDIR
11			A8  				74ASXX:LINE-DRV  	BIDIR
12			GND 				GND  					NA
13			B8  				74ASXX:LINE-DRV  	BIDIR
14			B7  				74ASXX:LINE-DRV  	BIDIR
15			B6  				74ASXX:LINE-DRV  	BIDIR
16			B5  				74ASXX:LINE-DRV  	BIDIR
17			B4  				74ASXX:LINE-DRV  	BIDIR
18			B3  				74ASXX:LINE-DRV  	BIDIR
19			B2  				74ASXX:LINE-DRV  	BIDIR
20			B1  				74ASXX:LINE-DRV  	BIDIR
21			(G-)BA 			74ASXX:GATE			IN
22			SBA 				74ASXX:GATE			IN
23			CBA 				74ASXX:GATE			IN
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS652_TSSOP
[Model File]		PML.MOD
[Package Model]    TSSOP24
|
[Pin]		signal_name 	model_name  		direction
|
1			CAB  				74ASXX:GATE			IN
2			SAB  				74ASXX:GATE			IN
3			GAB  				74ASXX:GATE			IN
4			A1					74ASXX:LINE-DRV  	BIDIR
5			A2					74ASXX:LINE-DRV  	BIDIR
6			A3					74ASXX:LINE-DRV  	BIDIR
7			A4					74ASXX:LINE-DRV  	BIDIR
8			A5					74ASXX:LINE-DRV  	BIDIR
9			A6					74ASXX:LINE-DRV  	BIDIR
10			A7  				74ASXX:LINE-DRV  	BIDIR
11			A8  				74ASXX:LINE-DRV  	BIDIR
12			GND 				GND  					NA
13			B8  				74ASXX:LINE-DRV  	BIDIR
14			B7  				74ASXX:LINE-DRV  	BIDIR
15			B6  				74ASXX:LINE-DRV  	BIDIR
16			B5  				74ASXX:LINE-DRV  	BIDIR
17			B4  				74ASXX:LINE-DRV  	BIDIR
18			B3  				74ASXX:LINE-DRV  	BIDIR
19			B2  				74ASXX:LINE-DRV  	BIDIR
20			B1  				74ASXX:LINE-DRV  	BIDIR
21			(G-)BA 			74ASXX:GATE			IN
22			SBA 				74ASXX:GATE			IN
23			CBA 				74ASXX:GATE			IN
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS652_DIP
[Model File]		PML.MOD
[Package Model]    DIP24
|
[Pin]		signal_name 	model_name  		direction
|
1			CPAB 				74ASXX:GATE			IN
2			SAB  				74ASXX:GATE			IN
3			OEAB 				74ASXX:GATE			IN
4			A1					74ASXX:LINE-DRV  	BIDIR
5			A2					74ASXX:LINE-DRV  	BIDIR
6			A3					74ASXX:LINE-DRV  	BIDIR
7			A4					74ASXX:LINE-DRV  	BIDIR
8			A5					74ASXX:LINE-DRV  	BIDIR
9			A6					74ASXX:LINE-DRV  	BIDIR
10			A7  				74ASXX:LINE-DRV  	BIDIR
11			A8  				74ASXX:LINE-DRV  	BIDIR
12			GND 				GND  					NA
13			B8  				74ASXX:LINE-DRV  	BIDIR
14			B7  				74ASXX:LINE-DRV  	BIDIR
15			B6  				74ASXX:LINE-DRV  	BIDIR
16			B5  				74ASXX:LINE-DRV  	BIDIR
17			B4  				74ASXX:LINE-DRV  	BIDIR
18			B3  				74ASXX:LINE-DRV  	BIDIR
19			B2  				74ASXX:LINE-DRV  	BIDIR
20			B1  				74ASXX:LINE-DRV  	BIDIR
21			OEBA				74ASXX:GATE			IN
22			SBA 				74ASXX:GATE			IN
23			CPBA				74ASXX:GATE			IN
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS652_SOIC
[Model File]		PML.MOD
[Package Model]    SOIC24
|
[Pin]		signal_name 	model_name  		direction
|
1			CPAB 				74ASXX:GATE			IN
2			SAB  				74ASXX:GATE			IN
3			OEAB 				74ASXX:GATE			IN
4			A1					74ASXX:LINE-DRV  	BIDIR
5			A2					74ASXX:LINE-DRV  	BIDIR
6			A3					74ASXX:LINE-DRV  	BIDIR
7			A4					74ASXX:LINE-DRV  	BIDIR
8			A5					74ASXX:LINE-DRV  	BIDIR
9			A6					74ASXX:LINE-DRV  	BIDIR
10			A7  				74ASXX:LINE-DRV  	BIDIR
11			A8  				74ASXX:LINE-DRV  	BIDIR
12			GND 				GND  					NA
13			B8  				74ASXX:LINE-DRV  	BIDIR
14			B7  				74ASXX:LINE-DRV  	BIDIR
15			B6  				74ASXX:LINE-DRV  	BIDIR
16			B5  				74ASXX:LINE-DRV  	BIDIR
17			B4  				74ASXX:LINE-DRV  	BIDIR
18			B3  				74ASXX:LINE-DRV  	BIDIR
19			B2  				74ASXX:LINE-DRV  	BIDIR
20			B1  				74ASXX:LINE-DRV  	BIDIR
21			OEBA				74ASXX:GATE			IN
22			SBA 				74ASXX:GATE			IN
23			CPBA				74ASXX:GATE			IN
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS652_SSOP
[Model File]		PML.MOD
[Package Model]    SSOP24
|
[Pin]		signal_name 	model_name  		direction
|
1			CPAB 				74ASXX:GATE			IN
2			SAB  				74ASXX:GATE			IN
3			OEAB 				74ASXX:GATE			IN
4			A1					74ASXX:LINE-DRV  	BIDIR
5			A2					74ASXX:LINE-DRV  	BIDIR
6			A3					74ASXX:LINE-DRV  	BIDIR
7			A4					74ASXX:LINE-DRV  	BIDIR
8			A5					74ASXX:LINE-DRV  	BIDIR
9			A6					74ASXX:LINE-DRV  	BIDIR
10			A7  				74ASXX:LINE-DRV  	BIDIR
11			A8  				74ASXX:LINE-DRV  	BIDIR
12			GND 				GND  					NA
13			B8  				74ASXX:LINE-DRV  	BIDIR
14			B7  				74ASXX:LINE-DRV  	BIDIR
15			B6  				74ASXX:LINE-DRV  	BIDIR
16			B5  				74ASXX:LINE-DRV  	BIDIR
17			B4  				74ASXX:LINE-DRV  	BIDIR
18			B3  				74ASXX:LINE-DRV  	BIDIR
19			B2  				74ASXX:LINE-DRV  	BIDIR
20			B1  				74ASXX:LINE-DRV  	BIDIR
21			OEBA				74ASXX:GATE			IN
22			SBA 				74ASXX:GATE			IN
23			CPBA				74ASXX:GATE			IN
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS652_TSSOP
[Model File]		PML.MOD
[Package Model]    TSSOP24
|
[Pin]		signal_name 	model_name  		direction
|
1			CPAB 				74ASXX:GATE			IN
2			SAB  				74ASXX:GATE			IN
3			OEAB 				74ASXX:GATE			IN
4			A1					74ASXX:LINE-DRV  	BIDIR
5			A2					74ASXX:LINE-DRV  	BIDIR
6			A3					74ASXX:LINE-DRV  	BIDIR
7			A4					74ASXX:LINE-DRV  	BIDIR
8			A5					74ASXX:LINE-DRV  	BIDIR
9			A6					74ASXX:LINE-DRV  	BIDIR
10			A7  				74ASXX:LINE-DRV  	BIDIR
11			A8  				74ASXX:LINE-DRV  	BIDIR
12			GND 				GND  					NA
13			B8  				74ASXX:LINE-DRV  	BIDIR
14			B7  				74ASXX:LINE-DRV  	BIDIR
15			B6  				74ASXX:LINE-DRV  	BIDIR
16			B5  				74ASXX:LINE-DRV  	BIDIR
17			B4  				74ASXX:LINE-DRV  	BIDIR
18			B3  				74ASXX:LINE-DRV  	BIDIR
19			B2  				74ASXX:LINE-DRV  	BIDIR
20			B1  				74ASXX:LINE-DRV  	BIDIR
21			OEBA				74ASXX:GATE			IN
22			SBA 				74ASXX:GATE			IN
23			CPBA				74ASXX:GATE			IN
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS804_DIP
[Model File]		PML.MOD
[Package Model]    DIP20
|
[Pin]		signal_name 	model_name  		direction
|
1			A1					74ASXX:GATE			IN
2			B1					74ASXX:GATE			IN
3			Y1					74ASXX:LINE-DRV  	OUT
4			A2					74ASXX:GATE			IN
5			B2					74ASXX:GATE			IN
6			Y2					74ASXX:LINE-DRV  	OUT
7			A3					74ASXX:GATE			IN
8			B3					74ASXX:GATE			IN
9			Y3					74ASXX:LINE-DRV  	OUT
10			GND 				GND  					NA
11			Y4  				74ASXX:LINE-DRV  	OUT
12			A4  				74ASXX:GATE			IN
13			B4  				74ASXX:GATE			IN
14			Y5  				74ASXX:LINE-DRV  	OUT
15			A5  				74ASXX:GATE			IN
16			B5  				74ASXX:GATE			IN
17			Y6  				74ASXX:LINE-DRV  	OUT
18			A6  				74ASXX:GATE			IN
19			B6  				74ASXX:GATE			IN
20			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS804_SOIC
[Model File]		PML.MOD
[Package Model]    SOIC20
|
[Pin]		signal_name 	model_name  		direction
|
1			A1					74ASXX:GATE			IN
2			B1					74ASXX:GATE			IN
3			Y1					74ASXX:LINE-DRV  	OUT
4			A2					74ASXX:GATE			IN
5			B2					74ASXX:GATE			IN
6			Y2					74ASXX:LINE-DRV  	OUT
7			A3					74ASXX:GATE			IN
8			B3					74ASXX:GATE			IN
9			Y3					74ASXX:LINE-DRV  	OUT
10			GND 				GND  					NA
11			Y4  				74ASXX:LINE-DRV  	OUT
12			A4  				74ASXX:GATE			IN
13			B4  				74ASXX:GATE			IN
14			Y5  				74ASXX:LINE-DRV  	OUT
15			A5  				74ASXX:GATE			IN
16			B5  				74ASXX:GATE			IN
17			Y6  				74ASXX:LINE-DRV  	OUT
18			A6  				74ASXX:GATE			IN
19			B6  				74ASXX:GATE			IN
20			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS804_SSOP
[Model File]		PML.MOD
[Package Model]    SSOP20
|
[Pin]		signal_name 	model_name  		direction
|
1			A1					74ASXX:GATE			IN
2			B1					74ASXX:GATE			IN
3			Y1					74ASXX:LINE-DRV  	OUT
4			A2					74ASXX:GATE			IN
5			B2					74ASXX:GATE			IN
6			Y2					74ASXX:LINE-DRV  	OUT
7			A3					74ASXX:GATE			IN
8			B3					74ASXX:GATE			IN
9			Y3					74ASXX:LINE-DRV  	OUT
10			GND 				GND  					NA
11			Y4  				74ASXX:LINE-DRV  	OUT
12			A4  				74ASXX:GATE			IN
13			B4  				74ASXX:GATE			IN
14			Y5  				74ASXX:LINE-DRV  	OUT
15			A5  				74ASXX:GATE			IN
16			B5  				74ASXX:GATE			IN
17			Y6  				74ASXX:LINE-DRV  	OUT
18			A6  				74ASXX:GATE			IN
19			B6  				74ASXX:GATE			IN
20			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS804_TSSOP
[Model File]		PML.MOD
[Package Model]    TSSOP20
|
[Pin]		signal_name 	model_name  		direction
|
1			A1					74ASXX:GATE			IN
2			B1					74ASXX:GATE			IN
3			Y1					74ASXX:LINE-DRV  	OUT
4			A2					74ASXX:GATE			IN
5			B2					74ASXX:GATE			IN
6			Y2					74ASXX:LINE-DRV  	OUT
7			A3					74ASXX:GATE			IN
8			B3					74ASXX:GATE			IN
9			Y3					74ASXX:LINE-DRV  	OUT
10			GND 				GND  					NA
11			Y4  				74ASXX:LINE-DRV  	OUT
12			A4  				74ASXX:GATE			IN
13			B4  				74ASXX:GATE			IN
14			Y5  				74ASXX:LINE-DRV  	OUT
15			A5  				74ASXX:GATE			IN
16			B5  				74ASXX:GATE			IN
17			Y6  				74ASXX:LINE-DRV  	OUT
18			A6  				74ASXX:GATE			IN
19			B6  				74ASXX:GATE			IN
20			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS805_DIP
[Model File]		PML.MOD
[Package Model]    DIP20
|
[Pin]		signal_name 	model_name  		direction
|
1			A1					74ASXX:GATE			IN
2			B1					74ASXX:GATE			IN
3			Y1					74ASXX:LINE-DRV  	OUT
4			A2					74ASXX:GATE			IN
5			B2					74ASXX:GATE			IN
6			Y2					74ASXX:LINE-DRV  	OUT
7			A3					74ASXX:GATE			IN
8			B3					74ASXX:GATE			IN
9			Y3					74ASXX:LINE-DRV  	OUT
10			GND 				GND  					NA
11			Y4  				74ASXX:LINE-DRV  	OUT
12			A4  				74ASXX:GATE			IN
13			B4  				74ASXX:GATE			IN
14			Y5  				74ASXX:LINE-DRV  	OUT
15			A5  				74ASXX:GATE			IN
16			B5  				74ASXX:GATE			IN
17			Y6  				74ASXX:LINE-DRV  	OUT
18			A6  				74ASXX:GATE			IN
19			B6  				74ASXX:GATE			IN
20			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS805_SOIC
[Model File]		PML.MOD
[Package Model]    SOIC20
|
[Pin]		signal_name 	model_name  		direction
|
1			A1					74ASXX:GATE			IN
2			B1					74ASXX:GATE			IN
3			Y1					74ASXX:LINE-DRV  	OUT
4			A2					74ASXX:GATE			IN
5			B2					74ASXX:GATE			IN
6			Y2					74ASXX:LINE-DRV  	OUT
7			A3					74ASXX:GATE			IN
8			B3					74ASXX:GATE			IN
9			Y3					74ASXX:LINE-DRV  	OUT
10			GND 				GND  					NA
11			Y4  				74ASXX:LINE-DRV  	OUT
12			A4  				74ASXX:GATE			IN
13			B4  				74ASXX:GATE			IN
14			Y5  				74ASXX:LINE-DRV  	OUT
15			A5  				74ASXX:GATE			IN
16			B5  				74ASXX:GATE			IN
17			Y6  				74ASXX:LINE-DRV  	OUT
18			A6  				74ASXX:GATE			IN
19			B6  				74ASXX:GATE			IN
20			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS805_SSOP
[Model File]		PML.MOD
[Package Model]    SSOP20
|
[Pin]		signal_name 	model_name  		direction
|
1			A1					74ASXX:GATE			IN
2			B1					74ASXX:GATE			IN
3			Y1					74ASXX:LINE-DRV  	OUT
4			A2					74ASXX:GATE			IN
5			B2					74ASXX:GATE			IN
6			Y2					74ASXX:LINE-DRV  	OUT
7			A3					74ASXX:GATE			IN
8			B3					74ASXX:GATE			IN
9			Y3					74ASXX:LINE-DRV  	OUT
10			GND 				GND  					NA
11			Y4  				74ASXX:LINE-DRV  	OUT
12			A4  				74ASXX:GATE			IN
13			B4  				74ASXX:GATE			IN
14			Y5  				74ASXX:LINE-DRV  	OUT
15			A5  				74ASXX:GATE			IN
16			B5  				74ASXX:GATE			IN
17			Y6  				74ASXX:LINE-DRV  	OUT
18			A6  				74ASXX:GATE			IN
19			B6  				74ASXX:GATE			IN
20			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS805_TSSOP
[Model File]		PML.MOD
[Package Model]    TSSOP20
|
[Pin]		signal_name 	model_name  		direction
|
1			A1					74ASXX:GATE			IN
2			B1					74ASXX:GATE			IN
3			Y1					74ASXX:LINE-DRV  	OUT
4			A2					74ASXX:GATE			IN
5			B2					74ASXX:GATE			IN
6			Y2					74ASXX:LINE-DRV  	OUT
7			A3					74ASXX:GATE			IN
8			B3					74ASXX:GATE			IN
9			Y3					74ASXX:LINE-DRV  	OUT
10			GND 				GND  					NA
11			Y4  				74ASXX:LINE-DRV  	OUT
12			A4  				74ASXX:GATE			IN
13			B4  				74ASXX:GATE			IN
14			Y5  				74ASXX:LINE-DRV  	OUT
15			A5  				74ASXX:GATE			IN
16			B5  				74ASXX:GATE			IN
17			Y6  				74ASXX:LINE-DRV  	OUT
18			A6  				74ASXX:GATE			IN
19			B6  				74ASXX:GATE			IN
20			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS808_DIP
[Model File]		PML.MOD
[Package Model]    DIP20
|
[Pin]		signal_name 	model_name  		direction
|
1			A1					74ASXX:GATE			IN
2			B1					74ASXX:GATE			IN
3			Y1					74ASXX:LINE-DRV  	OUT
4			A2					74ASXX:GATE			IN
5			B2					74ASXX:GATE			IN
6			Y2					74ASXX:LINE-DRV  	OUT
7			A3					74ASXX:GATE			IN
8			B3					74ASXX:GATE			IN
9			Y3					74ASXX:LINE-DRV  	OUT
10			GND 				GND  					NA
11			Y4  				74ASXX:LINE-DRV  	OUT
12			A4  				74ASXX:GATE			IN
13			B4  				74ASXX:GATE			IN
14			Y5  				74ASXX:LINE-DRV  	OUT
15			A5  				74ASXX:GATE			IN
16			B5  				74ASXX:GATE			IN
17			Y6  				74ASXX:LINE-DRV  	OUT
18			A6  				74ASXX:GATE			IN
19			B6  				74ASXX:GATE			IN
20			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS808_SOIC
[Model File]		PML.MOD
[Package Model]    SOIC20
|
[Pin]		signal_name 	model_name  		direction
|
1			A1					74ASXX:GATE			IN
2			B1					74ASXX:GATE			IN
3			Y1					74ASXX:LINE-DRV  	OUT
4			A2					74ASXX:GATE			IN
5			B2					74ASXX:GATE			IN
6			Y2					74ASXX:LINE-DRV  	OUT
7			A3					74ASXX:GATE			IN
8			B3					74ASXX:GATE			IN
9			Y3					74ASXX:LINE-DRV  	OUT
10			GND 				GND  					NA
11			Y4  				74ASXX:LINE-DRV  	OUT
12			A4  				74ASXX:GATE			IN
13			B4  				74ASXX:GATE			IN
14			Y5  				74ASXX:LINE-DRV  	OUT
15			A5  				74ASXX:GATE			IN
16			B5  				74ASXX:GATE			IN
17			Y6  				74ASXX:LINE-DRV  	OUT
18			A6  				74ASXX:GATE			IN
19			B6  				74ASXX:GATE			IN
20			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS808_SSOP
[Model File]		PML.MOD
[Package Model]    SSOP20
|
[Pin]		signal_name 	model_name  		direction
|
1			A1					74ASXX:GATE			IN
2			B1					74ASXX:GATE			IN
3			Y1					74ASXX:LINE-DRV  	OUT
4			A2					74ASXX:GATE			IN
5			B2					74ASXX:GATE			IN
6			Y2					74ASXX:LINE-DRV  	OUT
7			A3					74ASXX:GATE			IN
8			B3					74ASXX:GATE			IN
9			Y3					74ASXX:LINE-DRV  	OUT
10			GND 				GND  					NA
11			Y4  				74ASXX:LINE-DRV  	OUT
12			A4  				74ASXX:GATE			IN
13			B4  				74ASXX:GATE			IN
14			Y5  				74ASXX:LINE-DRV  	OUT
15			A5  				74ASXX:GATE			IN
16			B5  				74ASXX:GATE			IN
17			Y6  				74ASXX:LINE-DRV  	OUT
18			A6  				74ASXX:GATE			IN
19			B6  				74ASXX:GATE			IN
20			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS808_TSSOP
[Model File]		PML.MOD
[Package Model]    TSSOP20
|
[Pin]		signal_name 	model_name  		direction
|
1			A1					74ASXX:GATE			IN
2			B1					74ASXX:GATE			IN
3			Y1					74ASXX:LINE-DRV  	OUT
4			A2					74ASXX:GATE			IN
5			B2					74ASXX:GATE			IN
6			Y2					74ASXX:LINE-DRV  	OUT
7			A3					74ASXX:GATE			IN
8			B3					74ASXX:GATE			IN
9			Y3					74ASXX:LINE-DRV  	OUT
10			GND 				GND  					NA
11			Y4  				74ASXX:LINE-DRV  	OUT
12			A4  				74ASXX:GATE			IN
13			B4  				74ASXX:GATE			IN
14			Y5  				74ASXX:LINE-DRV  	OUT
15			A5  				74ASXX:GATE			IN
16			B5  				74ASXX:GATE			IN
17			Y6  				74ASXX:LINE-DRV  	OUT
18			A6  				74ASXX:GATE			IN
19			B6  				74ASXX:GATE			IN
20			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS810_DIP
[Model File]		PML.MOD
[Package Model]    DIP14
|
[Pin]		signal_name 	model_name  		direction
|
1			A1					74ASXX:GATE			IN
2			B1					74ASXX:GATE			IN
3			Y1					74ASXX:GATE			OUT
4			A2					74ASXX:GATE			IN
5			B2					74ASXX:GATE			IN
6			Y2					74ASXX:GATE			OUT
7			GND  				GND  					NA
8			Y3					74ASXX:GATE			OUT
9			A3					74ASXX:GATE			IN
10			B3  				74ASXX:GATE			IN
11			Y4  				74ASXX:GATE			OUT
12			A4  				74ASXX:GATE			IN
13			B4  				74ASXX:GATE			IN
14			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS810_SOIC
[Model File]		PML.MOD
[Package Model]    SOIC14
|
[Pin]		signal_name 	model_name  		direction
|
1			A1					74ASXX:GATE			IN
2			B1					74ASXX:GATE			IN
3			Y1					74ASXX:GATE			OUT
4			A2					74ASXX:GATE			IN
5			B2					74ASXX:GATE			IN
6			Y2					74ASXX:GATE			OUT
7			GND  				GND  					NA
8			Y3					74ASXX:GATE			OUT
9			A3					74ASXX:GATE			IN
10			B3  				74ASXX:GATE			IN
11			Y4  				74ASXX:GATE			OUT
12			A4  				74ASXX:GATE			IN
13			B4  				74ASXX:GATE			IN
14			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS810_SSOP
[Model File]		PML.MOD
[Package Model]    SSOP14
|
[Pin]		signal_name 	model_name  		direction
|
1			A1					74ASXX:GATE			IN
2			B1					74ASXX:GATE			IN
3			Y1					74ASXX:GATE			OUT
4			A2					74ASXX:GATE			IN
5			B2					74ASXX:GATE			IN
6			Y2					74ASXX:GATE			OUT
7			GND  				GND  					NA
8			Y3					74ASXX:GATE			OUT
9			A3					74ASXX:GATE			IN
10			B3  				74ASXX:GATE			IN
11			Y4  				74ASXX:GATE			OUT
12			A4  				74ASXX:GATE			IN
13			B4  				74ASXX:GATE			IN
14			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS810_TSSOP
[Model File]		PML.MOD
[Package Model]    TSSOP14
|
[Pin]		signal_name 	model_name  		direction
|
1			A1					74ASXX:GATE			IN
2			B1					74ASXX:GATE			IN
3			Y1					74ASXX:GATE			OUT
4			A2					74ASXX:GATE			IN
5			B2					74ASXX:GATE			IN
6			Y2					74ASXX:GATE			OUT
7			GND  				GND  					NA
8			Y3					74ASXX:GATE			OUT
9			A3					74ASXX:GATE			IN
10			B3  				74ASXX:GATE			IN
11			Y4  				74ASXX:GATE			OUT
12			A4  				74ASXX:GATE			IN
13			B4  				74ASXX:GATE			IN
14			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS811_DIP
[Model File]		PML.MOD
[Package Model]    DIP14
|
[Pin]		signal_name 	model_name  		direction
|
1			A1					74ASXX:GATE			IN
2			B1					74ASXX:GATE			IN
3			Y1					74ASXX:OPEN-COL  	OUT
4			A2					74ASXX:GATE			IN
5			B2					74ASXX:GATE			IN
6			Y2					74ASXX:OPEN-COL  	OUT
7			GND  				GND  					NA
8			Y3					74ASXX:OPEN-COL  	OUT
9			A3					74ASXX:GATE			IN
10			B3  				74ASXX:GATE			IN
11			Y4  				74ASXX:OPEN-COL  	OUT
12			A4  				74ASXX:GATE			IN
13			B4  				74ASXX:GATE			IN
14			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS811_SOIC
[Model File]		PML.MOD
[Package Model]    SOIC14
|
[Pin]		signal_name 	model_name  		direction
|
1			A1					74ASXX:GATE			IN
2			B1					74ASXX:GATE			IN
3			Y1					74ASXX:OPEN-COL  	OUT
4			A2					74ASXX:GATE			IN
5			B2					74ASXX:GATE			IN
6			Y2					74ASXX:OPEN-COL  	OUT
7			GND  				GND  					NA
8			Y3					74ASXX:OPEN-COL  	OUT
9			A3					74ASXX:GATE			IN
10			B3  				74ASXX:GATE			IN
11			Y4  				74ASXX:OPEN-COL  	OUT
12			A4  				74ASXX:GATE			IN
13			B4  				74ASXX:GATE			IN
14			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS811_SSOP
[Model File]		PML.MOD
[Package Model]    SSOP14
|
[Pin]		signal_name 	model_name  		direction
|
1			A1					74ASXX:GATE			IN
2			B1					74ASXX:GATE			IN
3			Y1					74ASXX:OPEN-COL  	OUT
4			A2					74ASXX:GATE			IN
5			B2					74ASXX:GATE			IN
6			Y2					74ASXX:OPEN-COL  	OUT
7			GND  				GND  					NA
8			Y3					74ASXX:OPEN-COL  	OUT
9			A3					74ASXX:GATE			IN
10			B3  				74ASXX:GATE			IN
11			Y4  				74ASXX:OPEN-COL  	OUT
12			A4  				74ASXX:GATE			IN
13			B4  				74ASXX:GATE			IN
14			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS811_TSSOP
[Model File]		PML.MOD
[Package Model]    TSSOP14
|
[Pin]		signal_name 	model_name  		direction
|
1			A1					74ASXX:GATE			IN
2			B1					74ASXX:GATE			IN
3			Y1					74ASXX:OPEN-COL  	OUT
4			A2					74ASXX:GATE			IN
5			B2					74ASXX:GATE			IN
6			Y2					74ASXX:OPEN-COL  	OUT
7			GND  				GND  					NA
8			Y3					74ASXX:OPEN-COL  	OUT
9			A3					74ASXX:GATE			IN
10			B3  				74ASXX:GATE			IN
11			Y4  				74ASXX:OPEN-COL  	OUT
12			A4  				74ASXX:GATE			IN
13			B4  				74ASXX:GATE			IN
14			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS821_DIP
[Model File]		PML.MOD
[Package Model]    DIP24
|
[Pin]		signal_name 	model_name  		direction
|
1			OE-  				74ASXX:GATE			IN
2			D1					74ASXX:GATE			IN
3			D2					74ASXX:GATE			IN
4			D3					74ASXX:GATE			IN
5			D4					74ASXX:GATE			IN
6			D5					74ASXX:GATE			IN
7			D6					74ASXX:GATE			IN
8			D7					74ASXX:GATE			IN
9			D8					74ASXX:GATE			IN
10			D9  				74ASXX:GATE			IN
11			D10 				74ASXX:GATE			IN
12			GND 				GND  					NA
13			CLK 				74ASXX:GATE			IN
14			Q10 				74ASXX:LINE-DRV  	ENBO
15			Q9  				74ASXX:LINE-DRV  	ENBO
16			Q8  				74ASXX:LINE-DRV  	ENBO
17			Q7  				74ASXX:LINE-DRV  	ENBO
18			Q6  				74ASXX:LINE-DRV  	ENBO
19			Q5  				74ASXX:LINE-DRV  	ENBO
20			Q4  				74ASXX:LINE-DRV  	ENBO
21			Q3  				74ASXX:LINE-DRV  	ENBO
22			Q2  				74ASXX:LINE-DRV  	ENBO
23			Q1  				74ASXX:LINE-DRV  	ENBO
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS821_SOIC
[Model File]		PML.MOD
[Package Model]    SOIC24
|
[Pin]		signal_name 	model_name  		direction
|
1			OE-  				74ASXX:GATE			IN
2			D1					74ASXX:GATE			IN
3			D2					74ASXX:GATE			IN
4			D3					74ASXX:GATE			IN
5			D4					74ASXX:GATE			IN
6			D5					74ASXX:GATE			IN
7			D6					74ASXX:GATE			IN
8			D7					74ASXX:GATE			IN
9			D8					74ASXX:GATE			IN
10			D9  				74ASXX:GATE			IN
11			D10 				74ASXX:GATE			IN
12			GND 				GND  					NA
13			CLK 				74ASXX:GATE			IN
14			Q10 				74ASXX:LINE-DRV  	ENBO
15			Q9  				74ASXX:LINE-DRV  	ENBO
16			Q8  				74ASXX:LINE-DRV  	ENBO
17			Q7  				74ASXX:LINE-DRV  	ENBO
18			Q6  				74ASXX:LINE-DRV  	ENBO
19			Q5  				74ASXX:LINE-DRV  	ENBO
20			Q4  				74ASXX:LINE-DRV  	ENBO
21			Q3  				74ASXX:LINE-DRV  	ENBO
22			Q2  				74ASXX:LINE-DRV  	ENBO
23			Q1  				74ASXX:LINE-DRV  	ENBO
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS821_SSOP
[Model File]		PML.MOD
[Package Model]    SSOP24
|
[Pin]		signal_name 	model_name  		direction
|
1			OE-  				74ASXX:GATE			IN
2			D1					74ASXX:GATE			IN
3			D2					74ASXX:GATE			IN
4			D3					74ASXX:GATE			IN
5			D4					74ASXX:GATE			IN
6			D5					74ASXX:GATE			IN
7			D6					74ASXX:GATE			IN
8			D7					74ASXX:GATE			IN
9			D8					74ASXX:GATE			IN
10			D9  				74ASXX:GATE			IN
11			D10 				74ASXX:GATE			IN
12			GND 				GND  					NA
13			CLK 				74ASXX:GATE			IN
14			Q10 				74ASXX:LINE-DRV  	ENBO
15			Q9  				74ASXX:LINE-DRV  	ENBO
16			Q8  				74ASXX:LINE-DRV  	ENBO
17			Q7  				74ASXX:LINE-DRV  	ENBO
18			Q6  				74ASXX:LINE-DRV  	ENBO
19			Q5  				74ASXX:LINE-DRV  	ENBO
20			Q4  				74ASXX:LINE-DRV  	ENBO
21			Q3  				74ASXX:LINE-DRV  	ENBO
22			Q2  				74ASXX:LINE-DRV  	ENBO
23			Q1  				74ASXX:LINE-DRV  	ENBO
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS821_TSSOP
[Model File]		PML.MOD
[Package Model]    TSSOP24
|
[Pin]		signal_name 	model_name  		direction
|
1			OE-  				74ASXX:GATE			IN
2			D1					74ASXX:GATE			IN
3			D2					74ASXX:GATE			IN
4			D3					74ASXX:GATE			IN
5			D4					74ASXX:GATE			IN
6			D5					74ASXX:GATE			IN
7			D6					74ASXX:GATE			IN
8			D7					74ASXX:GATE			IN
9			D8					74ASXX:GATE			IN
10			D9  				74ASXX:GATE			IN
11			D10 				74ASXX:GATE			IN
12			GND 				GND  					NA
13			CLK 				74ASXX:GATE			IN
14			Q10 				74ASXX:LINE-DRV  	ENBO
15			Q9  				74ASXX:LINE-DRV  	ENBO
16			Q8  				74ASXX:LINE-DRV  	ENBO
17			Q7  				74ASXX:LINE-DRV  	ENBO
18			Q6  				74ASXX:LINE-DRV  	ENBO
19			Q5  				74ASXX:LINE-DRV  	ENBO
20			Q4  				74ASXX:LINE-DRV  	ENBO
21			Q3  				74ASXX:LINE-DRV  	ENBO
22			Q2  				74ASXX:LINE-DRV  	ENBO
23			Q1  				74ASXX:LINE-DRV  	ENBO
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS822_DIP
[Model File]		PML.MOD
[Package Model]    DIP24
|
[Pin]		signal_name 	model_name  		direction
|
1			OE-  				74ASXX:GATE			IN
2			D1					74ASXX:GATE			IN
3			D2					74ASXX:GATE			IN
4			D3					74ASXX:GATE			IN
5			D4					74ASXX:GATE			IN
6			D5					74ASXX:GATE			IN
7			D6					74ASXX:GATE			IN
8			D7					74ASXX:GATE			IN
9			D8					74ASXX:GATE			IN
10			D9  				74ASXX:GATE			IN
11			D10 				74ASXX:GATE			IN
12			GND 				GND  					NA
13			CLK 				74ASXX:GATE			IN
14			Q10-				74ASXX:LINE-DRV  	ENBO
15			Q9- 				74ASXX:LINE-DRV  	ENBO
16			Q8- 				74ASXX:LINE-DRV  	ENBO
17			Q7- 				74ASXX:LINE-DRV  	ENBO
18			Q6- 				74ASXX:LINE-DRV  	ENBO
19			Q5- 				74ASXX:LINE-DRV  	ENBO
20			Q4- 				74ASXX:LINE-DRV  	ENBO
21			Q3- 				74ASXX:LINE-DRV  	ENBO
22			Q2- 				74ASXX:LINE-DRV  	ENBO
23			Q1- 				74ASXX:LINE-DRV  	ENBO
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS822_SOIC
[Model File]		PML.MOD
[Package Model]    SOIC24
|
[Pin]		signal_name 	model_name  		direction
|
1			OE-  				74ASXX:GATE			IN
2			D1					74ASXX:GATE			IN
3			D2					74ASXX:GATE			IN
4			D3					74ASXX:GATE			IN
5			D4					74ASXX:GATE			IN
6			D5					74ASXX:GATE			IN
7			D6					74ASXX:GATE			IN
8			D7					74ASXX:GATE			IN
9			D8					74ASXX:GATE			IN
10			D9  				74ASXX:GATE			IN
11			D10 				74ASXX:GATE			IN
12			GND 				GND  					NA
13			CLK 				74ASXX:GATE			IN
14			Q10-				74ASXX:LINE-DRV  	ENBO
15			Q9- 				74ASXX:LINE-DRV  	ENBO
16			Q8- 				74ASXX:LINE-DRV  	ENBO
17			Q7- 				74ASXX:LINE-DRV  	ENBO
18			Q6- 				74ASXX:LINE-DRV  	ENBO
19			Q5- 				74ASXX:LINE-DRV  	ENBO
20			Q4- 				74ASXX:LINE-DRV  	ENBO
21			Q3- 				74ASXX:LINE-DRV  	ENBO
22			Q2- 				74ASXX:LINE-DRV  	ENBO
23			Q1- 				74ASXX:LINE-DRV  	ENBO
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS822_SSOP
[Model File]		PML.MOD
[Package Model]    SSOP24
|
[Pin]		signal_name 	model_name  		direction
|
1			OE-  				74ASXX:GATE			IN
2			D1					74ASXX:GATE			IN
3			D2					74ASXX:GATE			IN
4			D3					74ASXX:GATE			IN
5			D4					74ASXX:GATE			IN
6			D5					74ASXX:GATE			IN
7			D6					74ASXX:GATE			IN
8			D7					74ASXX:GATE			IN
9			D8					74ASXX:GATE			IN
10			D9  				74ASXX:GATE			IN
11			D10 				74ASXX:GATE			IN
12			GND 				GND  					NA
13			CLK 				74ASXX:GATE			IN
14			Q10-				74ASXX:LINE-DRV  	ENBO
15			Q9- 				74ASXX:LINE-DRV  	ENBO
16			Q8- 				74ASXX:LINE-DRV  	ENBO
17			Q7- 				74ASXX:LINE-DRV  	ENBO
18			Q6- 				74ASXX:LINE-DRV  	ENBO
19			Q5- 				74ASXX:LINE-DRV  	ENBO
20			Q4- 				74ASXX:LINE-DRV  	ENBO
21			Q3- 				74ASXX:LINE-DRV  	ENBO
22			Q2- 				74ASXX:LINE-DRV  	ENBO
23			Q1- 				74ASXX:LINE-DRV  	ENBO
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS822_TSSOP
[Model File]		PML.MOD
[Package Model]    TSSOP24
|
[Pin]		signal_name 	model_name  		direction
|
1			OE-  				74ASXX:GATE			IN
2			D1					74ASXX:GATE			IN
3			D2					74ASXX:GATE			IN
4			D3					74ASXX:GATE			IN
5			D4					74ASXX:GATE			IN
6			D5					74ASXX:GATE			IN
7			D6					74ASXX:GATE			IN
8			D7					74ASXX:GATE			IN
9			D8					74ASXX:GATE			IN
10			D9  				74ASXX:GATE			IN
11			D10 				74ASXX:GATE			IN
12			GND 				GND  					NA
13			CLK 				74ASXX:GATE			IN
14			Q10-				74ASXX:LINE-DRV  	ENBO
15			Q9- 				74ASXX:LINE-DRV  	ENBO
16			Q8- 				74ASXX:LINE-DRV  	ENBO
17			Q7- 				74ASXX:LINE-DRV  	ENBO
18			Q6- 				74ASXX:LINE-DRV  	ENBO
19			Q5- 				74ASXX:LINE-DRV  	ENBO
20			Q4- 				74ASXX:LINE-DRV  	ENBO
21			Q3- 				74ASXX:LINE-DRV  	ENBO
22			Q2- 				74ASXX:LINE-DRV  	ENBO
23			Q1- 				74ASXX:LINE-DRV  	ENBO
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS823_DIP
[Model File]		PML.MOD
[Package Model]    DIP24
|
[Pin]		signal_name 	model_name  		direction
|
1			OC-  				74ASXX:GATE			IN
2			D1					74ASXX:GATE			IN
3			D2					74ASXX:GATE			IN
4			D3					74ASXX:GATE			IN
5			D4					74ASXX:GATE			IN
6			D5					74ASXX:GATE			IN
7			D6					74ASXX:GATE			IN
8			D7					74ASXX:GATE			IN
9			D8					74ASXX:GATE			IN
10			D9  				74ASXX:GATE			IN
11			CLR-				74ASXX:GATE			IN
12			GND 				GND  					NA
13			CLK 				74ASXX:GATE			IN
14			CLKEN- 			74ASXX:GATE			IN
15			Q9  				74ASXX:LINE-DRV  	ENBO
16			Q8  				74ASXX:LINE-DRV  	ENBO
17			Q7  				74ASXX:LINE-DRV  	ENBO
18			Q6  				74ASXX:LINE-DRV  	ENBO
19			Q5  				74ASXX:LINE-DRV  	ENBO
20			Q4  				74ASXX:LINE-DRV  	ENBO
21			Q3  				74ASXX:LINE-DRV  	ENBO
22			Q2  				74ASXX:LINE-DRV  	ENBO
23			Q1  				74ASXX:LINE-DRV  	ENBO
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS823_SOIC
[Model File]		PML.MOD
[Package Model]    SOIC24
|
[Pin]		signal_name 	model_name  		direction
|
1			OC-  				74ASXX:GATE			IN
2			D1					74ASXX:GATE			IN
3			D2					74ASXX:GATE			IN
4			D3					74ASXX:GATE			IN
5			D4					74ASXX:GATE			IN
6			D5					74ASXX:GATE			IN
7			D6					74ASXX:GATE			IN
8			D7					74ASXX:GATE			IN
9			D8					74ASXX:GATE			IN
10			D9  				74ASXX:GATE			IN
11			CLR-				74ASXX:GATE			IN
12			GND 				GND  					NA
13			CLK 				74ASXX:GATE			IN
14			CLKEN- 			74ASXX:GATE			IN
15			Q9  				74ASXX:LINE-DRV  	ENBO
16			Q8  				74ASXX:LINE-DRV  	ENBO
17			Q7  				74ASXX:LINE-DRV  	ENBO
18			Q6  				74ASXX:LINE-DRV  	ENBO
19			Q5  				74ASXX:LINE-DRV  	ENBO
20			Q4  				74ASXX:LINE-DRV  	ENBO
21			Q3  				74ASXX:LINE-DRV  	ENBO
22			Q2  				74ASXX:LINE-DRV  	ENBO
23			Q1  				74ASXX:LINE-DRV  	ENBO
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS823_SSOP
[Model File]		PML.MOD
[Package Model]    SSOP24
|
[Pin]		signal_name 	model_name  		direction
|
1			OC-  				74ASXX:GATE			IN
2			D1					74ASXX:GATE			IN
3			D2					74ASXX:GATE			IN
4			D3					74ASXX:GATE			IN
5			D4					74ASXX:GATE			IN
6			D5					74ASXX:GATE			IN
7			D6					74ASXX:GATE			IN
8			D7					74ASXX:GATE			IN
9			D8					74ASXX:GATE			IN
10			D9  				74ASXX:GATE			IN
11			CLR-				74ASXX:GATE			IN
12			GND 				GND  					NA
13			CLK 				74ASXX:GATE			IN
14			CLKEN- 			74ASXX:GATE			IN
15			Q9  				74ASXX:LINE-DRV  	ENBO
16			Q8  				74ASXX:LINE-DRV  	ENBO
17			Q7  				74ASXX:LINE-DRV  	ENBO
18			Q6  				74ASXX:LINE-DRV  	ENBO
19			Q5  				74ASXX:LINE-DRV  	ENBO
20			Q4  				74ASXX:LINE-DRV  	ENBO
21			Q3  				74ASXX:LINE-DRV  	ENBO
22			Q2  				74ASXX:LINE-DRV  	ENBO
23			Q1  				74ASXX:LINE-DRV  	ENBO
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS823_TSSOP
[Model File]		PML.MOD
[Package Model]    TSSOP24
|
[Pin]		signal_name 	model_name  		direction
|
1			OC-  				74ASXX:GATE			IN
2			D1					74ASXX:GATE			IN
3			D2					74ASXX:GATE			IN
4			D3					74ASXX:GATE			IN
5			D4					74ASXX:GATE			IN
6			D5					74ASXX:GATE			IN
7			D6					74ASXX:GATE			IN
8			D7					74ASXX:GATE			IN
9			D8					74ASXX:GATE			IN
10			D9  				74ASXX:GATE			IN
11			CLR-				74ASXX:GATE			IN
12			GND 				GND  					NA
13			CLK 				74ASXX:GATE			IN
14			CLKEN- 			74ASXX:GATE			IN
15			Q9  				74ASXX:LINE-DRV  	ENBO
16			Q8  				74ASXX:LINE-DRV  	ENBO
17			Q7  				74ASXX:LINE-DRV  	ENBO
18			Q6  				74ASXX:LINE-DRV  	ENBO
19			Q5  				74ASXX:LINE-DRV  	ENBO
20			Q4  				74ASXX:LINE-DRV  	ENBO
21			Q3  				74ASXX:LINE-DRV  	ENBO
22			Q2  				74ASXX:LINE-DRV  	ENBO
23			Q1  				74ASXX:LINE-DRV  	ENBO
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS824_DIP
[Model File]		PML.MOD
[Package Model]    DIP24
|
[Pin]		signal_name 	model_name  		direction
|
1			OE-  				74ASXX:GATE			IN
2			D1					74ASXX:GATE			IN
3			D2					74ASXX:GATE			IN
4			D3					74ASXX:GATE			IN
5			D4					74ASXX:GATE			IN
6			D5					74ASXX:GATE			IN
7			D6					74ASXX:GATE			IN
8			D7					74ASXX:GATE			IN
9			D8					74ASXX:GATE			IN
10			D9  				74ASXX:GATE			IN
11			CLR-				74ASXX:GATE			IN
12			GND 				GND  					NA
13			CLK 				74ASXX:GATE			IN
14			CLKEN- 			74ASXX:GATE			IN
15			Q9- 				74ASXX:LINE-DRV  	ENBO
16			Q8- 				74ASXX:LINE-DRV  	ENBO
17			Q7- 				74ASXX:LINE-DRV  	ENBO
18			Q6- 				74ASXX:LINE-DRV  	ENBO
19			Q5- 				74ASXX:LINE-DRV  	ENBO
20			Q4- 				74ASXX:LINE-DRV  	ENBO
21			Q3- 				74ASXX:LINE-DRV  	ENBO
22			Q2- 				74ASXX:LINE-DRV  	ENBO
23			Q1- 				74ASXX:LINE-DRV  	ENBO
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS824_SOIC
[Model File]		PML.MOD
[Package Model]    SOIC24
|
[Pin]		signal_name 	model_name  		direction
|
1			OE-  				74ASXX:GATE			IN
2			D1					74ASXX:GATE			IN
3			D2					74ASXX:GATE			IN
4			D3					74ASXX:GATE			IN
5			D4					74ASXX:GATE			IN
6			D5					74ASXX:GATE			IN
7			D6					74ASXX:GATE			IN
8			D7					74ASXX:GATE			IN
9			D8					74ASXX:GATE			IN
10			D9  				74ASXX:GATE			IN
11			CLR-				74ASXX:GATE			IN
12			GND 				GND  					NA
13			CLK 				74ASXX:GATE			IN
14			CLKEN- 			74ASXX:GATE			IN
15			Q9- 				74ASXX:LINE-DRV  	ENBO
16			Q8- 				74ASXX:LINE-DRV  	ENBO
17			Q7- 				74ASXX:LINE-DRV  	ENBO
18			Q6- 				74ASXX:LINE-DRV  	ENBO
19			Q5- 				74ASXX:LINE-DRV  	ENBO
20			Q4- 				74ASXX:LINE-DRV  	ENBO
21			Q3- 				74ASXX:LINE-DRV  	ENBO
22			Q2- 				74ASXX:LINE-DRV  	ENBO
23			Q1- 				74ASXX:LINE-DRV  	ENBO
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS824_SSOP
[Model File]		PML.MOD
[Package Model]    SSOP24
|
[Pin]		signal_name 	model_name  		direction
|
1			OE-  				74ASXX:GATE			IN
2			D1					74ASXX:GATE			IN
3			D2					74ASXX:GATE			IN
4			D3					74ASXX:GATE			IN
5			D4					74ASXX:GATE			IN
6			D5					74ASXX:GATE			IN
7			D6					74ASXX:GATE			IN
8			D7					74ASXX:GATE			IN
9			D8					74ASXX:GATE			IN
10			D9  				74ASXX:GATE			IN
11			CLR-				74ASXX:GATE			IN
12			GND 				GND  					NA
13			CLK 				74ASXX:GATE			IN
14			CLKEN- 			74ASXX:GATE			IN
15			Q9- 				74ASXX:LINE-DRV  	ENBO
16			Q8- 				74ASXX:LINE-DRV  	ENBO
17			Q7- 				74ASXX:LINE-DRV  	ENBO
18			Q6- 				74ASXX:LINE-DRV  	ENBO
19			Q5- 				74ASXX:LINE-DRV  	ENBO
20			Q4- 				74ASXX:LINE-DRV  	ENBO
21			Q3- 				74ASXX:LINE-DRV  	ENBO
22			Q2- 				74ASXX:LINE-DRV  	ENBO
23			Q1- 				74ASXX:LINE-DRV  	ENBO
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS824_TSSOP
[Model File]		PML.MOD
[Package Model]    TSSOP24
|
[Pin]		signal_name 	model_name  		direction
|
1			OE-  				74ASXX:GATE			IN
2			D1					74ASXX:GATE			IN
3			D2					74ASXX:GATE			IN
4			D3					74ASXX:GATE			IN
5			D4					74ASXX:GATE			IN
6			D5					74ASXX:GATE			IN
7			D6					74ASXX:GATE			IN
8			D7					74ASXX:GATE			IN
9			D8					74ASXX:GATE			IN
10			D9  				74ASXX:GATE			IN
11			CLR-				74ASXX:GATE			IN
12			GND 				GND  					NA
13			CLK 				74ASXX:GATE			IN
14			CLKEN- 			74ASXX:GATE			IN
15			Q9- 				74ASXX:LINE-DRV  	ENBO
16			Q8- 				74ASXX:LINE-DRV  	ENBO
17			Q7- 				74ASXX:LINE-DRV  	ENBO
18			Q6- 				74ASXX:LINE-DRV  	ENBO
19			Q5- 				74ASXX:LINE-DRV  	ENBO
20			Q4- 				74ASXX:LINE-DRV  	ENBO
21			Q3- 				74ASXX:LINE-DRV  	ENBO
22			Q2- 				74ASXX:LINE-DRV  	ENBO
23			Q1- 				74ASXX:LINE-DRV  	ENBO
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS825_DIP
[Model File]		PML.MOD
[Package Model]    DIP24
|
[Pin]		signal_name 	model_name  		direction
|
1			OE1- 				74ASXX:GATE			IN
2			OE2- 				74ASXX:GATE			IN
3			D1					74ASXX:GATE			IN
4			D2					74ASXX:GATE			IN
5			D3					74ASXX:GATE			IN
6			D4					74ASXX:GATE			IN
7			D5					74ASXX:GATE			IN
8			D6					74ASXX:GATE			IN
9			D7					74ASXX:GATE			IN
10			D8  				74ASXX:GATE			IN
11			CLR-				74ASXX:GATE			IN
12			GND 				GND  					NA
13			CLK 				74ASXX:GATE			IN
14			CLKEN- 			74ASXX:GATE			IN
15			Q8  				74ASXX:LINE-DRV  	ENBO
16			Q7  				74ASXX:LINE-DRV  	ENBO
17			Q6  				74ASXX:LINE-DRV  	ENBO
18			Q5  				74ASXX:LINE-DRV  	ENBO
19			Q4  				74ASXX:LINE-DRV  	ENBO
20			Q3  				74ASXX:LINE-DRV  	ENBO
21			Q2  				74ASXX:LINE-DRV  	ENBO
22			Q1  				74ASXX:LINE-DRV  	ENBO
23			OE3-				74ASXX:GATE			IN
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS825_SOIC
[Model File]		PML.MOD
[Package Model]    SOIC24
|
[Pin]		signal_name 	model_name  		direction
|
1			OE1- 				74ASXX:GATE			IN
2			OE2- 				74ASXX:GATE			IN
3			D1					74ASXX:GATE			IN
4			D2					74ASXX:GATE			IN
5			D3					74ASXX:GATE			IN
6			D4					74ASXX:GATE			IN
7			D5					74ASXX:GATE			IN
8			D6					74ASXX:GATE			IN
9			D7					74ASXX:GATE			IN
10			D8  				74ASXX:GATE			IN
11			CLR-				74ASXX:GATE			IN
12			GND 				GND  					NA
13			CLK 				74ASXX:GATE			IN
14			CLKEN- 			74ASXX:GATE			IN
15			Q8  				74ASXX:LINE-DRV  	ENBO
16			Q7  				74ASXX:LINE-DRV  	ENBO
17			Q6  				74ASXX:LINE-DRV  	ENBO
18			Q5  				74ASXX:LINE-DRV  	ENBO
19			Q4  				74ASXX:LINE-DRV  	ENBO
20			Q3  				74ASXX:LINE-DRV  	ENBO
21			Q2  				74ASXX:LINE-DRV  	ENBO
22			Q1  				74ASXX:LINE-DRV  	ENBO
23			OE3-				74ASXX:GATE			IN
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS825_SSOP
[Model File]		PML.MOD
[Package Model]    SSOP24
|
[Pin]		signal_name 	model_name  		direction
|
1			OE1- 				74ASXX:GATE			IN
2			OE2- 				74ASXX:GATE			IN
3			D1					74ASXX:GATE			IN
4			D2					74ASXX:GATE			IN
5			D3					74ASXX:GATE			IN
6			D4					74ASXX:GATE			IN
7			D5					74ASXX:GATE			IN
8			D6					74ASXX:GATE			IN
9			D7					74ASXX:GATE			IN
10			D8  				74ASXX:GATE			IN
11			CLR-				74ASXX:GATE			IN
12			GND 				GND  					NA
13			CLK 				74ASXX:GATE			IN
14			CLKEN- 			74ASXX:GATE			IN
15			Q8  				74ASXX:LINE-DRV  	ENBO
16			Q7  				74ASXX:LINE-DRV  	ENBO
17			Q6  				74ASXX:LINE-DRV  	ENBO
18			Q5  				74ASXX:LINE-DRV  	ENBO
19			Q4  				74ASXX:LINE-DRV  	ENBO
20			Q3  				74ASXX:LINE-DRV  	ENBO
21			Q2  				74ASXX:LINE-DRV  	ENBO
22			Q1  				74ASXX:LINE-DRV  	ENBO
23			OE3-				74ASXX:GATE			IN
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS825_TSSOP
[Model File]		PML.MOD
[Package Model]    TSSOP24
|
[Pin]		signal_name 	model_name  		direction
|
1			OE1- 				74ASXX:GATE			IN
2			OE2- 				74ASXX:GATE			IN
3			D1					74ASXX:GATE			IN
4			D2					74ASXX:GATE			IN
5			D3					74ASXX:GATE			IN
6			D4					74ASXX:GATE			IN
7			D5					74ASXX:GATE			IN
8			D6					74ASXX:GATE			IN
9			D7					74ASXX:GATE			IN
10			D8  				74ASXX:GATE			IN
11			CLR-				74ASXX:GATE			IN
12			GND 				GND  					NA
13			CLK 				74ASXX:GATE			IN
14			CLKEN- 			74ASXX:GATE			IN
15			Q8  				74ASXX:LINE-DRV  	ENBO
16			Q7  				74ASXX:LINE-DRV  	ENBO
17			Q6  				74ASXX:LINE-DRV  	ENBO
18			Q5  				74ASXX:LINE-DRV  	ENBO
19			Q4  				74ASXX:LINE-DRV  	ENBO
20			Q3  				74ASXX:LINE-DRV  	ENBO
21			Q2  				74ASXX:LINE-DRV  	ENBO
22			Q1  				74ASXX:LINE-DRV  	ENBO
23			OE3-				74ASXX:GATE			IN
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS826_DIP
[Model File]		PML.MOD
[Package Model]    DIP24
|
[Pin]		signal_name 	model_name  		direction
|
1			OE1- 				74ASXX:GATE			IN
2			OE2- 				74ASXX:GATE			IN
3			D1					74ASXX:GATE			IN
4			D2					74ASXX:GATE			IN
5			D3					74ASXX:GATE			IN
6			D4					74ASXX:GATE			IN
7			D5					74ASXX:GATE			IN
8			D6					74ASXX:GATE			IN
9			D7					74ASXX:GATE			IN
10			D8  				74ASXX:GATE			IN
11			CLR-				74ASXX:GATE			IN
12			GND 				GND  					NA
13			CLK 				74ASXX:GATE			IN
14			CLKEN- 			74ASXX:GATE			IN
15			Q8- 				74ASXX:LINE-DRV  	ENBO
16			Q7- 				74ASXX:LINE-DRV  	ENBO
17			Q6- 				74ASXX:LINE-DRV  	ENBO
18			Q5- 				74ASXX:LINE-DRV  	ENBO
19			Q4- 				74ASXX:LINE-DRV  	ENBO
20			Q3- 				74ASXX:LINE-DRV  	ENBO
21			Q2- 				74ASXX:LINE-DRV  	ENBO
22			Q1- 				74ASXX:LINE-DRV  	ENBO
23			OE3-				74ASXX:GATE			IN
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS826_SOIC
[Model File]		PML.MOD
[Package Model]    SOIC24
|
[Pin]		signal_name 	model_name  		direction
|
1			OE1- 				74ASXX:GATE			IN
2			OE2- 				74ASXX:GATE			IN
3			D1					74ASXX:GATE			IN
4			D2					74ASXX:GATE			IN
5			D3					74ASXX:GATE			IN
6			D4					74ASXX:GATE			IN
7			D5					74ASXX:GATE			IN
8			D6					74ASXX:GATE			IN
9			D7					74ASXX:GATE			IN
10			D8  				74ASXX:GATE			IN
11			CLR-				74ASXX:GATE			IN
12			GND 				GND  					NA
13			CLK 				74ASXX:GATE			IN
14			CLKEN- 			74ASXX:GATE			IN
15			Q8- 				74ASXX:LINE-DRV  	ENBO
16			Q7- 				74ASXX:LINE-DRV  	ENBO
17			Q6- 				74ASXX:LINE-DRV  	ENBO
18			Q5- 				74ASXX:LINE-DRV  	ENBO
19			Q4- 				74ASXX:LINE-DRV  	ENBO
20			Q3- 				74ASXX:LINE-DRV  	ENBO
21			Q2- 				74ASXX:LINE-DRV  	ENBO
22			Q1- 				74ASXX:LINE-DRV  	ENBO
23			OE3-				74ASXX:GATE			IN
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS826_SSOP
[Model File]		PML.MOD
[Package Model]    SSOP24
|
[Pin]		signal_name 	model_name  		direction
|
1			OE1- 				74ASXX:GATE			IN
2			OE2- 				74ASXX:GATE			IN
3			D1					74ASXX:GATE			IN
4			D2					74ASXX:GATE			IN
5			D3					74ASXX:GATE			IN
6			D4					74ASXX:GATE			IN
7			D5					74ASXX:GATE			IN
8			D6					74ASXX:GATE			IN
9			D7					74ASXX:GATE			IN
10			D8  				74ASXX:GATE			IN
11			CLR-				74ASXX:GATE			IN
12			GND 				GND  					NA
13			CLK 				74ASXX:GATE			IN
14			CLKEN- 			74ASXX:GATE			IN
15			Q8- 				74ASXX:LINE-DRV  	ENBO
16			Q7- 				74ASXX:LINE-DRV  	ENBO
17			Q6- 				74ASXX:LINE-DRV  	ENBO
18			Q5- 				74ASXX:LINE-DRV  	ENBO
19			Q4- 				74ASXX:LINE-DRV  	ENBO
20			Q3- 				74ASXX:LINE-DRV  	ENBO
21			Q2- 				74ASXX:LINE-DRV  	ENBO
22			Q1- 				74ASXX:LINE-DRV  	ENBO
23			OE3-				74ASXX:GATE			IN
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS826_TSSOP
[Model File]		PML.MOD
[Package Model]    TSSOP24
|
[Pin]		signal_name 	model_name  		direction
|
1			OE1- 				74ASXX:GATE			IN
2			OE2- 				74ASXX:GATE			IN
3			D1					74ASXX:GATE			IN
4			D2					74ASXX:GATE			IN
5			D3					74ASXX:GATE			IN
6			D4					74ASXX:GATE			IN
7			D5					74ASXX:GATE			IN
8			D6					74ASXX:GATE			IN
9			D7					74ASXX:GATE			IN
10			D8  				74ASXX:GATE			IN
11			CLR-				74ASXX:GATE			IN
12			GND 				GND  					NA
13			CLK 				74ASXX:GATE			IN
14			CLKEN- 			74ASXX:GATE			IN
15			Q8- 				74ASXX:LINE-DRV  	ENBO
16			Q7- 				74ASXX:LINE-DRV  	ENBO
17			Q6- 				74ASXX:LINE-DRV  	ENBO
18			Q5- 				74ASXX:LINE-DRV  	ENBO
19			Q4- 				74ASXX:LINE-DRV  	ENBO
20			Q3- 				74ASXX:LINE-DRV  	ENBO
21			Q2- 				74ASXX:LINE-DRV  	ENBO
22			Q1- 				74ASXX:LINE-DRV  	ENBO
23			OE3-				74ASXX:GATE			IN
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS832_DIP
[Model File]		PML.MOD
[Package Model]    DIP20
|
[Pin]		signal_name 	model_name  		direction
|
1			A1					74ASXX:GATE			IN
2			B1					74ASXX:GATE			IN
3			Y1					74ASXX:LINE-DRV  	OUT
4			A2					74ASXX:GATE			IN
5			B2					74ASXX:GATE			IN
6			Y2					74ASXX:LINE-DRV  	OUT
7			A3					74ASXX:GATE			IN
8			B3					74ASXX:GATE			IN
9			Y3					74ASXX:LINE-DRV  	OUT
10			GND 				GND  					NA
11			Y4  				74ASXX:LINE-DRV  	OUT
12			A4  				74ASXX:GATE			IN
13			B4  				74ASXX:GATE			IN
14			Y5  				74ASXX:LINE-DRV  	OUT
15			A5  				74ASXX:GATE			IN
16			B5  				74ASXX:GATE			IN
17			Y6  				74ASXX:LINE-DRV  	OUT
18			A6  				74ASXX:GATE			IN
19			B6  				74ASXX:GATE			IN
20			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS832_SOIC
[Model File]		PML.MOD
[Package Model]    SOIC20
|
[Pin]		signal_name 	model_name  		direction
|
1			A1					74ASXX:GATE			IN
2			B1					74ASXX:GATE			IN
3			Y1					74ASXX:LINE-DRV  	OUT
4			A2					74ASXX:GATE			IN
5			B2					74ASXX:GATE			IN
6			Y2					74ASXX:LINE-DRV  	OUT
7			A3					74ASXX:GATE			IN
8			B3					74ASXX:GATE			IN
9			Y3					74ASXX:LINE-DRV  	OUT
10			GND 				GND  					NA
11			Y4  				74ASXX:LINE-DRV  	OUT
12			A4  				74ASXX:GATE			IN
13			B4  				74ASXX:GATE			IN
14			Y5  				74ASXX:LINE-DRV  	OUT
15			A5  				74ASXX:GATE			IN
16			B5  				74ASXX:GATE			IN
17			Y6  				74ASXX:LINE-DRV  	OUT
18			A6  				74ASXX:GATE			IN
19			B6  				74ASXX:GATE			IN
20			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS832_SSOP
[Model File]		PML.MOD
[Package Model]    SSOP20
|
[Pin]		signal_name 	model_name  		direction
|
1			A1					74ASXX:GATE			IN
2			B1					74ASXX:GATE			IN
3			Y1					74ASXX:LINE-DRV  	OUT
4			A2					74ASXX:GATE			IN
5			B2					74ASXX:GATE			IN
6			Y2					74ASXX:LINE-DRV  	OUT
7			A3					74ASXX:GATE			IN
8			B3					74ASXX:GATE			IN
9			Y3					74ASXX:LINE-DRV  	OUT
10			GND 				GND  					NA
11			Y4  				74ASXX:LINE-DRV  	OUT
12			A4  				74ASXX:GATE			IN
13			B4  				74ASXX:GATE			IN
14			Y5  				74ASXX:LINE-DRV  	OUT
15			A5  				74ASXX:GATE			IN
16			B5  				74ASXX:GATE			IN
17			Y6  				74ASXX:LINE-DRV  	OUT
18			A6  				74ASXX:GATE			IN
19			B6  				74ASXX:GATE			IN
20			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS832_TSSOP
[Model File]		PML.MOD
[Package Model]    TSSOP20
|
[Pin]		signal_name 	model_name  		direction
|
1			A1					74ASXX:GATE			IN
2			B1					74ASXX:GATE			IN
3			Y1					74ASXX:LINE-DRV  	OUT
4			A2					74ASXX:GATE			IN
5			B2					74ASXX:GATE			IN
6			Y2					74ASXX:LINE-DRV  	OUT
7			A3					74ASXX:GATE			IN
8			B3					74ASXX:GATE			IN
9			Y3					74ASXX:LINE-DRV  	OUT
10			GND 				GND  					NA
11			Y4  				74ASXX:LINE-DRV  	OUT
12			A4  				74ASXX:GATE			IN
13			B4  				74ASXX:GATE			IN
14			Y5  				74ASXX:LINE-DRV  	OUT
15			A5  				74ASXX:GATE			IN
16			B5  				74ASXX:GATE			IN
17			Y6  				74ASXX:LINE-DRV  	OUT
18			A6  				74ASXX:GATE			IN
19			B6  				74ASXX:GATE			IN
20			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS841_DIP
[Model File]		PML.MOD
[Package Model]    DIP24
|
[Pin]		signal_name 	model_name  		direction
|
1			OE-  				74ASXX:GATE			IN
2			D1					74ASXX:GATE			IN
3			D2					74ASXX:GATE			IN
4			D3					74ASXX:GATE			IN
5			D4					74ASXX:GATE			IN
6			D5					74ASXX:GATE			IN
7			D6					74ASXX:GATE			IN
8			D7					74ASXX:GATE			IN
9			D8					74ASXX:GATE			IN
10			D9  				74ASXX:GATE			IN
11			D10 				74ASXX:GATE			IN
12			GND 				GND  					NA
13			CLK 				74ASXX:GATE			IN
14			Q10 				74ASXX:LINE-DRV  	ENBO
15			Q9  				74ASXX:LINE-DRV  	ENBO
16			Q8  				74ASXX:LINE-DRV  	ENBO
17			Q7  				74ASXX:LINE-DRV  	ENBO
18			Q6  				74ASXX:LINE-DRV  	ENBO
19			Q5  				74ASXX:LINE-DRV  	ENBO
20			Q4  				74ASXX:LINE-DRV  	ENBO
21			Q3  				74ASXX:LINE-DRV  	ENBO
22			Q2  				74ASXX:LINE-DRV  	ENBO
23			Q1  				74ASXX:LINE-DRV  	ENBO
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS841_SOIC
[Model File]		PML.MOD
[Package Model]    SOIC24
|
[Pin]		signal_name 	model_name  		direction
|
1			OE-  				74ASXX:GATE			IN
2			D1					74ASXX:GATE			IN
3			D2					74ASXX:GATE			IN
4			D3					74ASXX:GATE			IN
5			D4					74ASXX:GATE			IN
6			D5					74ASXX:GATE			IN
7			D6					74ASXX:GATE			IN
8			D7					74ASXX:GATE			IN
9			D8					74ASXX:GATE			IN
10			D9  				74ASXX:GATE			IN
11			D10 				74ASXX:GATE			IN
12			GND 				GND  					NA
13			CLK 				74ASXX:GATE			IN
14			Q10 				74ASXX:LINE-DRV  	ENBO
15			Q9  				74ASXX:LINE-DRV  	ENBO
16			Q8  				74ASXX:LINE-DRV  	ENBO
17			Q7  				74ASXX:LINE-DRV  	ENBO
18			Q6  				74ASXX:LINE-DRV  	ENBO
19			Q5  				74ASXX:LINE-DRV  	ENBO
20			Q4  				74ASXX:LINE-DRV  	ENBO
21			Q3  				74ASXX:LINE-DRV  	ENBO
22			Q2  				74ASXX:LINE-DRV  	ENBO
23			Q1  				74ASXX:LINE-DRV  	ENBO
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS841_SSOP
[Model File]		PML.MOD
[Package Model]    SSOP24
|
[Pin]		signal_name 	model_name  		direction
|
1			OE-  				74ASXX:GATE			IN
2			D1					74ASXX:GATE			IN
3			D2					74ASXX:GATE			IN
4			D3					74ASXX:GATE			IN
5			D4					74ASXX:GATE			IN
6			D5					74ASXX:GATE			IN
7			D6					74ASXX:GATE			IN
8			D7					74ASXX:GATE			IN
9			D8					74ASXX:GATE			IN
10			D9  				74ASXX:GATE			IN
11			D10 				74ASXX:GATE			IN
12			GND 				GND  					NA
13			CLK 				74ASXX:GATE			IN
14			Q10 				74ASXX:LINE-DRV  	ENBO
15			Q9  				74ASXX:LINE-DRV  	ENBO
16			Q8  				74ASXX:LINE-DRV  	ENBO
17			Q7  				74ASXX:LINE-DRV  	ENBO
18			Q6  				74ASXX:LINE-DRV  	ENBO
19			Q5  				74ASXX:LINE-DRV  	ENBO
20			Q4  				74ASXX:LINE-DRV  	ENBO
21			Q3  				74ASXX:LINE-DRV  	ENBO
22			Q2  				74ASXX:LINE-DRV  	ENBO
23			Q1  				74ASXX:LINE-DRV  	ENBO
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS841_TSSOP
[Model File]		PML.MOD
[Package Model]    TSSOP24
|
[Pin]		signal_name 	model_name  		direction
|
1			OE-  				74ASXX:GATE			IN
2			D1					74ASXX:GATE			IN
3			D2					74ASXX:GATE			IN
4			D3					74ASXX:GATE			IN
5			D4					74ASXX:GATE			IN
6			D5					74ASXX:GATE			IN
7			D6					74ASXX:GATE			IN
8			D7					74ASXX:GATE			IN
9			D8					74ASXX:GATE			IN
10			D9  				74ASXX:GATE			IN
11			D10 				74ASXX:GATE			IN
12			GND 				GND  					NA
13			CLK 				74ASXX:GATE			IN
14			Q10 				74ASXX:LINE-DRV  	ENBO
15			Q9  				74ASXX:LINE-DRV  	ENBO
16			Q8  				74ASXX:LINE-DRV  	ENBO
17			Q7  				74ASXX:LINE-DRV  	ENBO
18			Q6  				74ASXX:LINE-DRV  	ENBO
19			Q5  				74ASXX:LINE-DRV  	ENBO
20			Q4  				74ASXX:LINE-DRV  	ENBO
21			Q3  				74ASXX:LINE-DRV  	ENBO
22			Q2  				74ASXX:LINE-DRV  	ENBO
23			Q1  				74ASXX:LINE-DRV  	ENBO
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS842_DIP
[Model File]		PML.MOD
[Package Model]    DIP24
|
[Pin]		signal_name 	model_name  		direction
|
1			OE-  				74ASXX:GATE			IN
2			D1					74ASXX:GATE			IN
3			D2					74ASXX:GATE			IN
4			D3					74ASXX:GATE			IN
5			D4					74ASXX:GATE			IN
6			D5					74ASXX:GATE			IN
7			D6					74ASXX:GATE			IN
8			D7					74ASXX:GATE			IN
9			D8					74ASXX:GATE			IN
10			D9  				74ASXX:GATE			IN
11			D10 				74ASXX:GATE			IN
12			GND 				GND  					NA
13			CLK 				74ASXX:GATE			IN
14			PRE-				74ASXX:GATE			IN
15			Q9- 				74ASXX:LINE-DRV  	ENBO
16			Q8- 				74ASXX:LINE-DRV  	ENBO
17			Q7- 				74ASXX:LINE-DRV  	ENBO
18			Q6- 				74ASXX:LINE-DRV  	ENBO
19			Q5- 				74ASXX:LINE-DRV  	ENBO
20			Q4- 				74ASXX:LINE-DRV  	ENBO
21			Q3- 				74ASXX:LINE-DRV  	ENBO
22			Q2- 				74ASXX:LINE-DRV  	ENBO
23			Q1- 				74ASXX:LINE-DRV  	ENBO
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS842_SOIC
[Model File]		PML.MOD
[Package Model]    SOIC24
|
[Pin]		signal_name 	model_name  		direction
|
1			OE-  				74ASXX:GATE			IN
2			D1					74ASXX:GATE			IN
3			D2					74ASXX:GATE			IN
4			D3					74ASXX:GATE			IN
5			D4					74ASXX:GATE			IN
6			D5					74ASXX:GATE			IN
7			D6					74ASXX:GATE			IN
8			D7					74ASXX:GATE			IN
9			D8					74ASXX:GATE			IN
10			D9  				74ASXX:GATE			IN
11			D10 				74ASXX:GATE			IN
12			GND 				GND  					NA
13			CLK 				74ASXX:GATE			IN
14			PRE-				74ASXX:GATE			IN
15			Q9- 				74ASXX:LINE-DRV  	ENBO
16			Q8- 				74ASXX:LINE-DRV  	ENBO
17			Q7- 				74ASXX:LINE-DRV  	ENBO
18			Q6- 				74ASXX:LINE-DRV  	ENBO
19			Q5- 				74ASXX:LINE-DRV  	ENBO
20			Q4- 				74ASXX:LINE-DRV  	ENBO
21			Q3- 				74ASXX:LINE-DRV  	ENBO
22			Q2- 				74ASXX:LINE-DRV  	ENBO
23			Q1- 				74ASXX:LINE-DRV  	ENBO
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS842_SSOP
[Model File]		PML.MOD
[Package Model]    SSOP24
|
[Pin]		signal_name 	model_name  		direction
|
1			OE-  				74ASXX:GATE			IN
2			D1					74ASXX:GATE			IN
3			D2					74ASXX:GATE			IN
4			D3					74ASXX:GATE			IN
5			D4					74ASXX:GATE			IN
6			D5					74ASXX:GATE			IN
7			D6					74ASXX:GATE			IN
8			D7					74ASXX:GATE			IN
9			D8					74ASXX:GATE			IN
10			D9  				74ASXX:GATE			IN
11			D10 				74ASXX:GATE			IN
12			GND 				GND  					NA
13			CLK 				74ASXX:GATE			IN
14			PRE-				74ASXX:GATE			IN
15			Q9- 				74ASXX:LINE-DRV  	ENBO
16			Q8- 				74ASXX:LINE-DRV  	ENBO
17			Q7- 				74ASXX:LINE-DRV  	ENBO
18			Q6- 				74ASXX:LINE-DRV  	ENBO
19			Q5- 				74ASXX:LINE-DRV  	ENBO
20			Q4- 				74ASXX:LINE-DRV  	ENBO
21			Q3- 				74ASXX:LINE-DRV  	ENBO
22			Q2- 				74ASXX:LINE-DRV  	ENBO
23			Q1- 				74ASXX:LINE-DRV  	ENBO
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS842_TSSOP
[Model File]		PML.MOD
[Package Model]    TSSOP24
|
[Pin]		signal_name 	model_name  		direction
|
1			OE-  				74ASXX:GATE			IN
2			D1					74ASXX:GATE			IN
3			D2					74ASXX:GATE			IN
4			D3					74ASXX:GATE			IN
5			D4					74ASXX:GATE			IN
6			D5					74ASXX:GATE			IN
7			D6					74ASXX:GATE			IN
8			D7					74ASXX:GATE			IN
9			D8					74ASXX:GATE			IN
10			D9  				74ASXX:GATE			IN
11			D10 				74ASXX:GATE			IN
12			GND 				GND  					NA
13			CLK 				74ASXX:GATE			IN
14			PRE-				74ASXX:GATE			IN
15			Q9- 				74ASXX:LINE-DRV  	ENBO
16			Q8- 				74ASXX:LINE-DRV  	ENBO
17			Q7- 				74ASXX:LINE-DRV  	ENBO
18			Q6- 				74ASXX:LINE-DRV  	ENBO
19			Q5- 				74ASXX:LINE-DRV  	ENBO
20			Q4- 				74ASXX:LINE-DRV  	ENBO
21			Q3- 				74ASXX:LINE-DRV  	ENBO
22			Q2- 				74ASXX:LINE-DRV  	ENBO
23			Q1- 				74ASXX:LINE-DRV  	ENBO
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS843_DIP
[Model File]		PML.MOD
[Package Model]    DIP24
|
[Pin]		signal_name 	model_name  		direction
|
1			OE-  				74ASXX:GATE			IN
2			D1					74ASXX:GATE			IN
3			D2					74ASXX:GATE			IN
4			D3					74ASXX:GATE			IN
5			D4					74ASXX:GATE			IN
6			D5					74ASXX:GATE			IN
7			D6					74ASXX:GATE			IN
8			D7					74ASXX:GATE			IN
9			D8					74ASXX:GATE			IN
10			D9  				74ASXX:GATE			IN
11			CLR-				74ASXX:GATE			IN
12			GND 				GND  					NA
13			CLK 				74ASXX:GATE			IN
14			PRE-				74ASXX:GATE			IN
15			Q9  				74ASXX:LINE-DRV  	ENBO
16			Q8  				74ASXX:LINE-DRV  	ENBO
17			Q7  				74ASXX:LINE-DRV  	ENBO
18			Q6  				74ASXX:LINE-DRV  	ENBO
19			Q5  				74ASXX:LINE-DRV  	ENBO
20			Q4  				74ASXX:LINE-DRV  	ENBO
21			Q3  				74ASXX:LINE-DRV  	ENBO
22			Q2  				74ASXX:LINE-DRV  	ENBO
23			Q1  				74ASXX:LINE-DRV  	ENBO
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS843_SOIC
[Model File]		PML.MOD
[Package Model]    SOIC24
|
[Pin]		signal_name 	model_name  		direction
|
1			OE-  				74ASXX:GATE			IN
2			D1					74ASXX:GATE			IN
3			D2					74ASXX:GATE			IN
4			D3					74ASXX:GATE			IN
5			D4					74ASXX:GATE			IN
6			D5					74ASXX:GATE			IN
7			D6					74ASXX:GATE			IN
8			D7					74ASXX:GATE			IN
9			D8					74ASXX:GATE			IN
10			D9  				74ASXX:GATE			IN
11			CLR-				74ASXX:GATE			IN
12			GND 				GND  					NA
13			CLK 				74ASXX:GATE			IN
14			PRE-				74ASXX:GATE			IN
15			Q9  				74ASXX:LINE-DRV  	ENBO
16			Q8  				74ASXX:LINE-DRV  	ENBO
17			Q7  				74ASXX:LINE-DRV  	ENBO
18			Q6  				74ASXX:LINE-DRV  	ENBO
19			Q5  				74ASXX:LINE-DRV  	ENBO
20			Q4  				74ASXX:LINE-DRV  	ENBO
21			Q3  				74ASXX:LINE-DRV  	ENBO
22			Q2  				74ASXX:LINE-DRV  	ENBO
23			Q1  				74ASXX:LINE-DRV  	ENBO
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS843_SSOP
[Model File]		PML.MOD
[Package Model]    SSOP24
|
[Pin]		signal_name 	model_name  		direction
|
1			OE-  				74ASXX:GATE			IN
2			D1					74ASXX:GATE			IN
3			D2					74ASXX:GATE			IN
4			D3					74ASXX:GATE			IN
5			D4					74ASXX:GATE			IN
6			D5					74ASXX:GATE			IN
7			D6					74ASXX:GATE			IN
8			D7					74ASXX:GATE			IN
9			D8					74ASXX:GATE			IN
10			D9  				74ASXX:GATE			IN
11			CLR-				74ASXX:GATE			IN
12			GND 				GND  					NA
13			CLK 				74ASXX:GATE			IN
14			PRE-				74ASXX:GATE			IN
15			Q9  				74ASXX:LINE-DRV  	ENBO
16			Q8  				74ASXX:LINE-DRV  	ENBO
17			Q7  				74ASXX:LINE-DRV  	ENBO
18			Q6  				74ASXX:LINE-DRV  	ENBO
19			Q5  				74ASXX:LINE-DRV  	ENBO
20			Q4  				74ASXX:LINE-DRV  	ENBO
21			Q3  				74ASXX:LINE-DRV  	ENBO
22			Q2  				74ASXX:LINE-DRV  	ENBO
23			Q1  				74ASXX:LINE-DRV  	ENBO
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS843_TSSOP
[Model File]		PML.MOD
[Package Model]    TSSOP24
|
[Pin]		signal_name 	model_name  		direction
|
1			OE-  				74ASXX:GATE			IN
2			D1					74ASXX:GATE			IN
3			D2					74ASXX:GATE			IN
4			D3					74ASXX:GATE			IN
5			D4					74ASXX:GATE			IN
6			D5					74ASXX:GATE			IN
7			D6					74ASXX:GATE			IN
8			D7					74ASXX:GATE			IN
9			D8					74ASXX:GATE			IN
10			D9  				74ASXX:GATE			IN
11			CLR-				74ASXX:GATE			IN
12			GND 				GND  					NA
13			CLK 				74ASXX:GATE			IN
14			PRE-				74ASXX:GATE			IN
15			Q9  				74ASXX:LINE-DRV  	ENBO
16			Q8  				74ASXX:LINE-DRV  	ENBO
17			Q7  				74ASXX:LINE-DRV  	ENBO
18			Q6  				74ASXX:LINE-DRV  	ENBO
19			Q5  				74ASXX:LINE-DRV  	ENBO
20			Q4  				74ASXX:LINE-DRV  	ENBO
21			Q3  				74ASXX:LINE-DRV  	ENBO
22			Q2  				74ASXX:LINE-DRV  	ENBO
23			Q1  				74ASXX:LINE-DRV  	ENBO
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS844_DIP
[Model File]		PML.MOD
[Package Model]    DIP24
|
[Pin]		signal_name 	model_name  		direction
|
1			OE-  				74ASXX:GATE			IN
2			D1-  				74ASXX:GATE			IN
3			D2-  				74ASXX:GATE			IN
4			D3-  				74ASXX:GATE			IN
5			D4-  				74ASXX:GATE			IN
6			D5-  				74ASXX:GATE			IN
7			D6-  				74ASXX:GATE			IN
8			D7-  				74ASXX:GATE			IN
9			D8-  				74ASXX:GATE			IN
10			D9- 				74ASXX:GATE			IN
11			CLR-				74ASXX:GATE			IN
12			GND 				GND  					NA
13			CLK 				74ASXX:GATE			IN
14			PRE-				74ASXX:GATE			IN
15			Q9- 				74ASXX:LINE-DRV  	ENBO
16			Q8- 				74ASXX:LINE-DRV  	ENBO
17			Q7- 				74ASXX:LINE-DRV  	ENBO
18			Q6- 				74ASXX:LINE-DRV  	ENBO
19			Q5- 				74ASXX:LINE-DRV  	ENBO
20			Q4- 				74ASXX:LINE-DRV  	ENBO
21			Q3- 				74ASXX:LINE-DRV  	ENBO
22			Q2- 				74ASXX:LINE-DRV  	ENBO
23			Q1- 				74ASXX:LINE-DRV  	ENBO
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS844_SOIC
[Model File]		PML.MOD
[Package Model]    SOIC24
|
[Pin]		signal_name 	model_name  		direction
|
1			OE-  				74ASXX:GATE			IN
2			D1-  				74ASXX:GATE			IN
3			D2-  				74ASXX:GATE			IN
4			D3-  				74ASXX:GATE			IN
5			D4-  				74ASXX:GATE			IN
6			D5-  				74ASXX:GATE			IN
7			D6-  				74ASXX:GATE			IN
8			D7-  				74ASXX:GATE			IN
9			D8-  				74ASXX:GATE			IN
10			D9- 				74ASXX:GATE			IN
11			CLR-				74ASXX:GATE			IN
12			GND 				GND  					NA
13			CLK 				74ASXX:GATE			IN
14			PRE-				74ASXX:GATE			IN
15			Q9- 				74ASXX:LINE-DRV  	ENBO
16			Q8- 				74ASXX:LINE-DRV  	ENBO
17			Q7- 				74ASXX:LINE-DRV  	ENBO
18			Q6- 				74ASXX:LINE-DRV  	ENBO
19			Q5- 				74ASXX:LINE-DRV  	ENBO
20			Q4- 				74ASXX:LINE-DRV  	ENBO
21			Q3- 				74ASXX:LINE-DRV  	ENBO
22			Q2- 				74ASXX:LINE-DRV  	ENBO
23			Q1- 				74ASXX:LINE-DRV  	ENBO
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS844_SSOP
[Model File]		PML.MOD
[Package Model]    SSOP24
|
[Pin]		signal_name 	model_name  		direction
|
1			OE-  				74ASXX:GATE			IN
2			D1-  				74ASXX:GATE			IN
3			D2-  				74ASXX:GATE			IN
4			D3-  				74ASXX:GATE			IN
5			D4-  				74ASXX:GATE			IN
6			D5-  				74ASXX:GATE			IN
7			D6-  				74ASXX:GATE			IN
8			D7-  				74ASXX:GATE			IN
9			D8-  				74ASXX:GATE			IN
10			D9- 				74ASXX:GATE			IN
11			CLR-				74ASXX:GATE			IN
12			GND 				GND  					NA
13			CLK 				74ASXX:GATE			IN
14			PRE-				74ASXX:GATE			IN
15			Q9- 				74ASXX:LINE-DRV  	ENBO
16			Q8- 				74ASXX:LINE-DRV  	ENBO
17			Q7- 				74ASXX:LINE-DRV  	ENBO
18			Q6- 				74ASXX:LINE-DRV  	ENBO
19			Q5- 				74ASXX:LINE-DRV  	ENBO
20			Q4- 				74ASXX:LINE-DRV  	ENBO
21			Q3- 				74ASXX:LINE-DRV  	ENBO
22			Q2- 				74ASXX:LINE-DRV  	ENBO
23			Q1- 				74ASXX:LINE-DRV  	ENBO
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS844_TSSOP
[Model File]		PML.MOD
[Package Model]    TSSOP24
|
[Pin]		signal_name 	model_name  		direction
|
1			OE-  				74ASXX:GATE			IN
2			D1-  				74ASXX:GATE			IN
3			D2-  				74ASXX:GATE			IN
4			D3-  				74ASXX:GATE			IN
5			D4-  				74ASXX:GATE			IN
6			D5-  				74ASXX:GATE			IN
7			D6-  				74ASXX:GATE			IN
8			D7-  				74ASXX:GATE			IN
9			D8-  				74ASXX:GATE			IN
10			D9- 				74ASXX:GATE			IN
11			CLR-				74ASXX:GATE			IN
12			GND 				GND  					NA
13			CLK 				74ASXX:GATE			IN
14			PRE-				74ASXX:GATE			IN
15			Q9- 				74ASXX:LINE-DRV  	ENBO
16			Q8- 				74ASXX:LINE-DRV  	ENBO
17			Q7- 				74ASXX:LINE-DRV  	ENBO
18			Q6- 				74ASXX:LINE-DRV  	ENBO
19			Q5- 				74ASXX:LINE-DRV  	ENBO
20			Q4- 				74ASXX:LINE-DRV  	ENBO
21			Q3- 				74ASXX:LINE-DRV  	ENBO
22			Q2- 				74ASXX:LINE-DRV  	ENBO
23			Q1- 				74ASXX:LINE-DRV  	ENBO
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS845_DIP
[Model File]		PML.MOD
[Package Model]    DIP24
|
[Pin]		signal_name 	model_name  		direction
|
1			OE1- 				74ASXX:GATE			IN
2			OE2- 				74ASXX:GATE			IN
3			D1					74ASXX:GATE			IN
4			D2					74ASXX:GATE			IN
5			D3					74ASXX:GATE			IN
6			D4					74ASXX:GATE			IN
7			D5					74ASXX:GATE			IN
8			D6					74ASXX:GATE			IN
9			D7					74ASXX:GATE			IN
10			D8  				74ASXX:GATE			IN
11			CLR-				74ASXX:GATE			IN
12			GND 				GND  					NA
13			CLK 				74ASXX:GATE			IN
14			PRE-				74ASXX:GATE			IN
15			Q8  				74ASXX:LINE-DRV  	ENBO
16			Q7  				74ASXX:LINE-DRV  	ENBO
17			Q6  				74ASXX:LINE-DRV  	ENBO
18			Q5  				74ASXX:LINE-DRV  	ENBO
19			Q4  				74ASXX:LINE-DRV  	ENBO
20			Q3  				74ASXX:LINE-DRV  	ENBO
21			Q2  				74ASXX:LINE-DRV  	ENBO
22			Q1  				74ASXX:LINE-DRV  	ENBO
23			OE3-				74ASXX:GATE			IN
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS845_SOIC
[Model File]		PML.MOD
[Package Model]    SOIC24
|
[Pin]		signal_name 	model_name  		direction
|
1			OE1- 				74ASXX:GATE			IN
2			OE2- 				74ASXX:GATE			IN
3			D1					74ASXX:GATE			IN
4			D2					74ASXX:GATE			IN
5			D3					74ASXX:GATE			IN
6			D4					74ASXX:GATE			IN
7			D5					74ASXX:GATE			IN
8			D6					74ASXX:GATE			IN
9			D7					74ASXX:GATE			IN
10			D8  				74ASXX:GATE			IN
11			CLR-				74ASXX:GATE			IN
12			GND 				GND  					NA
13			CLK 				74ASXX:GATE			IN
14			PRE-				74ASXX:GATE			IN
15			Q8  				74ASXX:LINE-DRV  	ENBO
16			Q7  				74ASXX:LINE-DRV  	ENBO
17			Q6  				74ASXX:LINE-DRV  	ENBO
18			Q5  				74ASXX:LINE-DRV  	ENBO
19			Q4  				74ASXX:LINE-DRV  	ENBO
20			Q3  				74ASXX:LINE-DRV  	ENBO
21			Q2  				74ASXX:LINE-DRV  	ENBO
22			Q1  				74ASXX:LINE-DRV  	ENBO
23			OE3-				74ASXX:GATE			IN
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS845_SSOP
[Model File]		PML.MOD
[Package Model]    SSOP24
|
[Pin]		signal_name 	model_name  		direction
|
1			OE1- 				74ASXX:GATE			IN
2			OE2- 				74ASXX:GATE			IN
3			D1					74ASXX:GATE			IN
4			D2					74ASXX:GATE			IN
5			D3					74ASXX:GATE			IN
6			D4					74ASXX:GATE			IN
7			D5					74ASXX:GATE			IN
8			D6					74ASXX:GATE			IN
9			D7					74ASXX:GATE			IN
10			D8  				74ASXX:GATE			IN
11			CLR-				74ASXX:GATE			IN
12			GND 				GND  					NA
13			CLK 				74ASXX:GATE			IN
14			PRE-				74ASXX:GATE			IN
15			Q8  				74ASXX:LINE-DRV  	ENBO
16			Q7  				74ASXX:LINE-DRV  	ENBO
17			Q6  				74ASXX:LINE-DRV  	ENBO
18			Q5  				74ASXX:LINE-DRV  	ENBO
19			Q4  				74ASXX:LINE-DRV  	ENBO
20			Q3  				74ASXX:LINE-DRV  	ENBO
21			Q2  				74ASXX:LINE-DRV  	ENBO
22			Q1  				74ASXX:LINE-DRV  	ENBO
23			OE3-				74ASXX:GATE			IN
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS845_TSSOP
[Model File]		PML.MOD
[Package Model]    TSSOP24
|
[Pin]		signal_name 	model_name  		direction
|
1			OE1- 				74ASXX:GATE			IN
2			OE2- 				74ASXX:GATE			IN
3			D1					74ASXX:GATE			IN
4			D2					74ASXX:GATE			IN
5			D3					74ASXX:GATE			IN
6			D4					74ASXX:GATE			IN
7			D5					74ASXX:GATE			IN
8			D6					74ASXX:GATE			IN
9			D7					74ASXX:GATE			IN
10			D8  				74ASXX:GATE			IN
11			CLR-				74ASXX:GATE			IN
12			GND 				GND  					NA
13			CLK 				74ASXX:GATE			IN
14			PRE-				74ASXX:GATE			IN
15			Q8  				74ASXX:LINE-DRV  	ENBO
16			Q7  				74ASXX:LINE-DRV  	ENBO
17			Q6  				74ASXX:LINE-DRV  	ENBO
18			Q5  				74ASXX:LINE-DRV  	ENBO
19			Q4  				74ASXX:LINE-DRV  	ENBO
20			Q3  				74ASXX:LINE-DRV  	ENBO
21			Q2  				74ASXX:LINE-DRV  	ENBO
22			Q1  				74ASXX:LINE-DRV  	ENBO
23			OE3-				74ASXX:GATE			IN
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS846_DIP
[Model File]		PML.MOD
[Package Model]    DIP24
|
[Pin]		signal_name 	model_name  		direction
|
1			OE1- 				74ASXX:GATE			IN
2			OE2- 				74ASXX:GATE			IN
3			D1					74ASXX:GATE			IN
4			D2					74ASXX:GATE			IN
5			D3					74ASXX:GATE			IN
6			D4					74ASXX:GATE			IN
7			D5					74ASXX:GATE			IN
8			D6					74ASXX:GATE			IN
9			D7					74ASXX:GATE			IN
10			D8  				74ASXX:GATE			IN
11			CLR-				74ASXX:GATE			IN
12			GND 				GND  					NA
13			CLK 				74ASXX:GATE			IN
14			PRE-				74ASXX:GATE			IN
15			Q8- 				74ASXX:LINE-DRV  	ENBO
16			Q7- 				74ASXX:LINE-DRV  	ENBO
17			Q6- 				74ASXX:LINE-DRV  	ENBO
18			Q5- 				74ASXX:LINE-DRV  	ENBO
19			Q4- 				74ASXX:LINE-DRV  	ENBO
20			Q3- 				74ASXX:LINE-DRV  	ENBO
21			Q2- 				74ASXX:LINE-DRV  	ENBO
22			Q1- 				74ASXX:LINE-DRV  	ENBO
23			OE3-				74ASXX:GATE			IN
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS846_SOIC
[Model File]		PML.MOD
[Package Model]    SOIC24
|
[Pin]		signal_name 	model_name  		direction
|
1			OE1- 				74ASXX:GATE			IN
2			OE2- 				74ASXX:GATE			IN
3			D1					74ASXX:GATE			IN
4			D2					74ASXX:GATE			IN
5			D3					74ASXX:GATE			IN
6			D4					74ASXX:GATE			IN
7			D5					74ASXX:GATE			IN
8			D6					74ASXX:GATE			IN
9			D7					74ASXX:GATE			IN
10			D8  				74ASXX:GATE			IN
11			CLR-				74ASXX:GATE			IN
12			GND 				GND  					NA
13			CLK 				74ASXX:GATE			IN
14			PRE-				74ASXX:GATE			IN
15			Q8- 				74ASXX:LINE-DRV  	ENBO
16			Q7- 				74ASXX:LINE-DRV  	ENBO
17			Q6- 				74ASXX:LINE-DRV  	ENBO
18			Q5- 				74ASXX:LINE-DRV  	ENBO
19			Q4- 				74ASXX:LINE-DRV  	ENBO
20			Q3- 				74ASXX:LINE-DRV  	ENBO
21			Q2- 				74ASXX:LINE-DRV  	ENBO
22			Q1- 				74ASXX:LINE-DRV  	ENBO
23			OE3-				74ASXX:GATE			IN
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS846_SSOP
[Model File]		PML.MOD
[Package Model]    SSOP24
|
[Pin]		signal_name 	model_name  		direction
|
1			OE1- 				74ASXX:GATE			IN
2			OE2- 				74ASXX:GATE			IN
3			D1					74ASXX:GATE			IN
4			D2					74ASXX:GATE			IN
5			D3					74ASXX:GATE			IN
6			D4					74ASXX:GATE			IN
7			D5					74ASXX:GATE			IN
8			D6					74ASXX:GATE			IN
9			D7					74ASXX:GATE			IN
10			D8  				74ASXX:GATE			IN
11			CLR-				74ASXX:GATE			IN
12			GND 				GND  					NA
13			CLK 				74ASXX:GATE			IN
14			PRE-				74ASXX:GATE			IN
15			Q8- 				74ASXX:LINE-DRV  	ENBO
16			Q7- 				74ASXX:LINE-DRV  	ENBO
17			Q6- 				74ASXX:LINE-DRV  	ENBO
18			Q5- 				74ASXX:LINE-DRV  	ENBO
19			Q4- 				74ASXX:LINE-DRV  	ENBO
20			Q3- 				74ASXX:LINE-DRV  	ENBO
21			Q2- 				74ASXX:LINE-DRV  	ENBO
22			Q1- 				74ASXX:LINE-DRV  	ENBO
23			OE3-				74ASXX:GATE			IN
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS846_TSSOP
[Model File]		PML.MOD
[Package Model]    TSSOP24
|
[Pin]		signal_name 	model_name  		direction
|
1			OE1- 				74ASXX:GATE			IN
2			OE2- 				74ASXX:GATE			IN
3			D1					74ASXX:GATE			IN
4			D2					74ASXX:GATE			IN
5			D3					74ASXX:GATE			IN
6			D4					74ASXX:GATE			IN
7			D5					74ASXX:GATE			IN
8			D6					74ASXX:GATE			IN
9			D7					74ASXX:GATE			IN
10			D8  				74ASXX:GATE			IN
11			CLR-				74ASXX:GATE			IN
12			GND 				GND  					NA
13			CLK 				74ASXX:GATE			IN
14			PRE-				74ASXX:GATE			IN
15			Q8- 				74ASXX:LINE-DRV  	ENBO
16			Q7- 				74ASXX:LINE-DRV  	ENBO
17			Q6- 				74ASXX:LINE-DRV  	ENBO
18			Q5- 				74ASXX:LINE-DRV  	ENBO
19			Q4- 				74ASXX:LINE-DRV  	ENBO
20			Q3- 				74ASXX:LINE-DRV  	ENBO
21			Q2- 				74ASXX:LINE-DRV  	ENBO
22			Q1- 				74ASXX:LINE-DRV  	ENBO
23			OE3-				74ASXX:GATE			IN
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS850_DIP
[Model File]		PML.MOD
[Package Model]    DIP28
|
[Pin]		signal_name 	model_name  		direction
|
1			D7					74ASXX:GATE			IN
2			D6					74ASXX:GATE			IN
3			D5					74ASXX:GATE			IN
4			D4					74ASXX:GATE			IN
5			D3					74ASXX:GATE			IN
6			D2					74ASXX:GATE			IN
7			D1					74ASXX:GATE			IN
8			D0					74ASXX:GATE			IN
9			GY-  				74ASXX:GATE			IN
10			G-  				74ASXX:GATE			IN
11			GW  				74ASXX:GATE			IN
12			CLK 				74ASXX:GATE			IN
13			W					74ASXX:LINE-DRV  	ENBO
14			GND 				GND  					NA
15			S3  				74ASXX:GATE			IN
16			S2  				74ASXX:GATE			IN
17			S1  				74ASXX:GATE			IN
18			S0  				74ASXX:GATE			IN
19			Y					74ASXX:LINE-DRV  	ENBO
20			D15 				74ASXX:GATE			IN
21			D14 				74ASXX:GATE			IN
22			D13 				74ASXX:GATE			IN
23			D12 				74ASXX:GATE			IN
24			D11 				74ASXX:GATE			IN
25			D10 				74ASXX:GATE			IN
26			D9  				74ASXX:GATE			IN
27			D8  				74ASXX:GATE			IN
28			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS850_SOIC
[Model File]		PML.MOD
[Package Model]    SOIC28
|
[Pin]		signal_name 	model_name  		direction
|
1			D7					74ASXX:GATE			IN
2			D6					74ASXX:GATE			IN
3			D5					74ASXX:GATE			IN
4			D4					74ASXX:GATE			IN
5			D3					74ASXX:GATE			IN
6			D2					74ASXX:GATE			IN
7			D1					74ASXX:GATE			IN
8			D0					74ASXX:GATE			IN
9			GY-  				74ASXX:GATE			IN
10			G-  				74ASXX:GATE			IN
11			GW  				74ASXX:GATE			IN
12			CLK 				74ASXX:GATE			IN
13			W					74ASXX:LINE-DRV  	ENBO
14			GND 				GND  					NA
15			S3  				74ASXX:GATE			IN
16			S2  				74ASXX:GATE			IN
17			S1  				74ASXX:GATE			IN
18			S0  				74ASXX:GATE			IN
19			Y					74ASXX:LINE-DRV  	ENBO
20			D15 				74ASXX:GATE			IN
21			D14 				74ASXX:GATE			IN
22			D13 				74ASXX:GATE			IN
23			D12 				74ASXX:GATE			IN
24			D11 				74ASXX:GATE			IN
25			D10 				74ASXX:GATE			IN
26			D9  				74ASXX:GATE			IN
27			D8  				74ASXX:GATE			IN
28			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS850_SSOP
[Model File]		PML.MOD
[Package Model]    SSOP28
|
[Pin]		signal_name 	model_name  		direction
|
1			D7					74ASXX:GATE			IN
2			D6					74ASXX:GATE			IN
3			D5					74ASXX:GATE			IN
4			D4					74ASXX:GATE			IN
5			D3					74ASXX:GATE			IN
6			D2					74ASXX:GATE			IN
7			D1					74ASXX:GATE			IN
8			D0					74ASXX:GATE			IN
9			GY-  				74ASXX:GATE			IN
10			G-  				74ASXX:GATE			IN
11			GW  				74ASXX:GATE			IN
12			CLK 				74ASXX:GATE			IN
13			W					74ASXX:LINE-DRV  	ENBO
14			GND 				GND  					NA
15			S3  				74ASXX:GATE			IN
16			S2  				74ASXX:GATE			IN
17			S1  				74ASXX:GATE			IN
18			S0  				74ASXX:GATE			IN
19			Y					74ASXX:LINE-DRV  	ENBO
20			D15 				74ASXX:GATE			IN
21			D14 				74ASXX:GATE			IN
22			D13 				74ASXX:GATE			IN
23			D12 				74ASXX:GATE			IN
24			D11 				74ASXX:GATE			IN
25			D10 				74ASXX:GATE			IN
26			D9  				74ASXX:GATE			IN
27			D8  				74ASXX:GATE			IN
28			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS851_DIP
[Model File]		PML.MOD
[Package Model]    DIP28
|
[Pin]		signal_name 	model_name  		direction
|
1			D7					74ASXX:GATE			IN
2			D6					74ASXX:GATE			IN
3			D5					74ASXX:GATE			IN
4			D4					74ASXX:GATE			IN
5			D3					74ASXX:GATE			IN
6			D2					74ASXX:GATE			IN
7			D1					74ASXX:GATE			IN
8			D0					74ASXX:GATE			IN
9			GY-  				74ASXX:GATE			IN
10			G-  				74ASXX:GATE			IN
11			GW  				74ASXX:GATE			IN
12			SC- 				74ASXX:GATE			IN
13			W					74ASXX:LINE-DRV  	ENBO
14			GND 				GND  					NA
15			S3  				74ASXX:GATE			IN
16			S2  				74ASXX:GATE			IN
17			S1  				74ASXX:GATE			IN
18			S0  				74ASXX:GATE			IN
19			Y					74ASXX:LINE-DRV  	ENBO
20			D15 				74ASXX:GATE			IN
21			D14 				74ASXX:GATE			IN
22			D13 				74ASXX:GATE			IN
23			D12 				74ASXX:GATE			IN
24			D11 				74ASXX:GATE			IN
25			D10 				74ASXX:GATE			IN
26			D9  				74ASXX:GATE			IN
27			D8  				74ASXX:GATE			IN
28			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS851_SOIC
[Model File]		PML.MOD
[Package Model]    SOIC28
|
[Pin]		signal_name 	model_name  		direction
|
1			D7					74ASXX:GATE			IN
2			D6					74ASXX:GATE			IN
3			D5					74ASXX:GATE			IN
4			D4					74ASXX:GATE			IN
5			D3					74ASXX:GATE			IN
6			D2					74ASXX:GATE			IN
7			D1					74ASXX:GATE			IN
8			D0					74ASXX:GATE			IN
9			GY-  				74ASXX:GATE			IN
10			G-  				74ASXX:GATE			IN
11			GW  				74ASXX:GATE			IN
12			SC- 				74ASXX:GATE			IN
13			W					74ASXX:LINE-DRV  	ENBO
14			GND 				GND  					NA
15			S3  				74ASXX:GATE			IN
16			S2  				74ASXX:GATE			IN
17			S1  				74ASXX:GATE			IN
18			S0  				74ASXX:GATE			IN
19			Y					74ASXX:LINE-DRV  	ENBO
20			D15 				74ASXX:GATE			IN
21			D14 				74ASXX:GATE			IN
22			D13 				74ASXX:GATE			IN
23			D12 				74ASXX:GATE			IN
24			D11 				74ASXX:GATE			IN
25			D10 				74ASXX:GATE			IN
26			D9  				74ASXX:GATE			IN
27			D8  				74ASXX:GATE			IN
28			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS851_SSOP
[Model File]		PML.MOD
[Package Model]    SSOP28
|
[Pin]		signal_name 	model_name  		direction
|
1			D7					74ASXX:GATE			IN
2			D6					74ASXX:GATE			IN
3			D5					74ASXX:GATE			IN
4			D4					74ASXX:GATE			IN
5			D3					74ASXX:GATE			IN
6			D2					74ASXX:GATE			IN
7			D1					74ASXX:GATE			IN
8			D0					74ASXX:GATE			IN
9			GY-  				74ASXX:GATE			IN
10			G-  				74ASXX:GATE			IN
11			GW  				74ASXX:GATE			IN
12			SC- 				74ASXX:GATE			IN
13			W					74ASXX:LINE-DRV  	ENBO
14			GND 				GND  					NA
15			S3  				74ASXX:GATE			IN
16			S2  				74ASXX:GATE			IN
17			S1  				74ASXX:GATE			IN
18			S0  				74ASXX:GATE			IN
19			Y					74ASXX:LINE-DRV  	ENBO
20			D15 				74ASXX:GATE			IN
21			D14 				74ASXX:GATE			IN
22			D13 				74ASXX:GATE			IN
23			D12 				74ASXX:GATE			IN
24			D11 				74ASXX:GATE			IN
25			D10 				74ASXX:GATE			IN
26			D9  				74ASXX:GATE			IN
27			D8  				74ASXX:GATE			IN
28			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS852_DIP
[Model File]		PML.MOD
[Package Model]    DIP24
|
[Pin]		signal_name 	model_name  		direction
|
1			S0					74ASXX:GATE			IN
2			S1					74ASXX:GATE			IN
3			S2					74ASXX:GATE			IN
4			A1					74ASXX:LINE-DRV  	BIDIR
5			A2					74ASXX:LINE-DRV  	BIDIR
6			A3					74ASXX:LINE-DRV  	BIDIR
7			A4					74ASXX:LINE-DRV  	BIDIR
8			A5					74ASXX:LINE-DRV  	BIDIR
9			A6					74ASXX:LINE-DRV  	BIDIR
10			A7  				74ASXX:LINE-DRV  	BIDIR
11			A8  				74ASXX:LINE-DRV  	BIDIR
12			GND 				GND  					NA
13			Q8  				74ASXX:GATE			IN
14			B8  				74ASXX:LINE-DRV  	BIDIR
15			B7  				74ASXX:LINE-DRV  	BIDIR
16			B6  				74ASXX:LINE-DRV  	BIDIR
17			B5  				74ASXX:LINE-DRV  	BIDIR
18			B4  				74ASXX:LINE-DRV  	BIDIR
19			B3  				74ASXX:LINE-DRV  	BIDIR
20			B2  				74ASXX:LINE-DRV  	BIDIR
21			B1  				74ASXX:LINE-DRV  	BIDIR
22			SERIN  			74ASXX:GATE			IN
23			CLK 				74ASXX:GATE			IN
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS852_SOIC
[Model File]		PML.MOD
[Package Model]    SOIC24
|
[Pin]		signal_name 	model_name  		direction
|
1			S0					74ASXX:GATE			IN
2			S1					74ASXX:GATE			IN
3			S2					74ASXX:GATE			IN
4			A1					74ASXX:LINE-DRV  	BIDIR
5			A2					74ASXX:LINE-DRV  	BIDIR
6			A3					74ASXX:LINE-DRV  	BIDIR
7			A4					74ASXX:LINE-DRV  	BIDIR
8			A5					74ASXX:LINE-DRV  	BIDIR
9			A6					74ASXX:LINE-DRV  	BIDIR
10			A7  				74ASXX:LINE-DRV  	BIDIR
11			A8  				74ASXX:LINE-DRV  	BIDIR
12			GND 				GND  					NA
13			Q8  				74ASXX:GATE			IN
14			B8  				74ASXX:LINE-DRV  	BIDIR
15			B7  				74ASXX:LINE-DRV  	BIDIR
16			B6  				74ASXX:LINE-DRV  	BIDIR
17			B5  				74ASXX:LINE-DRV  	BIDIR
18			B4  				74ASXX:LINE-DRV  	BIDIR
19			B3  				74ASXX:LINE-DRV  	BIDIR
20			B2  				74ASXX:LINE-DRV  	BIDIR
21			B1  				74ASXX:LINE-DRV  	BIDIR
22			SERIN  			74ASXX:GATE			IN
23			CLK 				74ASXX:GATE			IN
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS852_SSOP
[Model File]		PML.MOD
[Package Model]    SSOP24
|
[Pin]		signal_name 	model_name  		direction
|
1			S0					74ASXX:GATE			IN
2			S1					74ASXX:GATE			IN
3			S2					74ASXX:GATE			IN
4			A1					74ASXX:LINE-DRV  	BIDIR
5			A2					74ASXX:LINE-DRV  	BIDIR
6			A3					74ASXX:LINE-DRV  	BIDIR
7			A4					74ASXX:LINE-DRV  	BIDIR
8			A5					74ASXX:LINE-DRV  	BIDIR
9			A6					74ASXX:LINE-DRV  	BIDIR
10			A7  				74ASXX:LINE-DRV  	BIDIR
11			A8  				74ASXX:LINE-DRV  	BIDIR
12			GND 				GND  					NA
13			Q8  				74ASXX:GATE			IN
14			B8  				74ASXX:LINE-DRV  	BIDIR
15			B7  				74ASXX:LINE-DRV  	BIDIR
16			B6  				74ASXX:LINE-DRV  	BIDIR
17			B5  				74ASXX:LINE-DRV  	BIDIR
18			B4  				74ASXX:LINE-DRV  	BIDIR
19			B3  				74ASXX:LINE-DRV  	BIDIR
20			B2  				74ASXX:LINE-DRV  	BIDIR
21			B1  				74ASXX:LINE-DRV  	BIDIR
22			SERIN  			74ASXX:GATE			IN
23			CLK 				74ASXX:GATE			IN
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS852_TSSOP
[Model File]		PML.MOD
[Package Model]    TSSOP24
|
[Pin]		signal_name 	model_name  		direction
|
1			S0					74ASXX:GATE			IN
2			S1					74ASXX:GATE			IN
3			S2					74ASXX:GATE			IN
4			A1					74ASXX:LINE-DRV  	BIDIR
5			A2					74ASXX:LINE-DRV  	BIDIR
6			A3					74ASXX:LINE-DRV  	BIDIR
7			A4					74ASXX:LINE-DRV  	BIDIR
8			A5					74ASXX:LINE-DRV  	BIDIR
9			A6					74ASXX:LINE-DRV  	BIDIR
10			A7  				74ASXX:LINE-DRV  	BIDIR
11			A8  				74ASXX:LINE-DRV  	BIDIR
12			GND 				GND  					NA
13			Q8  				74ASXX:GATE			IN
14			B8  				74ASXX:LINE-DRV  	BIDIR
15			B7  				74ASXX:LINE-DRV  	BIDIR
16			B6  				74ASXX:LINE-DRV  	BIDIR
17			B5  				74ASXX:LINE-DRV  	BIDIR
18			B4  				74ASXX:LINE-DRV  	BIDIR
19			B3  				74ASXX:LINE-DRV  	BIDIR
20			B2  				74ASXX:LINE-DRV  	BIDIR
21			B1  				74ASXX:LINE-DRV  	BIDIR
22			SERIN  			74ASXX:GATE			IN
23			CLK 				74ASXX:GATE			IN
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS856_DIP
[Model File]		PML.MOD
[Package Model]    DIP24
|
[Pin]		signal_name 	model_name  		direction
|
1			OEB- 				74ASXX:GATE			IN
2			OEA- 				74ASXX:GATE			IN
3			MODE 				74ASXX:GATE			IN
4			A1					74ASXX:LINE-DRV  	BIDIR
5			A2					74ASXX:LINE-DRV  	BIDIR
6			A3					74ASXX:LINE-DRV  	BIDIR
7			A4					74ASXX:LINE-DRV  	BIDIR
8			A5					74ASXX:LINE-DRV  	BIDIR
9			A6					74ASXX:LINE-DRV  	BIDIR
10			A7  				74ASXX:LINE-DRV  	BIDIR
11			A8  				74ASXX:LINE-DRV  	BIDIR
12			GND 				GND  					NA
13			Q8  				74ASXX:GATE			OUT
14			B8  				74ASXX:LINE-DRV  	BIDIR
15			B7  				74ASXX:LINE-DRV  	BIDIR
16			B6  				74ASXX:LINE-DRV  	BIDIR
17			B5  				74ASXX:LINE-DRV  	BIDIR
18			B4  				74ASXX:LINE-DRV  	BIDIR
19			B3  				74ASXX:LINE-DRV  	BIDIR
20			B2  				74ASXX:LINE-DRV  	BIDIR
21			B1  				74ASXX:LINE-DRV  	BIDIR
22			SERIN  			74ASXX:GATE			IN
23			CLK 				74ASXX:GATE			IN
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS856_SOIC
[Model File]		PML.MOD
[Package Model]    SOIC24
|
[Pin]		signal_name 	model_name  		direction
|
1			OEB- 				74ASXX:GATE			IN
2			OEA- 				74ASXX:GATE			IN
3			MODE 				74ASXX:GATE			IN
4			A1					74ASXX:LINE-DRV  	BIDIR
5			A2					74ASXX:LINE-DRV  	BIDIR
6			A3					74ASXX:LINE-DRV  	BIDIR
7			A4					74ASXX:LINE-DRV  	BIDIR
8			A5					74ASXX:LINE-DRV  	BIDIR
9			A6					74ASXX:LINE-DRV  	BIDIR
10			A7  				74ASXX:LINE-DRV  	BIDIR
11			A8  				74ASXX:LINE-DRV  	BIDIR
12			GND 				GND  					NA
13			Q8  				74ASXX:GATE			OUT
14			B8  				74ASXX:LINE-DRV  	BIDIR
15			B7  				74ASXX:LINE-DRV  	BIDIR
16			B6  				74ASXX:LINE-DRV  	BIDIR
17			B5  				74ASXX:LINE-DRV  	BIDIR
18			B4  				74ASXX:LINE-DRV  	BIDIR
19			B3  				74ASXX:LINE-DRV  	BIDIR
20			B2  				74ASXX:LINE-DRV  	BIDIR
21			B1  				74ASXX:LINE-DRV  	BIDIR
22			SERIN  			74ASXX:GATE			IN
23			CLK 				74ASXX:GATE			IN
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS856_SSOP
[Model File]		PML.MOD
[Package Model]    SSOP24
|
[Pin]		signal_name 	model_name  		direction
|
1			OEB- 				74ASXX:GATE			IN
2			OEA- 				74ASXX:GATE			IN
3			MODE 				74ASXX:GATE			IN
4			A1					74ASXX:LINE-DRV  	BIDIR
5			A2					74ASXX:LINE-DRV  	BIDIR
6			A3					74ASXX:LINE-DRV  	BIDIR
7			A4					74ASXX:LINE-DRV  	BIDIR
8			A5					74ASXX:LINE-DRV  	BIDIR
9			A6					74ASXX:LINE-DRV  	BIDIR
10			A7  				74ASXX:LINE-DRV  	BIDIR
11			A8  				74ASXX:LINE-DRV  	BIDIR
12			GND 				GND  					NA
13			Q8  				74ASXX:GATE			OUT
14			B8  				74ASXX:LINE-DRV  	BIDIR
15			B7  				74ASXX:LINE-DRV  	BIDIR
16			B6  				74ASXX:LINE-DRV  	BIDIR
17			B5  				74ASXX:LINE-DRV  	BIDIR
18			B4  				74ASXX:LINE-DRV  	BIDIR
19			B3  				74ASXX:LINE-DRV  	BIDIR
20			B2  				74ASXX:LINE-DRV  	BIDIR
21			B1  				74ASXX:LINE-DRV  	BIDIR
22			SERIN  			74ASXX:GATE			IN
23			CLK 				74ASXX:GATE			IN
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS856_TSSOP
[Model File]		PML.MOD
[Package Model]    TSSOP24
|
[Pin]		signal_name 	model_name  		direction
|
1			OEB- 				74ASXX:GATE			IN
2			OEA- 				74ASXX:GATE			IN
3			MODE 				74ASXX:GATE			IN
4			A1					74ASXX:LINE-DRV  	BIDIR
5			A2					74ASXX:LINE-DRV  	BIDIR
6			A3					74ASXX:LINE-DRV  	BIDIR
7			A4					74ASXX:LINE-DRV  	BIDIR
8			A5					74ASXX:LINE-DRV  	BIDIR
9			A6					74ASXX:LINE-DRV  	BIDIR
10			A7  				74ASXX:LINE-DRV  	BIDIR
11			A8  				74ASXX:LINE-DRV  	BIDIR
12			GND 				GND  					NA
13			Q8  				74ASXX:GATE			OUT
14			B8  				74ASXX:LINE-DRV  	BIDIR
15			B7  				74ASXX:LINE-DRV  	BIDIR
16			B6  				74ASXX:LINE-DRV  	BIDIR
17			B5  				74ASXX:LINE-DRV  	BIDIR
18			B4  				74ASXX:LINE-DRV  	BIDIR
19			B3  				74ASXX:LINE-DRV  	BIDIR
20			B2  				74ASXX:LINE-DRV  	BIDIR
21			B1  				74ASXX:LINE-DRV  	BIDIR
22			SERIN  			74ASXX:GATE			IN
23			CLK 				74ASXX:GATE			IN
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS867_DIP
[Model File]		PML.MOD
[Package Model]    DIP24
|
[Pin]		signal_name 	model_name  		direction
|
1			S0					74ASXX:GATE			IN
2			S1					74ASXX:GATE			IN
3			A 					74ASXX:GATE			IN
4			B 					74ASXX:GATE			IN
5			C 					74ASXX:GATE			IN
6			D 					74ASXX:GATE			IN
7			E 					74ASXX:GATE			IN
8			F 					74ASXX:GATE			IN
9			G 					74ASXX:GATE			IN
10			H					74ASXX:GATE			IN
11			ENT-				74ASXX:GATE			IN
12			GND 				GND  					NA
13			RCO-				74ASXX:GATE			OUT
14			CLK 				74ASXX:GATE			IN
15			QH  				74ASXX:GATE			OUT
16			QG  				74ASXX:GATE			OUT
17			QF  				74ASXX:GATE			OUT
18			QE  				74ASXX:GATE			OUT
19			QD  				74ASXX:GATE			OUT
20			QC  				74ASXX:GATE			OUT
21			QGB 				74ASXX:GATE			OUT
22			QA  				74ASXX:GATE			OUT
23			ENP-				74ASXX:GATE			IN
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS867_SOIC
[Model File]		PML.MOD
[Package Model]    SOIC24
|
[Pin]		signal_name 	model_name  		direction
|
1			S0					74ASXX:GATE			IN
2			S1					74ASXX:GATE			IN
3			A 					74ASXX:GATE			IN
4			B 					74ASXX:GATE			IN
5			C 					74ASXX:GATE			IN
6			D 					74ASXX:GATE			IN
7			E 					74ASXX:GATE			IN
8			F 					74ASXX:GATE			IN
9			G 					74ASXX:GATE			IN
10			H					74ASXX:GATE			IN
11			ENT-				74ASXX:GATE			IN
12			GND 				GND  					NA
13			RCO-				74ASXX:GATE			OUT
14			CLK 				74ASXX:GATE			IN
15			QH  				74ASXX:GATE			OUT
16			QG  				74ASXX:GATE			OUT
17			QF  				74ASXX:GATE			OUT
18			QE  				74ASXX:GATE			OUT
19			QD  				74ASXX:GATE			OUT
20			QC  				74ASXX:GATE			OUT
21			QGB 				74ASXX:GATE			OUT
22			QA  				74ASXX:GATE			OUT
23			ENP-				74ASXX:GATE			IN
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS867_SSOP
[Model File]		PML.MOD
[Package Model]    SSOP24
|
[Pin]		signal_name 	model_name  		direction
|
1			S0					74ASXX:GATE			IN
2			S1					74ASXX:GATE			IN
3			A 					74ASXX:GATE			IN
4			B 					74ASXX:GATE			IN
5			C 					74ASXX:GATE			IN
6			D 					74ASXX:GATE			IN
7			E 					74ASXX:GATE			IN
8			F 					74ASXX:GATE			IN
9			G 					74ASXX:GATE			IN
10			H					74ASXX:GATE			IN
11			ENT-				74ASXX:GATE			IN
12			GND 				GND  					NA
13			RCO-				74ASXX:GATE			OUT
14			CLK 				74ASXX:GATE			IN
15			QH  				74ASXX:GATE			OUT
16			QG  				74ASXX:GATE			OUT
17			QF  				74ASXX:GATE			OUT
18			QE  				74ASXX:GATE			OUT
19			QD  				74ASXX:GATE			OUT
20			QC  				74ASXX:GATE			OUT
21			QGB 				74ASXX:GATE			OUT
22			QA  				74ASXX:GATE			OUT
23			ENP-				74ASXX:GATE			IN
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS867_TSSOP
[Model File]		PML.MOD
[Package Model]    TSSOP24
|
[Pin]		signal_name 	model_name  		direction
|
1			S0					74ASXX:GATE			IN
2			S1					74ASXX:GATE			IN
3			A 					74ASXX:GATE			IN
4			B 					74ASXX:GATE			IN
5			C 					74ASXX:GATE			IN
6			D 					74ASXX:GATE			IN
7			E 					74ASXX:GATE			IN
8			F 					74ASXX:GATE			IN
9			G 					74ASXX:GATE			IN
10			H					74ASXX:GATE			IN
11			ENT-				74ASXX:GATE			IN
12			GND 				GND  					NA
13			RCO-				74ASXX:GATE			OUT
14			CLK 				74ASXX:GATE			IN
15			QH  				74ASXX:GATE			OUT
16			QG  				74ASXX:GATE			OUT
17			QF  				74ASXX:GATE			OUT
18			QE  				74ASXX:GATE			OUT
19			QD  				74ASXX:GATE			OUT
20			QC  				74ASXX:GATE			OUT
21			QGB 				74ASXX:GATE			OUT
22			QA  				74ASXX:GATE			OUT
23			ENP-				74ASXX:GATE			IN
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS869_DIP
[Model File]		PML.MOD
[Package Model]    DIP24
|
[Pin]		signal_name 	model_name  		direction
|
1			S0					74ASXX:GATE			IN
2			S1					74ASXX:GATE			IN
3			A 					74ASXX:GATE			IN
4			B 					74ASXX:GATE			IN
5			C 					74ASXX:GATE			IN
6			D 					74ASXX:GATE			IN
7			E 					74ASXX:GATE			IN
8			F 					74ASXX:GATE			IN
9			G 					74ASXX:GATE			IN
10			H					74ASXX:GATE			IN
11			ENT-				74ASXX:GATE			IN
12			GND 				GND  					NA
13			RCO-				74ASXX:GATE			OUT
14			CLK 				74ASXX:GATE			IN
15			QH  				74ASXX:GATE			OUT
16			QG  				74ASXX:GATE			OUT
17			QF  				74ASXX:GATE			OUT
18			QE  				74ASXX:GATE			OUT
19			QD  				74ASXX:GATE			OUT
20			QC  				74ASXX:GATE			OUT
21			QGB 				74ASXX:GATE			OUT
22			QA  				74ASXX:GATE			OUT
23			ENP-				74ASXX:GATE			IN
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS869_SOIC
[Model File]		PML.MOD
[Package Model]    SOIC24
|
[Pin]		signal_name 	model_name  		direction
|
1			S0					74ASXX:GATE			IN
2			S1					74ASXX:GATE			IN
3			A 					74ASXX:GATE			IN
4			B 					74ASXX:GATE			IN
5			C 					74ASXX:GATE			IN
6			D 					74ASXX:GATE			IN
7			E 					74ASXX:GATE			IN
8			F 					74ASXX:GATE			IN
9			G 					74ASXX:GATE			IN
10			H					74ASXX:GATE			IN
11			ENT-				74ASXX:GATE			IN
12			GND 				GND  					NA
13			RCO-				74ASXX:GATE			OUT
14			CLK 				74ASXX:GATE			IN
15			QH  				74ASXX:GATE			OUT
16			QG  				74ASXX:GATE			OUT
17			QF  				74ASXX:GATE			OUT
18			QE  				74ASXX:GATE			OUT
19			QD  				74ASXX:GATE			OUT
20			QC  				74ASXX:GATE			OUT
21			QGB 				74ASXX:GATE			OUT
22			QA  				74ASXX:GATE			OUT
23			ENP-				74ASXX:GATE			IN
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS869_SSOP
[Model File]		PML.MOD
[Package Model]    SSOP24
|
[Pin]		signal_name 	model_name  		direction
|
1			S0					74ASXX:GATE			IN
2			S1					74ASXX:GATE			IN
3			A 					74ASXX:GATE			IN
4			B 					74ASXX:GATE			IN
5			C 					74ASXX:GATE			IN
6			D 					74ASXX:GATE			IN
7			E 					74ASXX:GATE			IN
8			F 					74ASXX:GATE			IN
9			G 					74ASXX:GATE			IN
10			H					74ASXX:GATE			IN
11			ENT-				74ASXX:GATE			IN
12			GND 				GND  					NA
13			RCO-				74ASXX:GATE			OUT
14			CLK 				74ASXX:GATE			IN
15			QH  				74ASXX:GATE			OUT
16			QG  				74ASXX:GATE			OUT
17			QF  				74ASXX:GATE			OUT
18			QE  				74ASXX:GATE			OUT
19			QD  				74ASXX:GATE			OUT
20			QC  				74ASXX:GATE			OUT
21			QGB 				74ASXX:GATE			OUT
22			QA  				74ASXX:GATE			OUT
23			ENP-				74ASXX:GATE			IN
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS869_TSSOP
[Model File]		PML.MOD
[Package Model]    TSSOP24
|
[Pin]		signal_name 	model_name  		direction
|
1			S0					74ASXX:GATE			IN
2			S1					74ASXX:GATE			IN
3			A 					74ASXX:GATE			IN
4			B 					74ASXX:GATE			IN
5			C 					74ASXX:GATE			IN
6			D 					74ASXX:GATE			IN
7			E 					74ASXX:GATE			IN
8			F 					74ASXX:GATE			IN
9			G 					74ASXX:GATE			IN
10			H					74ASXX:GATE			IN
11			ENT-				74ASXX:GATE			IN
12			GND 				GND  					NA
13			RCO-				74ASXX:GATE			OUT
14			CLK 				74ASXX:GATE			IN
15			QH  				74ASXX:GATE			OUT
16			QG  				74ASXX:GATE			OUT
17			QF  				74ASXX:GATE			OUT
18			QE  				74ASXX:GATE			OUT
19			QD  				74ASXX:GATE			OUT
20			QC  				74ASXX:GATE			OUT
21			QGB 				74ASXX:GATE			OUT
22			QA  				74ASXX:GATE			OUT
23			ENP-				74ASXX:GATE			IN
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS870_DIP
[Model File]		PML.MOD
[Package Model]    DIP28
|
[Pin]		signal_name 	model_name  		direction
|
1			DA1  				74ASXX:GATE			IN
2			DA2  				74ASXX:GATE			IN
3			S0					74ASXX:GATE			IN
4			1A0  				74ASXX:GATE			IN
5			1A1  				74ASXX:GATE			IN
6			1A2  				74ASXX:GATE			IN
7			1A3  				74ASXX:GATE			IN
8			W1-  				74ASXX:GATE			IN
9			S2					74ASXX:GATE			IN
10			QA1 				74ASXX:LINE-DRV  	OUT
11			QA2 				74ASXX:LINE-DRV  	OUT
12			QA3 				74ASXX:LINE-DRV  	OUT
13			QA4 				74ASXX:LINE-DRV  	OUT
14			GND 				GND  					NA
15			DQB1				74ASXX:LINE-DRV  	BIDIR
16			DQB2				74ASXX:LINE-DRV  	BIDIR
17			DQB3				74ASXX:LINE-DRV  	BIDIR
18			DQB4				74ASXX:LINE-DRV  	BIDIR
19			S3  				74ASXX:GATE			IN
20			W2- 				74ASXX:GATE			IN
21			2A0 				74ASXX:GATE			IN
22			2A1 				74ASXX:GATE			IN
23			2A2 				74ASXX:GATE			IN
24			2A3 				74ASXX:GATE			IN
25			S1  				74ASXX:GATE			IN
26			DA3 				74ASXX:GATE			IN
27			DA4 				74ASXX:GATE			IN
28			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS870_SOIC
[Model File]		PML.MOD
[Package Model]    SOIC28
|
[Pin]		signal_name 	model_name  		direction
|
1			DA1  				74ASXX:GATE			IN
2			DA2  				74ASXX:GATE			IN
3			S0					74ASXX:GATE			IN
4			1A0  				74ASXX:GATE			IN
5			1A1  				74ASXX:GATE			IN
6			1A2  				74ASXX:GATE			IN
7			1A3  				74ASXX:GATE			IN
8			W1-  				74ASXX:GATE			IN
9			S2					74ASXX:GATE			IN
10			QA1 				74ASXX:LINE-DRV  	OUT
11			QA2 				74ASXX:LINE-DRV  	OUT
12			QA3 				74ASXX:LINE-DRV  	OUT
13			QA4 				74ASXX:LINE-DRV  	OUT
14			GND 				GND  					NA
15			DQB1				74ASXX:LINE-DRV  	BIDIR
16			DQB2				74ASXX:LINE-DRV  	BIDIR
17			DQB3				74ASXX:LINE-DRV  	BIDIR
18			DQB4				74ASXX:LINE-DRV  	BIDIR
19			S3  				74ASXX:GATE			IN
20			W2- 				74ASXX:GATE			IN
21			2A0 				74ASXX:GATE			IN
22			2A1 				74ASXX:GATE			IN
23			2A2 				74ASXX:GATE			IN
24			2A3 				74ASXX:GATE			IN
25			S1  				74ASXX:GATE			IN
26			DA3 				74ASXX:GATE			IN
27			DA4 				74ASXX:GATE			IN
28			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS870_SSOP
[Model File]		PML.MOD
[Package Model]    SSOP28
|
[Pin]		signal_name 	model_name  		direction
|
1			DA1  				74ASXX:GATE			IN
2			DA2  				74ASXX:GATE			IN
3			S0					74ASXX:GATE			IN
4			1A0  				74ASXX:GATE			IN
5			1A1  				74ASXX:GATE			IN
6			1A2  				74ASXX:GATE			IN
7			1A3  				74ASXX:GATE			IN
8			W1-  				74ASXX:GATE			IN
9			S2					74ASXX:GATE			IN
10			QA1 				74ASXX:LINE-DRV  	OUT
11			QA2 				74ASXX:LINE-DRV  	OUT
12			QA3 				74ASXX:LINE-DRV  	OUT
13			QA4 				74ASXX:LINE-DRV  	OUT
14			GND 				GND  					NA
15			DQB1				74ASXX:LINE-DRV  	BIDIR
16			DQB2				74ASXX:LINE-DRV  	BIDIR
17			DQB3				74ASXX:LINE-DRV  	BIDIR
18			DQB4				74ASXX:LINE-DRV  	BIDIR
19			S3  				74ASXX:GATE			IN
20			W2- 				74ASXX:GATE			IN
21			2A0 				74ASXX:GATE			IN
22			2A1 				74ASXX:GATE			IN
23			2A2 				74ASXX:GATE			IN
24			2A3 				74ASXX:GATE			IN
25			S1  				74ASXX:GATE			IN
26			DA3 				74ASXX:GATE			IN
27			DA4 				74ASXX:GATE			IN
28			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS871_DIP
[Model File]		PML.MOD
[Package Model]    DIP24
|
[Pin]		signal_name 	model_name  		direction
|
1			S0					74ASXX:GATE			IN
2			1A0  				74ASXX:GATE			IN
3			1A1  				74ASXX:GATE			IN
4			1A2  				74ASXX:GATE			IN
5			1A3  				74ASXX:GATE			IN
6			W1-  				74ASXX:GATE			IN
7			S2					74ASXX:GATE			IN
8			DQA1 				74ASXX:LINE-DRV  	BIDIR
9			DQA2 				74ASXX:LINE-DRV  	BIDIR
10			DQA3				74ASXX:LINE-DRV  	BIDIR
11			DQA4				74ASXX:LINE-DRV  	BIDIR
12			GND 				GND  					NA
13			DQB1				74ASXX:LINE-DRV  	BIDIR
14			DQB2				74ASXX:LINE-DRV  	BIDIR
15			DQB3				74ASXX:LINE-DRV  	BIDIR
16			DQB4				74ASXX:LINE-DRV  	BIDIR
17			S3  				74ASXX:GATE			IN
18			W2- 				74ASXX:GATE			IN
19			2A0 				74ASXX:GATE			IN
20			2A1 				74ASXX:GATE			IN
21			2A2 				74ASXX:GATE			IN
22			2A3 				74ASXX:GATE			IN
23			S1  				74ASXX:GATE			IN
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS871_SOIC
[Model File]		PML.MOD
[Package Model]    SOIC24
|
[Pin]		signal_name 	model_name  		direction
|
1			S0					74ASXX:GATE			IN
2			1A0  				74ASXX:GATE			IN
3			1A1  				74ASXX:GATE			IN
4			1A2  				74ASXX:GATE			IN
5			1A3  				74ASXX:GATE			IN
6			W1-  				74ASXX:GATE			IN
7			S2					74ASXX:GATE			IN
8			DQA1 				74ASXX:LINE-DRV  	BIDIR
9			DQA2 				74ASXX:LINE-DRV  	BIDIR
10			DQA3				74ASXX:LINE-DRV  	BIDIR
11			DQA4				74ASXX:LINE-DRV  	BIDIR
12			GND 				GND  					NA
13			DQB1				74ASXX:LINE-DRV  	BIDIR
14			DQB2				74ASXX:LINE-DRV  	BIDIR
15			DQB3				74ASXX:LINE-DRV  	BIDIR
16			DQB4				74ASXX:LINE-DRV  	BIDIR
17			S3  				74ASXX:GATE			IN
18			W2- 				74ASXX:GATE			IN
19			2A0 				74ASXX:GATE			IN
20			2A1 				74ASXX:GATE			IN
21			2A2 				74ASXX:GATE			IN
22			2A3 				74ASXX:GATE			IN
23			S1  				74ASXX:GATE			IN
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS871_SSOP
[Model File]		PML.MOD
[Package Model]    SSOP24
|
[Pin]		signal_name 	model_name  		direction
|
1			S0					74ASXX:GATE			IN
2			1A0  				74ASXX:GATE			IN
3			1A1  				74ASXX:GATE			IN
4			1A2  				74ASXX:GATE			IN
5			1A3  				74ASXX:GATE			IN
6			W1-  				74ASXX:GATE			IN
7			S2					74ASXX:GATE			IN
8			DQA1 				74ASXX:LINE-DRV  	BIDIR
9			DQA2 				74ASXX:LINE-DRV  	BIDIR
10			DQA3				74ASXX:LINE-DRV  	BIDIR
11			DQA4				74ASXX:LINE-DRV  	BIDIR
12			GND 				GND  					NA
13			DQB1				74ASXX:LINE-DRV  	BIDIR
14			DQB2				74ASXX:LINE-DRV  	BIDIR
15			DQB3				74ASXX:LINE-DRV  	BIDIR
16			DQB4				74ASXX:LINE-DRV  	BIDIR
17			S3  				74ASXX:GATE			IN
18			W2- 				74ASXX:GATE			IN
19			2A0 				74ASXX:GATE			IN
20			2A1 				74ASXX:GATE			IN
21			2A2 				74ASXX:GATE			IN
22			2A3 				74ASXX:GATE			IN
23			S1  				74ASXX:GATE			IN
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS871_TSSOP
[Model File]		PML.MOD
[Package Model]    TSSOP24
|
[Pin]		signal_name 	model_name  		direction
|
1			S0					74ASXX:GATE			IN
2			1A0  				74ASXX:GATE			IN
3			1A1  				74ASXX:GATE			IN
4			1A2  				74ASXX:GATE			IN
5			1A3  				74ASXX:GATE			IN
6			W1-  				74ASXX:GATE			IN
7			S2					74ASXX:GATE			IN
8			DQA1 				74ASXX:LINE-DRV  	BIDIR
9			DQA2 				74ASXX:LINE-DRV  	BIDIR
10			DQA3				74ASXX:LINE-DRV  	BIDIR
11			DQA4				74ASXX:LINE-DRV  	BIDIR
12			GND 				GND  					NA
13			DQB1				74ASXX:LINE-DRV  	BIDIR
14			DQB2				74ASXX:LINE-DRV  	BIDIR
15			DQB3				74ASXX:LINE-DRV  	BIDIR
16			DQB4				74ASXX:LINE-DRV  	BIDIR
17			S3  				74ASXX:GATE			IN
18			W2- 				74ASXX:GATE			IN
19			2A0 				74ASXX:GATE			IN
20			2A1 				74ASXX:GATE			IN
21			2A2 				74ASXX:GATE			IN
22			2A3 				74ASXX:GATE			IN
23			S1  				74ASXX:GATE			IN
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS873_DIP
[Model File]		PML.MOD
[Package Model]    DIP24
|
[Pin]		signal_name 	model_name  		direction
|
1			CLR1-				74ASXX:GATE			IN
2			OC1- 				74ASXX:GATE			IN
3			1D1  				74ASXX:GATE			IN
4			1D2  				74ASXX:GATE			IN
5			1D3  				74ASXX:GATE			IN
6			1D4  				74ASXX:GATE			IN
7			2D1  				74ASXX:GATE			IN
8			2D2  				74ASXX:GATE			IN
9			2D3  				74ASXX:GATE			IN
10			2D4 				74ASXX:GATE			IN
11			OC2-				74ASXX:GATE			IN
12			GND 				GND  					NA
13			CLR2-  			74ASXX:GATE			IN
14			ENABLE_G2 		74ASXX:GATE			IN
15			2Q4 				74ASXX:LINE-DRV  	ENBO
16			2Q3 				74ASXX:LINE-DRV  	ENBO
17			2Q2 				74ASXX:LINE-DRV  	ENBO
18			2Q1 				74ASXX:LINE-DRV  	ENBO
19			1Q4 				74ASXX:LINE-DRV  	ENBO
20			1Q3 				74ASXX:LINE-DRV  	ENBO
21			1Q2 				74ASXX:LINE-DRV  	ENBO
22			1Q1 				74ASXX:LINE-DRV  	ENBO
23			ENABLE_G1 		74ASXX:GATE			IN
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS873_SOIC
[Model File]		PML.MOD
[Package Model]    SOIC24
|
[Pin]		signal_name 	model_name  		direction
|
1			CLR1-				74ASXX:GATE			IN
2			OC1- 				74ASXX:GATE			IN
3			1D1  				74ASXX:GATE			IN
4			1D2  				74ASXX:GATE			IN
5			1D3  				74ASXX:GATE			IN
6			1D4  				74ASXX:GATE			IN
7			2D1  				74ASXX:GATE			IN
8			2D2  				74ASXX:GATE			IN
9			2D3  				74ASXX:GATE			IN
10			2D4 				74ASXX:GATE			IN
11			OC2-				74ASXX:GATE			IN
12			GND 				GND  					NA
13			CLR2-  			74ASXX:GATE			IN
14			ENABLE_G2 		74ASXX:GATE			IN
15			2Q4 				74ASXX:LINE-DRV  	ENBO
16			2Q3 				74ASXX:LINE-DRV  	ENBO
17			2Q2 				74ASXX:LINE-DRV  	ENBO
18			2Q1 				74ASXX:LINE-DRV  	ENBO
19			1Q4 				74ASXX:LINE-DRV  	ENBO
20			1Q3 				74ASXX:LINE-DRV  	ENBO
21			1Q2 				74ASXX:LINE-DRV  	ENBO
22			1Q1 				74ASXX:LINE-DRV  	ENBO
23			ENABLE_G1 		74ASXX:GATE			IN
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS873_SSOP
[Model File]		PML.MOD
[Package Model]    SSOP24
|
[Pin]		signal_name 	model_name  		direction
|
1			CLR1-				74ASXX:GATE			IN
2			OC1- 				74ASXX:GATE			IN
3			1D1  				74ASXX:GATE			IN
4			1D2  				74ASXX:GATE			IN
5			1D3  				74ASXX:GATE			IN
6			1D4  				74ASXX:GATE			IN
7			2D1  				74ASXX:GATE			IN
8			2D2  				74ASXX:GATE			IN
9			2D3  				74ASXX:GATE			IN
10			2D4 				74ASXX:GATE			IN
11			OC2-				74ASXX:GATE			IN
12			GND 				GND  					NA
13			CLR2-  			74ASXX:GATE			IN
14			ENABLE_G2 		74ASXX:GATE			IN
15			2Q4 				74ASXX:LINE-DRV  	ENBO
16			2Q3 				74ASXX:LINE-DRV  	ENBO
17			2Q2 				74ASXX:LINE-DRV  	ENBO
18			2Q1 				74ASXX:LINE-DRV  	ENBO
19			1Q4 				74ASXX:LINE-DRV  	ENBO
20			1Q3 				74ASXX:LINE-DRV  	ENBO
21			1Q2 				74ASXX:LINE-DRV  	ENBO
22			1Q1 				74ASXX:LINE-DRV  	ENBO
23			ENABLE_G1 		74ASXX:GATE			IN
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS873_TSSOP
[Model File]		PML.MOD
[Package Model]    TSSOP24
|
[Pin]		signal_name 	model_name  		direction
|
1			CLR1-				74ASXX:GATE			IN
2			OC1- 				74ASXX:GATE			IN
3			1D1  				74ASXX:GATE			IN
4			1D2  				74ASXX:GATE			IN
5			1D3  				74ASXX:GATE			IN
6			1D4  				74ASXX:GATE			IN
7			2D1  				74ASXX:GATE			IN
8			2D2  				74ASXX:GATE			IN
9			2D3  				74ASXX:GATE			IN
10			2D4 				74ASXX:GATE			IN
11			OC2-				74ASXX:GATE			IN
12			GND 				GND  					NA
13			CLR2-  			74ASXX:GATE			IN
14			ENABLE_G2 		74ASXX:GATE			IN
15			2Q4 				74ASXX:LINE-DRV  	ENBO
16			2Q3 				74ASXX:LINE-DRV  	ENBO
17			2Q2 				74ASXX:LINE-DRV  	ENBO
18			2Q1 				74ASXX:LINE-DRV  	ENBO
19			1Q4 				74ASXX:LINE-DRV  	ENBO
20			1Q3 				74ASXX:LINE-DRV  	ENBO
21			1Q2 				74ASXX:LINE-DRV  	ENBO
22			1Q1 				74ASXX:LINE-DRV  	ENBO
23			ENABLE_G1 		74ASXX:GATE			IN
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS874_DIP
[Model File]		PML.MOD
[Package Model]    DIP24
|
[Pin]		signal_name 	model_name  		direction
|
1			CLR1-				74ASXX:GATE			IN
2			OC1- 				74ASXX:GATE			IN
3			1D1  				74ASXX:GATE			IN
4			1D2  				74ASXX:GATE			IN
5			1D3  				74ASXX:GATE			IN
6			1D4  				74ASXX:GATE			IN
7			2D1  				74ASXX:GATE			IN
8			2D2  				74ASXX:GATE			IN
9			2D3  				74ASXX:GATE			IN
10			2D4 				74ASXX:GATE			IN
11			OC2-				74ASXX:GATE			IN
12			GND 				GND  					NA
13			CLR2-  			74ASXX:GATE			IN
14			CLK2				74ASXX:GATE			IN
15			2Q4 				74ASXX:LINE-DRV  	ENBO
16			2Q3 				74ASXX:LINE-DRV  	ENBO
17			2Q2 				74ASXX:LINE-DRV  	ENBO
18			2Q1 				74ASXX:LINE-DRV  	ENBO
19			1Q4 				74ASXX:LINE-DRV  	ENBO
20			1Q3 				74ASXX:LINE-DRV  	ENBO
21			1Q2 				74ASXX:LINE-DRV  	ENBO
22			1Q1 				74ASXX:LINE-DRV  	ENBO
23			CLK1				74ASXX:GATE			IN
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS874_SOIC
[Model File]		PML.MOD
[Package Model]    SOIC24
|
[Pin]		signal_name 	model_name  		direction
|
1			CLR1-				74ASXX:GATE			IN
2			OC1- 				74ASXX:GATE			IN
3			1D1  				74ASXX:GATE			IN
4			1D2  				74ASXX:GATE			IN
5			1D3  				74ASXX:GATE			IN
6			1D4  				74ASXX:GATE			IN
7			2D1  				74ASXX:GATE			IN
8			2D2  				74ASXX:GATE			IN
9			2D3  				74ASXX:GATE			IN
10			2D4 				74ASXX:GATE			IN
11			OC2-				74ASXX:GATE			IN
12			GND 				GND  					NA
13			CLR2-  			74ASXX:GATE			IN
14			CLK2				74ASXX:GATE			IN
15			2Q4 				74ASXX:LINE-DRV  	ENBO
16			2Q3 				74ASXX:LINE-DRV  	ENBO
17			2Q2 				74ASXX:LINE-DRV  	ENBO
18			2Q1 				74ASXX:LINE-DRV  	ENBO
19			1Q4 				74ASXX:LINE-DRV  	ENBO
20			1Q3 				74ASXX:LINE-DRV  	ENBO
21			1Q2 				74ASXX:LINE-DRV  	ENBO
22			1Q1 				74ASXX:LINE-DRV  	ENBO
23			CLK1				74ASXX:GATE			IN
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS874_SSOP
[Model File]		PML.MOD
[Package Model]    SSOP24
|
[Pin]		signal_name 	model_name  		direction
|
1			CLR1-				74ASXX:GATE			IN
2			OC1- 				74ASXX:GATE			IN
3			1D1  				74ASXX:GATE			IN
4			1D2  				74ASXX:GATE			IN
5			1D3  				74ASXX:GATE			IN
6			1D4  				74ASXX:GATE			IN
7			2D1  				74ASXX:GATE			IN
8			2D2  				74ASXX:GATE			IN
9			2D3  				74ASXX:GATE			IN
10			2D4 				74ASXX:GATE			IN
11			OC2-				74ASXX:GATE			IN
12			GND 				GND  					NA
13			CLR2-  			74ASXX:GATE			IN
14			CLK2				74ASXX:GATE			IN
15			2Q4 				74ASXX:LINE-DRV  	ENBO
16			2Q3 				74ASXX:LINE-DRV  	ENBO
17			2Q2 				74ASXX:LINE-DRV  	ENBO
18			2Q1 				74ASXX:LINE-DRV  	ENBO
19			1Q4 				74ASXX:LINE-DRV  	ENBO
20			1Q3 				74ASXX:LINE-DRV  	ENBO
21			1Q2 				74ASXX:LINE-DRV  	ENBO
22			1Q1 				74ASXX:LINE-DRV  	ENBO
23			CLK1				74ASXX:GATE			IN
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS874_TSSOP
[Model File]		PML.MOD
[Package Model]    TSSOP24
|
[Pin]		signal_name 	model_name  		direction
|
1			CLR1-				74ASXX:GATE			IN
2			OC1- 				74ASXX:GATE			IN
3			1D1  				74ASXX:GATE			IN
4			1D2  				74ASXX:GATE			IN
5			1D3  				74ASXX:GATE			IN
6			1D4  				74ASXX:GATE			IN
7			2D1  				74ASXX:GATE			IN
8			2D2  				74ASXX:GATE			IN
9			2D3  				74ASXX:GATE			IN
10			2D4 				74ASXX:GATE			IN
11			OC2-				74ASXX:GATE			IN
12			GND 				GND  					NA
13			CLR2-  			74ASXX:GATE			IN
14			CLK2				74ASXX:GATE			IN
15			2Q4 				74ASXX:LINE-DRV  	ENBO
16			2Q3 				74ASXX:LINE-DRV  	ENBO
17			2Q2 				74ASXX:LINE-DRV  	ENBO
18			2Q1 				74ASXX:LINE-DRV  	ENBO
19			1Q4 				74ASXX:LINE-DRV  	ENBO
20			1Q3 				74ASXX:LINE-DRV  	ENBO
21			1Q2 				74ASXX:LINE-DRV  	ENBO
22			1Q1 				74ASXX:LINE-DRV  	ENBO
23			CLK1				74ASXX:GATE			IN
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS876_DIP
[Model File]		PML.MOD
[Package Model]    DIP24
|
[Pin]		signal_name 	model_name  		direction
|
1			PRE1-				74ASXX:GATE			IN
2			OC1- 				74ASXX:GATE			IN
3			1D1  				74ASXX:GATE			IN
4			1D2  				74ASXX:GATE			IN
5			1D3  				74ASXX:GATE			IN
6			1D4  				74ASXX:GATE			IN
7			2D1  				74ASXX:GATE			IN
8			2D2  				74ASXX:GATE			IN
9			2D3  				74ASXX:GATE			IN
10			2D4 				74ASXX:GATE			IN
11			OC2-				74ASXX:GATE			IN
12			GND 				GND  					NA
13			PRE2-  			74ASXX:GATE			IN
14			CLK2				74ASXX:GATE			IN
15			2Q4-				74ASXX:LINE-DRV  	ENBO
16			2Q3-				74ASXX:LINE-DRV  	ENBO
17			2Q2-				74ASXX:LINE-DRV  	ENBO
18			2Q1-				74ASXX:LINE-DRV  	ENBO
19			1Q4-				74ASXX:LINE-DRV  	ENBO
20			1Q3-				74ASXX:LINE-DRV  	ENBO
21			1Q2-				74ASXX:LINE-DRV  	ENBO
22			1Q1-				74ASXX:LINE-DRV  	ENBO
23			CLK1				74ASXX:GATE			IN
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS876_SOIC
[Model File]		PML.MOD
[Package Model]    SOIC24
|
[Pin]		signal_name 	model_name  		direction
|
1			PRE1-				74ASXX:GATE			IN
2			OC1- 				74ASXX:GATE			IN
3			1D1  				74ASXX:GATE			IN
4			1D2  				74ASXX:GATE			IN
5			1D3  				74ASXX:GATE			IN
6			1D4  				74ASXX:GATE			IN
7			2D1  				74ASXX:GATE			IN
8			2D2  				74ASXX:GATE			IN
9			2D3  				74ASXX:GATE			IN
10			2D4 				74ASXX:GATE			IN
11			OC2-				74ASXX:GATE			IN
12			GND 				GND  					NA
13			PRE2-  			74ASXX:GATE			IN
14			CLK2				74ASXX:GATE			IN
15			2Q4-				74ASXX:LINE-DRV  	ENBO
16			2Q3-				74ASXX:LINE-DRV  	ENBO
17			2Q2-				74ASXX:LINE-DRV  	ENBO
18			2Q1-				74ASXX:LINE-DRV  	ENBO
19			1Q4-				74ASXX:LINE-DRV  	ENBO
20			1Q3-				74ASXX:LINE-DRV  	ENBO
21			1Q2-				74ASXX:LINE-DRV  	ENBO
22			1Q1-				74ASXX:LINE-DRV  	ENBO
23			CLK1				74ASXX:GATE			IN
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS876_SSOP
[Model File]		PML.MOD
[Package Model]    SSOP24
|
[Pin]		signal_name 	model_name  		direction
|
1			PRE1-				74ASXX:GATE			IN
2			OC1- 				74ASXX:GATE			IN
3			1D1  				74ASXX:GATE			IN
4			1D2  				74ASXX:GATE			IN
5			1D3  				74ASXX:GATE			IN
6			1D4  				74ASXX:GATE			IN
7			2D1  				74ASXX:GATE			IN
8			2D2  				74ASXX:GATE			IN
9			2D3  				74ASXX:GATE			IN
10			2D4 				74ASXX:GATE			IN
11			OC2-				74ASXX:GATE			IN
12			GND 				GND  					NA
13			PRE2-  			74ASXX:GATE			IN
14			CLK2				74ASXX:GATE			IN
15			2Q4-				74ASXX:LINE-DRV  	ENBO
16			2Q3-				74ASXX:LINE-DRV  	ENBO
17			2Q2-				74ASXX:LINE-DRV  	ENBO
18			2Q1-				74ASXX:LINE-DRV  	ENBO
19			1Q4-				74ASXX:LINE-DRV  	ENBO
20			1Q3-				74ASXX:LINE-DRV  	ENBO
21			1Q2-				74ASXX:LINE-DRV  	ENBO
22			1Q1-				74ASXX:LINE-DRV  	ENBO
23			CLK1				74ASXX:GATE			IN
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS876_TSSOP
[Model File]		PML.MOD
[Package Model]    TSSOP24
|
[Pin]		signal_name 	model_name  		direction
|
1			PRE1-				74ASXX:GATE			IN
2			OC1- 				74ASXX:GATE			IN
3			1D1  				74ASXX:GATE			IN
4			1D2  				74ASXX:GATE			IN
5			1D3  				74ASXX:GATE			IN
6			1D4  				74ASXX:GATE			IN
7			2D1  				74ASXX:GATE			IN
8			2D2  				74ASXX:GATE			IN
9			2D3  				74ASXX:GATE			IN
10			2D4 				74ASXX:GATE			IN
11			OC2-				74ASXX:GATE			IN
12			GND 				GND  					NA
13			PRE2-  			74ASXX:GATE			IN
14			CLK2				74ASXX:GATE			IN
15			2Q4-				74ASXX:LINE-DRV  	ENBO
16			2Q3-				74ASXX:LINE-DRV  	ENBO
17			2Q2-				74ASXX:LINE-DRV  	ENBO
18			2Q1-				74ASXX:LINE-DRV  	ENBO
19			1Q4-				74ASXX:LINE-DRV  	ENBO
20			1Q3-				74ASXX:LINE-DRV  	ENBO
21			1Q2-				74ASXX:LINE-DRV  	ENBO
22			1Q1-				74ASXX:LINE-DRV  	ENBO
23			CLK1				74ASXX:GATE			IN
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS877_DIP
[Model File]		PML.MOD
[Package Model]    DIP24
|
[Pin]		signal_name 	model_name  		direction
|
1			S0					74ASXX:GATE			IN
2			S1					74ASXX:GATE			IN
3			S2					74ASXX:GATE			IN
4			A1					74ASXX:LINE-DRV  	BIDIR
5			A2					74ASXX:LINE-DRV  	BIDIR
6			A3					74ASXX:LINE-DRV  	BIDIR
7			A4					74ASXX:LINE-DRV  	BIDIR
8			A5					74ASXX:LINE-DRV  	BIDIR
9			A6					74ASXX:LINE-DRV  	BIDIR
10			A7  				74ASXX:LINE-DRV  	BIDIR
11			A8  				74ASXX:LINE-DRV  	BIDIR
12			GND 				GND  					NA
13			Q8  				74ASXX:GATE			OUT
14			B8  				74ASXX:LINE-DRV  	BIDIR
15			B7  				74ASXX:LINE-DRV  	BIDIR
16			B6  				74ASXX:LINE-DRV  	BIDIR
17			B5  				74ASXX:LINE-DRV  	BIDIR
18			B4  				74ASXX:LINE-DRV  	BIDIR
19			B3  				74ASXX:LINE-DRV  	BIDIR
20			B2  				74ASXX:LINE-DRV  	BIDIR
21			B1  				74ASXX:LINE-DRV  	BIDIR
22			SERIN  			74ASXX:GATE			IN
23			CLK 				74ASXX:GATE			IN
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS877_SOIC
[Model File]		PML.MOD
[Package Model]    SOIC24
|
[Pin]		signal_name 	model_name  		direction
|
1			S0					74ASXX:GATE			IN
2			S1					74ASXX:GATE			IN
3			S2					74ASXX:GATE			IN
4			A1					74ASXX:LINE-DRV  	BIDIR
5			A2					74ASXX:LINE-DRV  	BIDIR
6			A3					74ASXX:LINE-DRV  	BIDIR
7			A4					74ASXX:LINE-DRV  	BIDIR
8			A5					74ASXX:LINE-DRV  	BIDIR
9			A6					74ASXX:LINE-DRV  	BIDIR
10			A7  				74ASXX:LINE-DRV  	BIDIR
11			A8  				74ASXX:LINE-DRV  	BIDIR
12			GND 				GND  					NA
13			Q8  				74ASXX:GATE			OUT
14			B8  				74ASXX:LINE-DRV  	BIDIR
15			B7  				74ASXX:LINE-DRV  	BIDIR
16			B6  				74ASXX:LINE-DRV  	BIDIR
17			B5  				74ASXX:LINE-DRV  	BIDIR
18			B4  				74ASXX:LINE-DRV  	BIDIR
19			B3  				74ASXX:LINE-DRV  	BIDIR
20			B2  				74ASXX:LINE-DRV  	BIDIR
21			B1  				74ASXX:LINE-DRV  	BIDIR
22			SERIN  			74ASXX:GATE			IN
23			CLK 				74ASXX:GATE			IN
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS877_SSOP
[Model File]		PML.MOD
[Package Model]    SSOP24
|
[Pin]		signal_name 	model_name  		direction
|
1			S0					74ASXX:GATE			IN
2			S1					74ASXX:GATE			IN
3			S2					74ASXX:GATE			IN
4			A1					74ASXX:LINE-DRV  	BIDIR
5			A2					74ASXX:LINE-DRV  	BIDIR
6			A3					74ASXX:LINE-DRV  	BIDIR
7			A4					74ASXX:LINE-DRV  	BIDIR
8			A5					74ASXX:LINE-DRV  	BIDIR
9			A6					74ASXX:LINE-DRV  	BIDIR
10			A7  				74ASXX:LINE-DRV  	BIDIR
11			A8  				74ASXX:LINE-DRV  	BIDIR
12			GND 				GND  					NA
13			Q8  				74ASXX:GATE			OUT
14			B8  				74ASXX:LINE-DRV  	BIDIR
15			B7  				74ASXX:LINE-DRV  	BIDIR
16			B6  				74ASXX:LINE-DRV  	BIDIR
17			B5  				74ASXX:LINE-DRV  	BIDIR
18			B4  				74ASXX:LINE-DRV  	BIDIR
19			B3  				74ASXX:LINE-DRV  	BIDIR
20			B2  				74ASXX:LINE-DRV  	BIDIR
21			B1  				74ASXX:LINE-DRV  	BIDIR
22			SERIN  			74ASXX:GATE			IN
23			CLK 				74ASXX:GATE			IN
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS877_TSSOP
[Model File]		PML.MOD
[Package Model]    TSSOP24
|
[Pin]		signal_name 	model_name  		direction
|
1			S0					74ASXX:GATE			IN
2			S1					74ASXX:GATE			IN
3			S2					74ASXX:GATE			IN
4			A1					74ASXX:LINE-DRV  	BIDIR
5			A2					74ASXX:LINE-DRV  	BIDIR
6			A3					74ASXX:LINE-DRV  	BIDIR
7			A4					74ASXX:LINE-DRV  	BIDIR
8			A5					74ASXX:LINE-DRV  	BIDIR
9			A6					74ASXX:LINE-DRV  	BIDIR
10			A7  				74ASXX:LINE-DRV  	BIDIR
11			A8  				74ASXX:LINE-DRV  	BIDIR
12			GND 				GND  					NA
13			Q8  				74ASXX:GATE			OUT
14			B8  				74ASXX:LINE-DRV  	BIDIR
15			B7  				74ASXX:LINE-DRV  	BIDIR
16			B6  				74ASXX:LINE-DRV  	BIDIR
17			B5  				74ASXX:LINE-DRV  	BIDIR
18			B4  				74ASXX:LINE-DRV  	BIDIR
19			B3  				74ASXX:LINE-DRV  	BIDIR
20			B2  				74ASXX:LINE-DRV  	BIDIR
21			B1  				74ASXX:LINE-DRV  	BIDIR
22			SERIN  			74ASXX:GATE			IN
23			CLK 				74ASXX:GATE			IN
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS878_DIP
[Model File]		PML.MOD
[Package Model]    DIP24
|
[Pin]		signal_name 	model_name  		direction
|
1			CLR1-				74ASXX:GATE			IN
2			OE1- 				74ASXX:GATE			IN
3			1D1  				74ASXX:GATE			IN
4			1D2  				74ASXX:GATE			IN
5			1D3  				74ASXX:GATE			IN
6			1D4  				74ASXX:GATE			IN
7			2D1  				74ASXX:GATE			IN
8			2D2  				74ASXX:GATE			IN
9			2D3  				74ASXX:GATE			IN
10			2D4 				74ASXX:GATE			IN
11			OE2-				74ASXX:GATE			IN
12			GND 				GND  					NA
13			CLR2-  			74ASXX:GATE			IN
14			CLK2				74ASXX:GATE			IN
15			2Q4 				74ASXX:LINE-DRV  	ENBO
16			2Q3 				74ASXX:LINE-DRV  	ENBO
17			2Q2 				74ASXX:LINE-DRV  	ENBO
18			2Q1 				74ASXX:LINE-DRV  	ENBO
19			1Q4 				74ASXX:LINE-DRV  	ENBO
20			1Q3 				74ASXX:LINE-DRV  	ENBO
21			1Q2 				74ASXX:LINE-DRV  	ENBO
22			1Q1 				74ASXX:LINE-DRV  	ENBO
23			CLK1				74ASXX:GATE			IN
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS878_SOIC
[Model File]		PML.MOD
[Package Model]    SOIC24
|
[Pin]		signal_name 	model_name  		direction
|
1			CLR1-				74ASXX:GATE			IN
2			OE1- 				74ASXX:GATE			IN
3			1D1  				74ASXX:GATE			IN
4			1D2  				74ASXX:GATE			IN
5			1D3  				74ASXX:GATE			IN
6			1D4  				74ASXX:GATE			IN
7			2D1  				74ASXX:GATE			IN
8			2D2  				74ASXX:GATE			IN
9			2D3  				74ASXX:GATE			IN
10			2D4 				74ASXX:GATE			IN
11			OE2-				74ASXX:GATE			IN
12			GND 				GND  					NA
13			CLR2-  			74ASXX:GATE			IN
14			CLK2				74ASXX:GATE			IN
15			2Q4 				74ASXX:LINE-DRV  	ENBO
16			2Q3 				74ASXX:LINE-DRV  	ENBO
17			2Q2 				74ASXX:LINE-DRV  	ENBO
18			2Q1 				74ASXX:LINE-DRV  	ENBO
19			1Q4 				74ASXX:LINE-DRV  	ENBO
20			1Q3 				74ASXX:LINE-DRV  	ENBO
21			1Q2 				74ASXX:LINE-DRV  	ENBO
22			1Q1 				74ASXX:LINE-DRV  	ENBO
23			CLK1				74ASXX:GATE			IN
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS878_SSOP
[Model File]		PML.MOD
[Package Model]    SSOP24
|
[Pin]		signal_name 	model_name  		direction
|
1			CLR1-				74ASXX:GATE			IN
2			OE1- 				74ASXX:GATE			IN
3			1D1  				74ASXX:GATE			IN
4			1D2  				74ASXX:GATE			IN
5			1D3  				74ASXX:GATE			IN
6			1D4  				74ASXX:GATE			IN
7			2D1  				74ASXX:GATE			IN
8			2D2  				74ASXX:GATE			IN
9			2D3  				74ASXX:GATE			IN
10			2D4 				74ASXX:GATE			IN
11			OE2-				74ASXX:GATE			IN
12			GND 				GND  					NA
13			CLR2-  			74ASXX:GATE			IN
14			CLK2				74ASXX:GATE			IN
15			2Q4 				74ASXX:LINE-DRV  	ENBO
16			2Q3 				74ASXX:LINE-DRV  	ENBO
17			2Q2 				74ASXX:LINE-DRV  	ENBO
18			2Q1 				74ASXX:LINE-DRV  	ENBO
19			1Q4 				74ASXX:LINE-DRV  	ENBO
20			1Q3 				74ASXX:LINE-DRV  	ENBO
21			1Q2 				74ASXX:LINE-DRV  	ENBO
22			1Q1 				74ASXX:LINE-DRV  	ENBO
23			CLK1				74ASXX:GATE			IN
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS878_TSSOP
[Model File]		PML.MOD
[Package Model]    TSSOP24
|
[Pin]		signal_name 	model_name  		direction
|
1			CLR1-				74ASXX:GATE			IN
2			OE1- 				74ASXX:GATE			IN
3			1D1  				74ASXX:GATE			IN
4			1D2  				74ASXX:GATE			IN
5			1D3  				74ASXX:GATE			IN
6			1D4  				74ASXX:GATE			IN
7			2D1  				74ASXX:GATE			IN
8			2D2  				74ASXX:GATE			IN
9			2D3  				74ASXX:GATE			IN
10			2D4 				74ASXX:GATE			IN
11			OE2-				74ASXX:GATE			IN
12			GND 				GND  					NA
13			CLR2-  			74ASXX:GATE			IN
14			CLK2				74ASXX:GATE			IN
15			2Q4 				74ASXX:LINE-DRV  	ENBO
16			2Q3 				74ASXX:LINE-DRV  	ENBO
17			2Q2 				74ASXX:LINE-DRV  	ENBO
18			2Q1 				74ASXX:LINE-DRV  	ENBO
19			1Q4 				74ASXX:LINE-DRV  	ENBO
20			1Q3 				74ASXX:LINE-DRV  	ENBO
21			1Q2 				74ASXX:LINE-DRV  	ENBO
22			1Q1 				74ASXX:LINE-DRV  	ENBO
23			CLK1				74ASXX:GATE			IN
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS879_DIP
[Model File]		PML.MOD
[Package Model]    DIP24
|
[Pin]		signal_name 	model_name  		direction
|
1			CLR1-				74ASXX:GATE			IN
2			OE1- 				74ASXX:GATE			IN
3			1D1- 				74ASXX:GATE			IN
4			1D2- 				74ASXX:GATE			IN
5			1D3- 				74ASXX:GATE			IN
6			1D4- 				74ASXX:GATE			IN
7			2D1- 				74ASXX:GATE			IN
8			2D2- 				74ASXX:GATE			IN
9			2D3- 				74ASXX:GATE			IN
10			2D4-				74ASXX:GATE			IN
11			OE2-				74ASXX:GATE			IN
12			GND 				GND  					NA
13			CLR2-  			74ASXX:GATE			IN
14			CLK2				74ASXX:GATE			IN
15			2Q4-				74ASXX:LINE-DRV  	ENBO
16			2Q3-				74ASXX:LINE-DRV  	ENBO
17			2Q2-				74ASXX:LINE-DRV  	ENBO
18			2Q1-				74ASXX:LINE-DRV  	ENBO
19			1Q4-				74ASXX:LINE-DRV  	ENBO
20			1Q3-				74ASXX:LINE-DRV  	ENBO
21			1Q2-				74ASXX:LINE-DRV  	ENBO
22			1Q1-				74ASXX:LINE-DRV  	ENBO
23			CLK1				74ASXX:GATE			IN
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS879_SOIC
[Model File]		PML.MOD
[Package Model]    SOIC24
|
[Pin]		signal_name 	model_name  		direction
|
1			CLR1-				74ASXX:GATE			IN
2			OE1- 				74ASXX:GATE			IN
3			1D1- 				74ASXX:GATE			IN
4			1D2- 				74ASXX:GATE			IN
5			1D3- 				74ASXX:GATE			IN
6			1D4- 				74ASXX:GATE			IN
7			2D1- 				74ASXX:GATE			IN
8			2D2- 				74ASXX:GATE			IN
9			2D3- 				74ASXX:GATE			IN
10			2D4-				74ASXX:GATE			IN
11			OE2-				74ASXX:GATE			IN
12			GND 				GND  					NA
13			CLR2-  			74ASXX:GATE			IN
14			CLK2				74ASXX:GATE			IN
15			2Q4-				74ASXX:LINE-DRV  	ENBO
16			2Q3-				74ASXX:LINE-DRV  	ENBO
17			2Q2-				74ASXX:LINE-DRV  	ENBO
18			2Q1-				74ASXX:LINE-DRV  	ENBO
19			1Q4-				74ASXX:LINE-DRV  	ENBO
20			1Q3-				74ASXX:LINE-DRV  	ENBO
21			1Q2-				74ASXX:LINE-DRV  	ENBO
22			1Q1-				74ASXX:LINE-DRV  	ENBO
23			CLK1				74ASXX:GATE			IN
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS879_SSOP
[Model File]		PML.MOD
[Package Model]    SSOP24
|
[Pin]		signal_name 	model_name  		direction
|
1			CLR1-				74ASXX:GATE			IN
2			OE1- 				74ASXX:GATE			IN
3			1D1- 				74ASXX:GATE			IN
4			1D2- 				74ASXX:GATE			IN
5			1D3- 				74ASXX:GATE			IN
6			1D4- 				74ASXX:GATE			IN
7			2D1- 				74ASXX:GATE			IN
8			2D2- 				74ASXX:GATE			IN
9			2D3- 				74ASXX:GATE			IN
10			2D4-				74ASXX:GATE			IN
11			OE2-				74ASXX:GATE			IN
12			GND 				GND  					NA
13			CLR2-  			74ASXX:GATE			IN
14			CLK2				74ASXX:GATE			IN
15			2Q4-				74ASXX:LINE-DRV  	ENBO
16			2Q3-				74ASXX:LINE-DRV  	ENBO
17			2Q2-				74ASXX:LINE-DRV  	ENBO
18			2Q1-				74ASXX:LINE-DRV  	ENBO
19			1Q4-				74ASXX:LINE-DRV  	ENBO
20			1Q3-				74ASXX:LINE-DRV  	ENBO
21			1Q2-				74ASXX:LINE-DRV  	ENBO
22			1Q1-				74ASXX:LINE-DRV  	ENBO
23			CLK1				74ASXX:GATE			IN
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS879_TSSOP
[Model File]		PML.MOD
[Package Model]    TSSOP24
|
[Pin]		signal_name 	model_name  		direction
|
1			CLR1-				74ASXX:GATE			IN
2			OE1- 				74ASXX:GATE			IN
3			1D1- 				74ASXX:GATE			IN
4			1D2- 				74ASXX:GATE			IN
5			1D3- 				74ASXX:GATE			IN
6			1D4- 				74ASXX:GATE			IN
7			2D1- 				74ASXX:GATE			IN
8			2D2- 				74ASXX:GATE			IN
9			2D3- 				74ASXX:GATE			IN
10			2D4-				74ASXX:GATE			IN
11			OE2-				74ASXX:GATE			IN
12			GND 				GND  					NA
13			CLR2-  			74ASXX:GATE			IN
14			CLK2				74ASXX:GATE			IN
15			2Q4-				74ASXX:LINE-DRV  	ENBO
16			2Q3-				74ASXX:LINE-DRV  	ENBO
17			2Q2-				74ASXX:LINE-DRV  	ENBO
18			2Q1-				74ASXX:LINE-DRV  	ENBO
19			1Q4-				74ASXX:LINE-DRV  	ENBO
20			1Q3-				74ASXX:LINE-DRV  	ENBO
21			1Q2-				74ASXX:LINE-DRV  	ENBO
22			1Q1-				74ASXX:LINE-DRV  	ENBO
23			CLK1				74ASXX:GATE			IN
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS880_DIP
[Model File]		PML.MOD
[Package Model]    DIP24
|
[Pin]		signal_name 	model_name  		direction
|
1			PRE1-				74ASXX:GATE			IN
2			OE1- 				74ASXX:GATE			IN
3			1D1  				74ASXX:GATE			IN
4			1D2  				74ASXX:GATE			IN
5			1D3  				74ASXX:GATE			IN
6			1D4  				74ASXX:GATE			IN
7			2D1  				74ASXX:GATE			IN
8			2D2  				74ASXX:GATE			IN
9			2D3  				74ASXX:GATE			IN
10			2D4 				74ASXX:GATE			IN
11			OE2-				74ASXX:GATE			IN
12			GND 				GND  					NA
13			PRE2-  			74ASXX:GATE			IN
14			ENABLE_G2 		74ASXX:GATE			IN
15			2Q4 				74ASXX:LINE-DRV  	ENBO
16			2Q3 				74ASXX:LINE-DRV  	ENBO
17			2Q2 				74ASXX:LINE-DRV  	ENBO
18			2Q1 				74ASXX:LINE-DRV  	ENBO
19			1Q4 				74ASXX:LINE-DRV  	ENBO
20			1Q3 				74ASXX:LINE-DRV  	ENBO
21			1Q2 				74ASXX:LINE-DRV  	ENBO
22			1Q1 				74ASXX:LINE-DRV  	ENBO
23			ENABLE_G1 		74ASXX:GATE			IN
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS880_SOIC
[Model File]		PML.MOD
[Package Model]    SOIC24
|
[Pin]		signal_name 	model_name  		direction
|
1			PRE1-				74ASXX:GATE			IN
2			OE1- 				74ASXX:GATE			IN
3			1D1  				74ASXX:GATE			IN
4			1D2  				74ASXX:GATE			IN
5			1D3  				74ASXX:GATE			IN
6			1D4  				74ASXX:GATE			IN
7			2D1  				74ASXX:GATE			IN
8			2D2  				74ASXX:GATE			IN
9			2D3  				74ASXX:GATE			IN
10			2D4 				74ASXX:GATE			IN
11			OE2-				74ASXX:GATE			IN
12			GND 				GND  					NA
13			PRE2-  			74ASXX:GATE			IN
14			ENABLE_G2 		74ASXX:GATE			IN
15			2Q4 				74ASXX:LINE-DRV  	ENBO
16			2Q3 				74ASXX:LINE-DRV  	ENBO
17			2Q2 				74ASXX:LINE-DRV  	ENBO
18			2Q1 				74ASXX:LINE-DRV  	ENBO
19			1Q4 				74ASXX:LINE-DRV  	ENBO
20			1Q3 				74ASXX:LINE-DRV  	ENBO
21			1Q2 				74ASXX:LINE-DRV  	ENBO
22			1Q1 				74ASXX:LINE-DRV  	ENBO
23			ENABLE_G1 		74ASXX:GATE			IN
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS880_SSOP
[Model File]		PML.MOD
[Package Model]    SSOP24
|
[Pin]		signal_name 	model_name  		direction
|
1			PRE1-				74ASXX:GATE			IN
2			OE1- 				74ASXX:GATE			IN
3			1D1  				74ASXX:GATE			IN
4			1D2  				74ASXX:GATE			IN
5			1D3  				74ASXX:GATE			IN
6			1D4  				74ASXX:GATE			IN
7			2D1  				74ASXX:GATE			IN
8			2D2  				74ASXX:GATE			IN
9			2D3  				74ASXX:GATE			IN
10			2D4 				74ASXX:GATE			IN
11			OE2-				74ASXX:GATE			IN
12			GND 				GND  					NA
13			PRE2-  			74ASXX:GATE			IN
14			ENABLE_G2 		74ASXX:GATE			IN
15			2Q4 				74ASXX:LINE-DRV  	ENBO
16			2Q3 				74ASXX:LINE-DRV  	ENBO
17			2Q2 				74ASXX:LINE-DRV  	ENBO
18			2Q1 				74ASXX:LINE-DRV  	ENBO
19			1Q4 				74ASXX:LINE-DRV  	ENBO
20			1Q3 				74ASXX:LINE-DRV  	ENBO
21			1Q2 				74ASXX:LINE-DRV  	ENBO
22			1Q1 				74ASXX:LINE-DRV  	ENBO
23			ENABLE_G1 		74ASXX:GATE			IN
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS880_TSSOP
[Model File]		PML.MOD
[Package Model]    TSSOP24
|
[Pin]		signal_name 	model_name  		direction
|
1			PRE1-				74ASXX:GATE			IN
2			OE1- 				74ASXX:GATE			IN
3			1D1  				74ASXX:GATE			IN
4			1D2  				74ASXX:GATE			IN
5			1D3  				74ASXX:GATE			IN
6			1D4  				74ASXX:GATE			IN
7			2D1  				74ASXX:GATE			IN
8			2D2  				74ASXX:GATE			IN
9			2D3  				74ASXX:GATE			IN
10			2D4 				74ASXX:GATE			IN
11			OE2-				74ASXX:GATE			IN
12			GND 				GND  					NA
13			PRE2-  			74ASXX:GATE			IN
14			ENABLE_G2 		74ASXX:GATE			IN
15			2Q4 				74ASXX:LINE-DRV  	ENBO
16			2Q3 				74ASXX:LINE-DRV  	ENBO
17			2Q2 				74ASXX:LINE-DRV  	ENBO
18			2Q1 				74ASXX:LINE-DRV  	ENBO
19			1Q4 				74ASXX:LINE-DRV  	ENBO
20			1Q3 				74ASXX:LINE-DRV  	ENBO
21			1Q2 				74ASXX:LINE-DRV  	ENBO
22			1Q1 				74ASXX:LINE-DRV  	ENBO
23			ENABLE_G1 		74ASXX:GATE			IN
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS881_DIP
[Model File]		PML.MOD
[Package Model]    DIP24
|
[Pin]		signal_name 	model_name  		direction
|
1			B0-  				74ASXX:GATE			IN
2			A0-  				74ASXX:GATE			IN
3			S3					74ASXX:GATE			IN
4			S2					74ASXX:GATE			IN
5			S1					74ASXX:GATE			IN
6			S0					74ASXX:GATE			IN
7			Cn					74ASXX:GATE			IN
8			M 					74ASXX:GATE			IN
9			F0-  				74ASXX:GATE			OUT
10			F1- 				74ASXX:GATE			OUT
11			F2- 				74ASXX:GATE			OUT
12			GND 				GND  					NA
13			F3- 				74ASXX:GATE			OUT
14			A=B 				74ASXX:OPEN-COL  	OUT
15			P-  				74ASXX:GATE			OUT
16			C(n+4) 			74ASXX:GATE			OUT
17			G-  				74ASXX:GATE			OUT
18			B3- 				74ASXX:GATE			IN
19			A3- 				74ASXX:GATE			IN
20			B2- 				74ASXX:GATE			IN
21			A2- 				74ASXX:GATE			IN
22			B1- 				74ASXX:GATE			IN
23			A1- 				74ASXX:GATE			IN
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS881_SOIC
[Model File]		PML.MOD
[Package Model]    SOIC24
|
[Pin]		signal_name 	model_name  		direction
|
1			B0-  				74ASXX:GATE			IN
2			A0-  				74ASXX:GATE			IN
3			S3					74ASXX:GATE			IN
4			S2					74ASXX:GATE			IN
5			S1					74ASXX:GATE			IN
6			S0					74ASXX:GATE			IN
7			Cn					74ASXX:GATE			IN
8			M 					74ASXX:GATE			IN
9			F0-  				74ASXX:GATE			OUT
10			F1- 				74ASXX:GATE			OUT
11			F2- 				74ASXX:GATE			OUT
12			GND 				GND  					NA
13			F3- 				74ASXX:GATE			OUT
14			A=B 				74ASXX:OPEN-COL  	OUT
15			P-  				74ASXX:GATE			OUT
16			C(n+4) 			74ASXX:GATE			OUT
17			G-  				74ASXX:GATE			OUT
18			B3- 				74ASXX:GATE			IN
19			A3- 				74ASXX:GATE			IN
20			B2- 				74ASXX:GATE			IN
21			A2- 				74ASXX:GATE			IN
22			B1- 				74ASXX:GATE			IN
23			A1- 				74ASXX:GATE			IN
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS881_SSOP
[Model File]		PML.MOD
[Package Model]    SSOP24
|
[Pin]		signal_name 	model_name  		direction
|
1			B0-  				74ASXX:GATE			IN
2			A0-  				74ASXX:GATE			IN
3			S3					74ASXX:GATE			IN
4			S2					74ASXX:GATE			IN
5			S1					74ASXX:GATE			IN
6			S0					74ASXX:GATE			IN
7			Cn					74ASXX:GATE			IN
8			M 					74ASXX:GATE			IN
9			F0-  				74ASXX:GATE			OUT
10			F1- 				74ASXX:GATE			OUT
11			F2- 				74ASXX:GATE			OUT
12			GND 				GND  					NA
13			F3- 				74ASXX:GATE			OUT
14			A=B 				74ASXX:OPEN-COL  	OUT
15			P-  				74ASXX:GATE			OUT
16			C(n+4) 			74ASXX:GATE			OUT
17			G-  				74ASXX:GATE			OUT
18			B3- 				74ASXX:GATE			IN
19			A3- 				74ASXX:GATE			IN
20			B2- 				74ASXX:GATE			IN
21			A2- 				74ASXX:GATE			IN
22			B1- 				74ASXX:GATE			IN
23			A1- 				74ASXX:GATE			IN
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS881_TSSOP
[Model File]		PML.MOD
[Package Model]    TSSOP24
|
[Pin]		signal_name 	model_name  		direction
|
1			B0-  				74ASXX:GATE			IN
2			A0-  				74ASXX:GATE			IN
3			S3					74ASXX:GATE			IN
4			S2					74ASXX:GATE			IN
5			S1					74ASXX:GATE			IN
6			S0					74ASXX:GATE			IN
7			Cn					74ASXX:GATE			IN
8			M 					74ASXX:GATE			IN
9			F0-  				74ASXX:GATE			OUT
10			F1- 				74ASXX:GATE			OUT
11			F2- 				74ASXX:GATE			OUT
12			GND 				GND  					NA
13			F3- 				74ASXX:GATE			OUT
14			A=B 				74ASXX:OPEN-COL  	OUT
15			P-  				74ASXX:GATE			OUT
16			C(n+4) 			74ASXX:GATE			OUT
17			G-  				74ASXX:GATE			OUT
18			B3- 				74ASXX:GATE			IN
19			A3- 				74ASXX:GATE			IN
20			B2- 				74ASXX:GATE			IN
21			A2- 				74ASXX:GATE			IN
22			B1- 				74ASXX:GATE			IN
23			A1- 				74ASXX:GATE			IN
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS882_DIP
[Model File]		PML.MOD
[Package Model]    DIP24
|
[Pin]		signal_name 	model_name  		direction
|
1			Cn					74ASXX:GATE			IN
2			G0-  				74ASXX:GATE			IN
3			P0-  				74ASXX:GATE			IN
4			G1-  				74ASXX:GATE			IN
5			P1-  				74ASXX:GATE			IN
6			C(n+8)  			74ASXX:GATE			OUT
7			G2-  				74ASXX:GATE			IN
8			P2-  				74ASXX:GATE			IN
9			G3-  				74ASXX:GATE			IN
10			P3- 				74ASXX:GATE			IN
11			C(n+16)			74ASXX:GATE			OUT
12			GND 				GND  					NA
13			G4- 				74ASXX:GATE			IN
14			P4- 				74ASXX:GATE			IN
15			G5- 				74ASXX:GATE			IN
16			P5- 				74ASXX:GATE			IN
17			C(n+24)			74ASXX:GATE			OUT
18			G6- 				74ASXX:GATE			IN
19			P6- 				74ASXX:GATE			IN
20			G7- 				74ASXX:GATE			IN
21			P7- 				74ASXX:GATE			IN
22			C(n+32)			74ASXX:GATE			OUT
23			NC  				NC						NA
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS882_SOIC
[Model File]		PML.MOD
[Package Model]    SOIC24
|
[Pin]		signal_name 	model_name  		direction
|
1			Cn					74ASXX:GATE			IN
2			G0-  				74ASXX:GATE			IN
3			P0-  				74ASXX:GATE			IN
4			G1-  				74ASXX:GATE			IN
5			P1-  				74ASXX:GATE			IN
6			C(n+8)  			74ASXX:GATE			OUT
7			G2-  				74ASXX:GATE			IN
8			P2-  				74ASXX:GATE			IN
9			G3-  				74ASXX:GATE			IN
10			P3- 				74ASXX:GATE			IN
11			C(n+16)			74ASXX:GATE			OUT
12			GND 				GND  					NA
13			G4- 				74ASXX:GATE			IN
14			P4- 				74ASXX:GATE			IN
15			G5- 				74ASXX:GATE			IN
16			P5- 				74ASXX:GATE			IN
17			C(n+24)			74ASXX:GATE			OUT
18			G6- 				74ASXX:GATE			IN
19			P6- 				74ASXX:GATE			IN
20			G7- 				74ASXX:GATE			IN
21			P7- 				74ASXX:GATE			IN
22			C(n+32)			74ASXX:GATE			OUT
23			NC  				NC						NA
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS882_SSOP
[Model File]		PML.MOD
[Package Model]    SSOP24
|
[Pin]		signal_name 	model_name  		direction
|
1			Cn					74ASXX:GATE			IN
2			G0-  				74ASXX:GATE			IN
3			P0-  				74ASXX:GATE			IN
4			G1-  				74ASXX:GATE			IN
5			P1-  				74ASXX:GATE			IN
6			C(n+8)  			74ASXX:GATE			OUT
7			G2-  				74ASXX:GATE			IN
8			P2-  				74ASXX:GATE			IN
9			G3-  				74ASXX:GATE			IN
10			P3- 				74ASXX:GATE			IN
11			C(n+16)			74ASXX:GATE			OUT
12			GND 				GND  					NA
13			G4- 				74ASXX:GATE			IN
14			P4- 				74ASXX:GATE			IN
15			G5- 				74ASXX:GATE			IN
16			P5- 				74ASXX:GATE			IN
17			C(n+24)			74ASXX:GATE			OUT
18			G6- 				74ASXX:GATE			IN
19			P6- 				74ASXX:GATE			IN
20			G7- 				74ASXX:GATE			IN
21			P7- 				74ASXX:GATE			IN
22			C(n+32)			74ASXX:GATE			OUT
23			NC  				NC						NA
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS882_TSSOP
[Model File]		PML.MOD
[Package Model]    TSSOP24
|
[Pin]		signal_name 	model_name  		direction
|
1			Cn					74ASXX:GATE			IN
2			G0-  				74ASXX:GATE			IN
3			P0-  				74ASXX:GATE			IN
4			G1-  				74ASXX:GATE			IN
5			P1-  				74ASXX:GATE			IN
6			C(n+8)  			74ASXX:GATE			OUT
7			G2-  				74ASXX:GATE			IN
8			P2-  				74ASXX:GATE			IN
9			G3-  				74ASXX:GATE			IN
10			P3- 				74ASXX:GATE			IN
11			C(n+16)			74ASXX:GATE			OUT
12			GND 				GND  					NA
13			G4- 				74ASXX:GATE			IN
14			P4- 				74ASXX:GATE			IN
15			G5- 				74ASXX:GATE			IN
16			P5- 				74ASXX:GATE			IN
17			C(n+24)			74ASXX:GATE			OUT
18			G6- 				74ASXX:GATE			IN
19			P6- 				74ASXX:GATE			IN
20			G7- 				74ASXX:GATE			IN
21			P7- 				74ASXX:GATE			IN
22			C(n+32)			74ASXX:GATE			OUT
23			NC  				NC						NA
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS885_DIP
[Model File]		PML.MOD
[Package Model]    DIP24
|
[Pin]		signal_name 	model_name  		direction
|
1			L/A- 				74ASXX:GATE			IN
2			P<QIN				74ASXX:GATE			IN
3			P>QIN				74ASXX:GATE			IN
4			Q7					74ASXX:GATE			IN
5			Q6					74ASXX:GATE			IN
6			Q5					74ASXX:GATE			IN
7			Q4					74ASXX:GATE			IN
8			Q3					74ASXX:GATE			IN
9			Q2					74ASXX:GATE			IN
10			Q1  				74ASXX:GATE			IN
11			Q0  				74ASXX:GATE			IN
12			GND 				GND  					NA
13			P>Q_O  			74ASXX:GATE			OUT
14			P<Q_O  			74ASXX:GATE			OUT
15			P0  				74ASXX:GATE			IN
16			P1  				74ASXX:GATE			IN
17			P2  				74ASXX:GATE			IN
18			P3  				74ASXX:GATE			IN
19			P4  				74ASXX:GATE			IN
20			P5  				74ASXX:GATE			IN
21			P6  				74ASXX:GATE			IN
22			P7  				74ASXX:GATE			IN
23			PLE 				74ASXX:GATE			IN
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS885_SOIC
[Model File]		PML.MOD
[Package Model]    SOIC24
|
[Pin]		signal_name 	model_name  		direction
|
1			L/A- 				74ASXX:GATE			IN
2			P<QIN				74ASXX:GATE			IN
3			P>QIN				74ASXX:GATE			IN
4			Q7					74ASXX:GATE			IN
5			Q6					74ASXX:GATE			IN
6			Q5					74ASXX:GATE			IN
7			Q4					74ASXX:GATE			IN
8			Q3					74ASXX:GATE			IN
9			Q2					74ASXX:GATE			IN
10			Q1  				74ASXX:GATE			IN
11			Q0  				74ASXX:GATE			IN
12			GND 				GND  					NA
13			P>Q_O  			74ASXX:GATE			OUT
14			P<Q_O  			74ASXX:GATE			OUT
15			P0  				74ASXX:GATE			IN
16			P1  				74ASXX:GATE			IN
17			P2  				74ASXX:GATE			IN
18			P3  				74ASXX:GATE			IN
19			P4  				74ASXX:GATE			IN
20			P5  				74ASXX:GATE			IN
21			P6  				74ASXX:GATE			IN
22			P7  				74ASXX:GATE			IN
23			PLE 				74ASXX:GATE			IN
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS885_SSOP
[Model File]		PML.MOD
[Package Model]    SSOP24
|
[Pin]		signal_name 	model_name  		direction
|
1			L/A- 				74ASXX:GATE			IN
2			P<QIN				74ASXX:GATE			IN
3			P>QIN				74ASXX:GATE			IN
4			Q7					74ASXX:GATE			IN
5			Q6					74ASXX:GATE			IN
6			Q5					74ASXX:GATE			IN
7			Q4					74ASXX:GATE			IN
8			Q3					74ASXX:GATE			IN
9			Q2					74ASXX:GATE			IN
10			Q1  				74ASXX:GATE			IN
11			Q0  				74ASXX:GATE			IN
12			GND 				GND  					NA
13			P>Q_O  			74ASXX:GATE			OUT
14			P<Q_O  			74ASXX:GATE			OUT
15			P0  				74ASXX:GATE			IN
16			P1  				74ASXX:GATE			IN
17			P2  				74ASXX:GATE			IN
18			P3  				74ASXX:GATE			IN
19			P4  				74ASXX:GATE			IN
20			P5  				74ASXX:GATE			IN
21			P6  				74ASXX:GATE			IN
22			P7  				74ASXX:GATE			IN
23			PLE 				74ASXX:GATE			IN
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS885_TSSOP
[Model File]		PML.MOD
[Package Model]    TSSOP24
|
[Pin]		signal_name 	model_name  		direction
|
1			L/A- 				74ASXX:GATE			IN
2			P<QIN				74ASXX:GATE			IN
3			P>QIN				74ASXX:GATE			IN
4			Q7					74ASXX:GATE			IN
5			Q6					74ASXX:GATE			IN
6			Q5					74ASXX:GATE			IN
7			Q4					74ASXX:GATE			IN
8			Q3					74ASXX:GATE			IN
9			Q2					74ASXX:GATE			IN
10			Q1  				74ASXX:GATE			IN
11			Q0  				74ASXX:GATE			IN
12			GND 				GND  					NA
13			P>Q_O  			74ASXX:GATE			OUT
14			P<Q_O  			74ASXX:GATE			OUT
15			P0  				74ASXX:GATE			IN
16			P1  				74ASXX:GATE			IN
17			P2  				74ASXX:GATE			IN
18			P3  				74ASXX:GATE			IN
19			P4  				74ASXX:GATE			IN
20			P5  				74ASXX:GATE			IN
21			P6  				74ASXX:GATE			IN
22			P7  				74ASXX:GATE			IN
23			PLE 				74ASXX:GATE			IN
24			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS1000_DIP
[Model File]		PML.MOD
[Package Model]    DIP14
|
[Pin]		signal_name 	model_name  		direction
|
1			A1					74ASXX:GATE			IN
2			B1					74ASXX:GATE			IN
3			Y1					74ASXX:LINE-DRV  	OUT
4			A2					74ASXX:GATE			IN
5			B2					74ASXX:GATE			IN
6			Y2					74ASXX:LINE-DRV  	OUT
7			GND  				GND  					NA
8			Y3					74ASXX:LINE-DRV  	OUT
9			A3					74ASXX:GATE			IN
10			B3  				74ASXX:GATE			IN
11			Y4  				74ASXX:LINE-DRV  	OUT
12			A4  				74ASXX:GATE			IN
13			B4  				74ASXX:GATE			IN
14			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS1000_SOIC
[Model File]		PML.MOD
[Package Model]    SOIC14
|
[Pin]		signal_name 	model_name  		direction
|
1			A1					74ASXX:GATE			IN
2			B1					74ASXX:GATE			IN
3			Y1					74ASXX:LINE-DRV  	OUT
4			A2					74ASXX:GATE			IN
5			B2					74ASXX:GATE			IN
6			Y2					74ASXX:LINE-DRV  	OUT
7			GND  				GND  					NA
8			Y3					74ASXX:LINE-DRV  	OUT
9			A3					74ASXX:GATE			IN
10			B3  				74ASXX:GATE			IN
11			Y4  				74ASXX:LINE-DRV  	OUT
12			A4  				74ASXX:GATE			IN
13			B4  				74ASXX:GATE			IN
14			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS1000_SSOP
[Model File]		PML.MOD
[Package Model]    SSOP14
|
[Pin]		signal_name 	model_name  		direction
|
1			A1					74ASXX:GATE			IN
2			B1					74ASXX:GATE			IN
3			Y1					74ASXX:LINE-DRV  	OUT
4			A2					74ASXX:GATE			IN
5			B2					74ASXX:GATE			IN
6			Y2					74ASXX:LINE-DRV  	OUT
7			GND  				GND  					NA
8			Y3					74ASXX:LINE-DRV  	OUT
9			A3					74ASXX:GATE			IN
10			B3  				74ASXX:GATE			IN
11			Y4  				74ASXX:LINE-DRV  	OUT
12			A4  				74ASXX:GATE			IN
13			B4  				74ASXX:GATE			IN
14			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS1000_TSSOP
[Model File]		PML.MOD
[Package Model]    TSSOP14
|
[Pin]		signal_name 	model_name  		direction
|
1			A1					74ASXX:GATE			IN
2			B1					74ASXX:GATE			IN
3			Y1					74ASXX:LINE-DRV  	OUT
4			A2					74ASXX:GATE			IN
5			B2					74ASXX:GATE			IN
6			Y2					74ASXX:LINE-DRV  	OUT
7			GND  				GND  					NA
8			Y3					74ASXX:LINE-DRV  	OUT
9			A3					74ASXX:GATE			IN
10			B3  				74ASXX:GATE			IN
11			Y4  				74ASXX:LINE-DRV  	OUT
12			A4  				74ASXX:GATE			IN
13			B4  				74ASXX:GATE			IN
14			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS1004_DIP
[Model File]		PML.MOD
[Package Model]    DIP14
|
[Pin]		signal_name 	model_name  		direction
|
1			A1					74ASXX:GATE			IN
2			Y1					74ASXX:LINE-DRV  	OUT
3			A2					74ASXX:GATE			IN
4			Y2					74ASXX:LINE-DRV  	OUT
5			A3					74ASXX:GATE			IN
6			Y3					74ASXX:LINE-DRV  	OUT
7			GND  				GND  					NA
8			Y4					74ASXX:LINE-DRV  	OUT
9			A4					74ASXX:GATE			IN
10			Y5  				74ASXX:LINE-DRV  	OUT
11			A5  				74ASXX:GATE			IN
12			Y6  				74ASXX:LINE-DRV  	OUT
13			A6  				74ASXX:GATE			IN
14			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS1004_SOIC
[Model File]		PML.MOD
[Package Model]    SOIC14
|
[Pin]		signal_name 	model_name  		direction
|
1			A1					74ASXX:GATE			IN
2			Y1					74ASXX:LINE-DRV  	OUT
3			A2					74ASXX:GATE			IN
4			Y2					74ASXX:LINE-DRV  	OUT
5			A3					74ASXX:GATE			IN
6			Y3					74ASXX:LINE-DRV  	OUT
7			GND  				GND  					NA
8			Y4					74ASXX:LINE-DRV  	OUT
9			A4					74ASXX:GATE			IN
10			Y5  				74ASXX:LINE-DRV  	OUT
11			A5  				74ASXX:GATE			IN
12			Y6  				74ASXX:LINE-DRV  	OUT
13			A6  				74ASXX:GATE			IN
14			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS1004_SSOP
[Model File]		PML.MOD
[Package Model]    SSOP14
|
[Pin]		signal_name 	model_name  		direction
|
1			A1					74ASXX:GATE			IN
2			Y1					74ASXX:LINE-DRV  	OUT
3			A2					74ASXX:GATE			IN
4			Y2					74ASXX:LINE-DRV  	OUT
5			A3					74ASXX:GATE			IN
6			Y3					74ASXX:LINE-DRV  	OUT
7			GND  				GND  					NA
8			Y4					74ASXX:LINE-DRV  	OUT
9			A4					74ASXX:GATE			IN
10			Y5  				74ASXX:LINE-DRV  	OUT
11			A5  				74ASXX:GATE			IN
12			Y6  				74ASXX:LINE-DRV  	OUT
13			A6  				74ASXX:GATE			IN
14			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS1004_TSSOP
[Model File]		PML.MOD
[Package Model]    TSSOP14
|
[Pin]		signal_name 	model_name  		direction
|
1			A1					74ASXX:GATE			IN
2			Y1					74ASXX:LINE-DRV  	OUT
3			A2					74ASXX:GATE			IN
4			Y2					74ASXX:LINE-DRV  	OUT
5			A3					74ASXX:GATE			IN
6			Y3					74ASXX:LINE-DRV  	OUT
7			GND  				GND  					NA
8			Y4					74ASXX:LINE-DRV  	OUT
9			A4					74ASXX:GATE			IN
10			Y5  				74ASXX:LINE-DRV  	OUT
11			A5  				74ASXX:GATE			IN
12			Y6  				74ASXX:LINE-DRV  	OUT
13			A6  				74ASXX:GATE			IN
14			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS1008_DIP
[Model File]		PML.MOD
[Package Model]    DIP14
|
[Pin]		signal_name 	model_name  		direction
|
1			A1					74ASXX:GATE			IN
2			B1					74ASXX:GATE			IN
3			Y1					74ASXX:LINE-DRV  	OUT
4			A2					74ASXX:GATE			IN
5			B2					74ASXX:GATE			IN
6			Y2					74ASXX:LINE-DRV  	OUT
7			GND  				GND  					NA
8			Y3					74ASXX:LINE-DRV  	OUT
9			A3					74ASXX:GATE			IN
10			B3  				74ASXX:GATE			IN
11			Y4  				74ASXX:LINE-DRV  	OUT
12			A4  				74ASXX:GATE			IN
13			B4  				74ASXX:GATE			IN
14			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS1008_SOIC
[Model File]		PML.MOD
[Package Model]    SOIC14
|
[Pin]		signal_name 	model_name  		direction
|
1			A1					74ASXX:GATE			IN
2			B1					74ASXX:GATE			IN
3			Y1					74ASXX:LINE-DRV  	OUT
4			A2					74ASXX:GATE			IN
5			B2					74ASXX:GATE			IN
6			Y2					74ASXX:LINE-DRV  	OUT
7			GND  				GND  					NA
8			Y3					74ASXX:LINE-DRV  	OUT
9			A3					74ASXX:GATE			IN
10			B3  				74ASXX:GATE			IN
11			Y4  				74ASXX:LINE-DRV  	OUT
12			A4  				74ASXX:GATE			IN
13			B4  				74ASXX:GATE			IN
14			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS1008_SSOP
[Model File]		PML.MOD
[Package Model]    SSOP14
|
[Pin]		signal_name 	model_name  		direction
|
1			A1					74ASXX:GATE			IN
2			B1					74ASXX:GATE			IN
3			Y1					74ASXX:LINE-DRV  	OUT
4			A2					74ASXX:GATE			IN
5			B2					74ASXX:GATE			IN
6			Y2					74ASXX:LINE-DRV  	OUT
7			GND  				GND  					NA
8			Y3					74ASXX:LINE-DRV  	OUT
9			A3					74ASXX:GATE			IN
10			B3  				74ASXX:GATE			IN
11			Y4  				74ASXX:LINE-DRV  	OUT
12			A4  				74ASXX:GATE			IN
13			B4  				74ASXX:GATE			IN
14			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS1008_TSSOP
[Model File]		PML.MOD
[Package Model]    TSSOP14
|
[Pin]		signal_name 	model_name  		direction
|
1			A1					74ASXX:GATE			IN
2			B1					74ASXX:GATE			IN
3			Y1					74ASXX:LINE-DRV  	OUT
4			A2					74ASXX:GATE			IN
5			B2					74ASXX:GATE			IN
6			Y2					74ASXX:LINE-DRV  	OUT
7			GND  				GND  					NA
8			Y3					74ASXX:LINE-DRV  	OUT
9			A3					74ASXX:GATE			IN
10			B3  				74ASXX:GATE			IN
11			Y4  				74ASXX:LINE-DRV  	OUT
12			A4  				74ASXX:GATE			IN
13			B4  				74ASXX:GATE			IN
14			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS1032_DIP
[Model File]		PML.MOD
[Package Model]    DIP14
|
[Pin]		signal_name 	model_name  		direction
|
1			A1					74ASXX:GATE			IN
2			B1					74ASXX:GATE			IN
3			Y1					74ASXX:LINE-DRV  	OUT
4			A2					74ASXX:GATE			IN
5			B2					74ASXX:GATE			IN
6			Y2					74ASXX:LINE-DRV  	OUT
7			GND  				GND  					NA
8			Y3					74ASXX:LINE-DRV  	OUT
9			A3					74ASXX:GATE			IN
10			B3  				74ASXX:GATE			IN
11			Y4  				74ASXX:LINE-DRV  	OUT
12			A4  				74ASXX:GATE			IN
13			B4  				74ASXX:GATE			IN
14			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS1032_SOIC
[Model File]		PML.MOD
[Package Model]    SOIC14
|
[Pin]		signal_name 	model_name  		direction
|
1			A1					74ASXX:GATE			IN
2			B1					74ASXX:GATE			IN
3			Y1					74ASXX:LINE-DRV  	OUT
4			A2					74ASXX:GATE			IN
5			B2					74ASXX:GATE			IN
6			Y2					74ASXX:LINE-DRV  	OUT
7			GND  				GND  					NA
8			Y3					74ASXX:LINE-DRV  	OUT
9			A3					74ASXX:GATE			IN
10			B3  				74ASXX:GATE			IN
11			Y4  				74ASXX:LINE-DRV  	OUT
12			A4  				74ASXX:GATE			IN
13			B4  				74ASXX:GATE			IN
14			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS1032_SSOP
[Model File]		PML.MOD
[Package Model]    SSOP14
|
[Pin]		signal_name 	model_name  		direction
|
1			A1					74ASXX:GATE			IN
2			B1					74ASXX:GATE			IN
3			Y1					74ASXX:LINE-DRV  	OUT
4			A2					74ASXX:GATE			IN
5			B2					74ASXX:GATE			IN
6			Y2					74ASXX:LINE-DRV  	OUT
7			GND  				GND  					NA
8			Y3					74ASXX:LINE-DRV  	OUT
9			A3					74ASXX:GATE			IN
10			B3  				74ASXX:GATE			IN
11			Y4  				74ASXX:LINE-DRV  	OUT
12			A4  				74ASXX:GATE			IN
13			B4  				74ASXX:GATE			IN
14			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS1032_TSSOP
[Model File]		PML.MOD
[Package Model]    TSSOP14
|
[Pin]		signal_name 	model_name  		direction
|
1			A1					74ASXX:GATE			IN
2			B1					74ASXX:GATE			IN
3			Y1					74ASXX:LINE-DRV  	OUT
4			A2					74ASXX:GATE			IN
5			B2					74ASXX:GATE			IN
6			Y2					74ASXX:LINE-DRV  	OUT
7			GND  				GND  					NA
8			Y3					74ASXX:LINE-DRV  	OUT
9			A3					74ASXX:GATE			IN
10			B3  				74ASXX:GATE			IN
11			Y4  				74ASXX:LINE-DRV  	OUT
12			A4  				74ASXX:GATE			IN
13			B4  				74ASXX:GATE			IN
14			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS1034_DIP
[Model File]		PML.MOD
[Package Model]    DIP14
|
[Pin]		signal_name 	model_name  		direction
|
1			A1					74ASXX:GATE			IN
2			Y1					74ASXX:LINE-DRV  	OUT
3			A2					74ASXX:GATE			IN
4			Y2					74ASXX:LINE-DRV  	OUT
5			A3					74ASXX:GATE			IN
6			Y3					74ASXX:LINE-DRV  	OUT
7			GND  				GND  					NA
8			Y4					74ASXX:LINE-DRV  	OUT
9			A4					74ASXX:GATE			IN
10			Y5  				74ASXX:LINE-DRV  	OUT
11			A5  				74ASXX:GATE			IN
12			Y6  				74ASXX:LINE-DRV  	OUT
13			A6  				74ASXX:GATE			IN
14			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS1034_SOIC
[Model File]		PML.MOD
[Package Model]    SOIC14
|
[Pin]		signal_name 	model_name  		direction
|
1			A1					74ASXX:GATE			IN
2			Y1					74ASXX:LINE-DRV  	OUT
3			A2					74ASXX:GATE			IN
4			Y2					74ASXX:LINE-DRV  	OUT
5			A3					74ASXX:GATE			IN
6			Y3					74ASXX:LINE-DRV  	OUT
7			GND  				GND  					NA
8			Y4					74ASXX:LINE-DRV  	OUT
9			A4					74ASXX:GATE			IN
10			Y5  				74ASXX:LINE-DRV  	OUT
11			A5  				74ASXX:GATE			IN
12			Y6  				74ASXX:LINE-DRV  	OUT
13			A6  				74ASXX:GATE			IN
14			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS1034_SSOP
[Model File]		PML.MOD
[Package Model]    SSOP14
|
[Pin]		signal_name 	model_name  		direction
|
1			A1					74ASXX:GATE			IN
2			Y1					74ASXX:LINE-DRV  	OUT
3			A2					74ASXX:GATE			IN
4			Y2					74ASXX:LINE-DRV  	OUT
5			A3					74ASXX:GATE			IN
6			Y3					74ASXX:LINE-DRV  	OUT
7			GND  				GND  					NA
8			Y4					74ASXX:LINE-DRV  	OUT
9			A4					74ASXX:GATE			IN
10			Y5  				74ASXX:LINE-DRV  	OUT
11			A5  				74ASXX:GATE			IN
12			Y6  				74ASXX:LINE-DRV  	OUT
13			A6  				74ASXX:GATE			IN
14			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS1034_TSSOP
[Model File]		PML.MOD
[Package Model]    TSSOP14
|
[Pin]		signal_name 	model_name  		direction
|
1			A1					74ASXX:GATE			IN
2			Y1					74ASXX:LINE-DRV  	OUT
3			A2					74ASXX:GATE			IN
4			Y2					74ASXX:LINE-DRV  	OUT
5			A3					74ASXX:GATE			IN
6			Y3					74ASXX:LINE-DRV  	OUT
7			GND  				GND  					NA
8			Y4					74ASXX:LINE-DRV  	OUT
9			A4					74ASXX:GATE			IN
10			Y5  				74ASXX:LINE-DRV  	OUT
11			A5  				74ASXX:GATE			IN
12			Y6  				74ASXX:LINE-DRV  	OUT
13			A6  				74ASXX:GATE			IN
14			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS1036_DIP
[Model File]		PML.MOD
[Package Model]    DIP14
|
[Pin]		signal_name 	model_name  		direction
|
1			A1					74ASXX:LINE-DRV  	OUT
2			B1					74ASXX:GATE			IN
3			Y1					74ASXX:GATE			IN
4			VCC  				POWER					NA
5			Y2					74ASXX:GATE			IN
6			A2					74ASXX:GATE			IN
7			B2					74ASXX:LINE-DRV  	OUT
8			Y3					74ASXX:GATE			IN
9			A3					74ASXX:GATE			IN
10			B3  				74ASXX:LINE-DRV  	OUT
11			GND 				GND  					NA
12			A4  				74ASXX:LINE-DRV  	OUT
13			B4  				74ASXX:GATE			IN
14			Y4  				74ASXX:GATE			IN
|
|==============================================================================
|==============================================================================
[Component]			74AS1036_SOIC
[Model File]		PML.MOD
[Package Model]    SOIC14
|
[Pin]		signal_name 	model_name  		direction
|
1			A1					74ASXX:LINE-DRV  	OUT
2			B1					74ASXX:GATE			IN
3			Y1					74ASXX:GATE			IN
4			VCC  				POWER					NA
5			Y2					74ASXX:GATE			IN
6			A2					74ASXX:GATE			IN
7			B2					74ASXX:LINE-DRV  	OUT
8			Y3					74ASXX:GATE			IN
9			A3					74ASXX:GATE			IN
10			B3  				74ASXX:LINE-DRV  	OUT
11			GND 				GND  					NA
12			A4  				74ASXX:LINE-DRV  	OUT
13			B4  				74ASXX:GATE			IN
14			Y4  				74ASXX:GATE			IN
|
|==============================================================================
|==============================================================================
[Component]			74AS1036_SSOP
[Model File]		PML.MOD
[Package Model]    SSOP14
|
[Pin]		signal_name 	model_name  		direction
|
1			A1					74ASXX:LINE-DRV  	OUT
2			B1					74ASXX:GATE			IN
3			Y1					74ASXX:GATE			IN
4			VCC  				POWER					NA
5			Y2					74ASXX:GATE			IN
6			A2					74ASXX:GATE			IN
7			B2					74ASXX:LINE-DRV  	OUT
8			Y3					74ASXX:GATE			IN
9			A3					74ASXX:GATE			IN
10			B3  				74ASXX:LINE-DRV  	OUT
11			GND 				GND  					NA
12			A4  				74ASXX:LINE-DRV  	OUT
13			B4  				74ASXX:GATE			IN
14			Y4  				74ASXX:GATE			IN
|
|==============================================================================
|==============================================================================
[Component]			74AS1036_TSSOP
[Model File]		PML.MOD
[Package Model]    TSSOP14
|
[Pin]		signal_name 	model_name  		direction
|
1			A1					74ASXX:LINE-DRV  	OUT
2			B1					74ASXX:GATE			IN
3			Y1					74ASXX:GATE			IN
4			VCC  				POWER					NA
5			Y2					74ASXX:GATE			IN
6			A2					74ASXX:GATE			IN
7			B2					74ASXX:LINE-DRV  	OUT
8			Y3					74ASXX:GATE			IN
9			A3					74ASXX:GATE			IN
10			B3  				74ASXX:LINE-DRV  	OUT
11			GND 				GND  					NA
12			A4  				74ASXX:LINE-DRV  	OUT
13			B4  				74ASXX:GATE			IN
14			Y4  				74ASXX:GATE			IN
|
|==============================================================================
|==============================================================================
[Component]			74AS2620_DIP
[Model File]		PML.MOD
[Package Model]    DIP20
|
[Pin]		signal_name 	model_name  		direction
|
1			GAB  				74ASXX:GATE			IN
2			A1					74ASXX:LINE-DRV  	BIDIR
3			A2					74ASXX:LINE-DRV  	BIDIR
4			A3					74ASXX:LINE-DRV  	BIDIR
5			A4					74ASXX:LINE-DRV  	BIDIR
6			A5					74ASXX:LINE-DRV  	BIDIR
7			A6					74ASXX:LINE-DRV  	BIDIR
8			A7					74ASXX:LINE-DRV  	BIDIR
9			A8					74ASXX:LINE-DRV  	BIDIR
10			GND 				GND  					NA
11			B8  				74ASXX:LINE-DRV  	BIDIR
12			B7  				74ASXX:LINE-DRV  	BIDIR
13			B6  				74ASXX:LINE-DRV  	BIDIR
14			B5  				74ASXX:LINE-DRV  	BIDIR
15			B4  				74ASXX:LINE-DRV  	BIDIR
16			B3  				74ASXX:LINE-DRV  	BIDIR
17			B2  				74ASXX:LINE-DRV  	BIDIR
18			B1  				74ASXX:LINE-DRV  	BIDIR
19			GBA-				74ASXX:GATE			IN
20			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS2620_SOIC
[Model File]		PML.MOD
[Package Model]    SOIC20
|
[Pin]		signal_name 	model_name  		direction
|
1			GAB  				74ASXX:GATE			IN
2			A1					74ASXX:LINE-DRV  	BIDIR
3			A2					74ASXX:LINE-DRV  	BIDIR
4			A3					74ASXX:LINE-DRV  	BIDIR
5			A4					74ASXX:LINE-DRV  	BIDIR
6			A5					74ASXX:LINE-DRV  	BIDIR
7			A6					74ASXX:LINE-DRV  	BIDIR
8			A7					74ASXX:LINE-DRV  	BIDIR
9			A8					74ASXX:LINE-DRV  	BIDIR
10			GND 				GND  					NA
11			B8  				74ASXX:LINE-DRV  	BIDIR
12			B7  				74ASXX:LINE-DRV  	BIDIR
13			B6  				74ASXX:LINE-DRV  	BIDIR
14			B5  				74ASXX:LINE-DRV  	BIDIR
15			B4  				74ASXX:LINE-DRV  	BIDIR
16			B3  				74ASXX:LINE-DRV  	BIDIR
17			B2  				74ASXX:LINE-DRV  	BIDIR
18			B1  				74ASXX:LINE-DRV  	BIDIR
19			GBA-				74ASXX:GATE			IN
20			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS2620_SSOP
[Model File]		PML.MOD
[Package Model]    SSOP20
|
[Pin]		signal_name 	model_name  		direction
|
1			GAB  				74ASXX:GATE			IN
2			A1					74ASXX:LINE-DRV  	BIDIR
3			A2					74ASXX:LINE-DRV  	BIDIR
4			A3					74ASXX:LINE-DRV  	BIDIR
5			A4					74ASXX:LINE-DRV  	BIDIR
6			A5					74ASXX:LINE-DRV  	BIDIR
7			A6					74ASXX:LINE-DRV  	BIDIR
8			A7					74ASXX:LINE-DRV  	BIDIR
9			A8					74ASXX:LINE-DRV  	BIDIR
10			GND 				GND  					NA
11			B8  				74ASXX:LINE-DRV  	BIDIR
12			B7  				74ASXX:LINE-DRV  	BIDIR
13			B6  				74ASXX:LINE-DRV  	BIDIR
14			B5  				74ASXX:LINE-DRV  	BIDIR
15			B4  				74ASXX:LINE-DRV  	BIDIR
16			B3  				74ASXX:LINE-DRV  	BIDIR
17			B2  				74ASXX:LINE-DRV  	BIDIR
18			B1  				74ASXX:LINE-DRV  	BIDIR
19			GBA-				74ASXX:GATE			IN
20			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS2620_TSSOP
[Model File]		PML.MOD
[Package Model]    TSSOP20
|
[Pin]		signal_name 	model_name  		direction
|
1			GAB  				74ASXX:GATE			IN
2			A1					74ASXX:LINE-DRV  	BIDIR
3			A2					74ASXX:LINE-DRV  	BIDIR
4			A3					74ASXX:LINE-DRV  	BIDIR
5			A4					74ASXX:LINE-DRV  	BIDIR
6			A5					74ASXX:LINE-DRV  	BIDIR
7			A6					74ASXX:LINE-DRV  	BIDIR
8			A7					74ASXX:LINE-DRV  	BIDIR
9			A8					74ASXX:LINE-DRV  	BIDIR
10			GND 				GND  					NA
11			B8  				74ASXX:LINE-DRV  	BIDIR
12			B7  				74ASXX:LINE-DRV  	BIDIR
13			B6  				74ASXX:LINE-DRV  	BIDIR
14			B5  				74ASXX:LINE-DRV  	BIDIR
15			B4  				74ASXX:LINE-DRV  	BIDIR
16			B3  				74ASXX:LINE-DRV  	BIDIR
17			B2  				74ASXX:LINE-DRV  	BIDIR
18			B1  				74ASXX:LINE-DRV  	BIDIR
19			GBA-				74ASXX:GATE			IN
20			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS2623_DIP
[Model File]		PML.MOD
[Package Model]    DIP20
|
[Pin]		signal_name 	model_name  		direction
|
1			GAB  				74ASXX:GATE			IN
2			A1					74ASXX:LINE-DRV  	BIDIR
3			A2					74ASXX:LINE-DRV  	BIDIR
4			A3					74ASXX:LINE-DRV  	BIDIR
5			A4					74ASXX:LINE-DRV  	BIDIR
6			A5					74ASXX:LINE-DRV  	BIDIR
7			A6					74ASXX:LINE-DRV  	BIDIR
8			A7					74ASXX:LINE-DRV  	BIDIR
9			A8					74ASXX:LINE-DRV  	BIDIR
10			GND 				GND  					NA
11			B8  				74ASXX:LINE-DRV  	BIDIR
12			B7  				74ASXX:LINE-DRV  	BIDIR
13			B6  				74ASXX:LINE-DRV  	BIDIR
14			B5  				74ASXX:LINE-DRV  	BIDIR
15			B4  				74ASXX:LINE-DRV  	BIDIR
16			B3  				74ASXX:LINE-DRV  	BIDIR
17			B2  				74ASXX:LINE-DRV  	BIDIR
18			B1  				74ASXX:LINE-DRV  	BIDIR
19			GBA-				74ASXX:GATE			IN
20			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS2623_SOIC
[Model File]		PML.MOD
[Package Model]    SOIC20
|
[Pin]		signal_name 	model_name  		direction
|
1			GAB  				74ASXX:GATE			IN
2			A1					74ASXX:LINE-DRV  	BIDIR
3			A2					74ASXX:LINE-DRV  	BIDIR
4			A3					74ASXX:LINE-DRV  	BIDIR
5			A4					74ASXX:LINE-DRV  	BIDIR
6			A5					74ASXX:LINE-DRV  	BIDIR
7			A6					74ASXX:LINE-DRV  	BIDIR
8			A7					74ASXX:LINE-DRV  	BIDIR
9			A8					74ASXX:LINE-DRV  	BIDIR
10			GND 				GND  					NA
11			B8  				74ASXX:LINE-DRV  	BIDIR
12			B7  				74ASXX:LINE-DRV  	BIDIR
13			B6  				74ASXX:LINE-DRV  	BIDIR
14			B5  				74ASXX:LINE-DRV  	BIDIR
15			B4  				74ASXX:LINE-DRV  	BIDIR
16			B3  				74ASXX:LINE-DRV  	BIDIR
17			B2  				74ASXX:LINE-DRV  	BIDIR
18			B1  				74ASXX:LINE-DRV  	BIDIR
19			GBA-				74ASXX:GATE			IN
20			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS2623_SSOP
[Model File]		PML.MOD
[Package Model]    SSOP20
|
[Pin]		signal_name 	model_name  		direction
|
1			GAB  				74ASXX:GATE			IN
2			A1					74ASXX:LINE-DRV  	BIDIR
3			A2					74ASXX:LINE-DRV  	BIDIR
4			A3					74ASXX:LINE-DRV  	BIDIR
5			A4					74ASXX:LINE-DRV  	BIDIR
6			A5					74ASXX:LINE-DRV  	BIDIR
7			A6					74ASXX:LINE-DRV  	BIDIR
8			A7					74ASXX:LINE-DRV  	BIDIR
9			A8					74ASXX:LINE-DRV  	BIDIR
10			GND 				GND  					NA
11			B8  				74ASXX:LINE-DRV  	BIDIR
12			B7  				74ASXX:LINE-DRV  	BIDIR
13			B6  				74ASXX:LINE-DRV  	BIDIR
14			B5  				74ASXX:LINE-DRV  	BIDIR
15			B4  				74ASXX:LINE-DRV  	BIDIR
16			B3  				74ASXX:LINE-DRV  	BIDIR
17			B2  				74ASXX:LINE-DRV  	BIDIR
18			B1  				74ASXX:LINE-DRV  	BIDIR
19			GBA-				74ASXX:GATE			IN
20			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS2623_TSSOP
[Model File]		PML.MOD
[Package Model]    TSSOP20
|
[Pin]		signal_name 	model_name  		direction
|
1			GAB  				74ASXX:GATE			IN
2			A1					74ASXX:LINE-DRV  	BIDIR
3			A2					74ASXX:LINE-DRV  	BIDIR
4			A3					74ASXX:LINE-DRV  	BIDIR
5			A4					74ASXX:LINE-DRV  	BIDIR
6			A5					74ASXX:LINE-DRV  	BIDIR
7			A6					74ASXX:LINE-DRV  	BIDIR
8			A7					74ASXX:LINE-DRV  	BIDIR
9			A8					74ASXX:LINE-DRV  	BIDIR
10			GND 				GND  					NA
11			B8  				74ASXX:LINE-DRV  	BIDIR
12			B7  				74ASXX:LINE-DRV  	BIDIR
13			B6  				74ASXX:LINE-DRV  	BIDIR
14			B5  				74ASXX:LINE-DRV  	BIDIR
15			B4  				74ASXX:LINE-DRV  	BIDIR
16			B3  				74ASXX:LINE-DRV  	BIDIR
17			B2  				74ASXX:LINE-DRV  	BIDIR
18			B1  				74ASXX:LINE-DRV  	BIDIR
19			GBA-				74ASXX:GATE			IN
20			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS2640_DIP
[Model File]		PML.MOD
[Package Model]    DIP20
|
[Pin]		signal_name 	model_name  		direction
|
1			T/R- 				74ASXX:GATE			IN
2			A1					74ASXX:LINE-DRV  	BIDIR
3			A2					74ASXX:LINE-DRV  	BIDIR
4			A3					74ASXX:LINE-DRV  	BIDIR
5			A4					74ASXX:LINE-DRV  	BIDIR
6			A5					74ASXX:LINE-DRV  	BIDIR
7			A6					74ASXX:LINE-DRV  	BIDIR
8			A7					74ASXX:LINE-DRV  	BIDIR
9			A8					74ASXX:LINE-DRV  	BIDIR
10			GND 				GND  					NA
11			B8  				74ASXX:LINE-DRV  	BIDIR
12			B7  				74ASXX:LINE-DRV  	BIDIR
13			B6  				74ASXX:LINE-DRV  	BIDIR
14			B5  				74ASXX:LINE-DRV  	BIDIR
15			B4  				74ASXX:LINE-DRV  	BIDIR
16			B3  				74ASXX:LINE-DRV  	BIDIR
17			B2  				74ASXX:LINE-DRV  	BIDIR
18			B1  				74ASXX:LINE-DRV  	BIDIR
19			G-  				74ASXX:GATE			IN
20			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS2640_SOIC
[Model File]		PML.MOD
[Package Model]    SOIC20
|
[Pin]		signal_name 	model_name  		direction
|
1			T/R- 				74ASXX:GATE			IN
2			A1					74ASXX:LINE-DRV  	BIDIR
3			A2					74ASXX:LINE-DRV  	BIDIR
4			A3					74ASXX:LINE-DRV  	BIDIR
5			A4					74ASXX:LINE-DRV  	BIDIR
6			A5					74ASXX:LINE-DRV  	BIDIR
7			A6					74ASXX:LINE-DRV  	BIDIR
8			A7					74ASXX:LINE-DRV  	BIDIR
9			A8					74ASXX:LINE-DRV  	BIDIR
10			GND 				GND  					NA
11			B8  				74ASXX:LINE-DRV  	BIDIR
12			B7  				74ASXX:LINE-DRV  	BIDIR
13			B6  				74ASXX:LINE-DRV  	BIDIR
14			B5  				74ASXX:LINE-DRV  	BIDIR
15			B4  				74ASXX:LINE-DRV  	BIDIR
16			B3  				74ASXX:LINE-DRV  	BIDIR
17			B2  				74ASXX:LINE-DRV  	BIDIR
18			B1  				74ASXX:LINE-DRV  	BIDIR
19			G-  				74ASXX:GATE			IN
20			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS2640_SSOP
[Model File]		PML.MOD
[Package Model]    SSOP20
|
[Pin]		signal_name 	model_name  		direction
|
1			T/R- 				74ASXX:GATE			IN
2			A1					74ASXX:LINE-DRV  	BIDIR
3			A2					74ASXX:LINE-DRV  	BIDIR
4			A3					74ASXX:LINE-DRV  	BIDIR
5			A4					74ASXX:LINE-DRV  	BIDIR
6			A5					74ASXX:LINE-DRV  	BIDIR
7			A6					74ASXX:LINE-DRV  	BIDIR
8			A7					74ASXX:LINE-DRV  	BIDIR
9			A8					74ASXX:LINE-DRV  	BIDIR
10			GND 				GND  					NA
11			B8  				74ASXX:LINE-DRV  	BIDIR
12			B7  				74ASXX:LINE-DRV  	BIDIR
13			B6  				74ASXX:LINE-DRV  	BIDIR
14			B5  				74ASXX:LINE-DRV  	BIDIR
15			B4  				74ASXX:LINE-DRV  	BIDIR
16			B3  				74ASXX:LINE-DRV  	BIDIR
17			B2  				74ASXX:LINE-DRV  	BIDIR
18			B1  				74ASXX:LINE-DRV  	BIDIR
19			G-  				74ASXX:GATE			IN
20			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS2640_TSSOP
[Model File]		PML.MOD
[Package Model]    TSSOP20
|
[Pin]		signal_name 	model_name  		direction
|
1			T/R- 				74ASXX:GATE			IN
2			A1					74ASXX:LINE-DRV  	BIDIR
3			A2					74ASXX:LINE-DRV  	BIDIR
4			A3					74ASXX:LINE-DRV  	BIDIR
5			A4					74ASXX:LINE-DRV  	BIDIR
6			A5					74ASXX:LINE-DRV  	BIDIR
7			A6					74ASXX:LINE-DRV  	BIDIR
8			A7					74ASXX:LINE-DRV  	BIDIR
9			A8					74ASXX:LINE-DRV  	BIDIR
10			GND 				GND  					NA
11			B8  				74ASXX:LINE-DRV  	BIDIR
12			B7  				74ASXX:LINE-DRV  	BIDIR
13			B6  				74ASXX:LINE-DRV  	BIDIR
14			B5  				74ASXX:LINE-DRV  	BIDIR
15			B4  				74ASXX:LINE-DRV  	BIDIR
16			B3  				74ASXX:LINE-DRV  	BIDIR
17			B2  				74ASXX:LINE-DRV  	BIDIR
18			B1  				74ASXX:LINE-DRV  	BIDIR
19			G-  				74ASXX:GATE			IN
20			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS2645_DIP
[Model File]		PML.MOD
[Package Model]    DIP20
|
[Pin]		signal_name 	model_name  		direction
|
1			T/R- 				74ASXX:GATE			IN
2			A1					74ASXX:LINE-DRV  	BIDIR
3			A2					74ASXX:LINE-DRV  	BIDIR
4			A3					74ASXX:LINE-DRV  	BIDIR
5			A4					74ASXX:LINE-DRV  	BIDIR
6			A5					74ASXX:LINE-DRV  	BIDIR
7			A6					74ASXX:LINE-DRV  	BIDIR
8			A7					74ASXX:LINE-DRV  	BIDIR
9			A8					74ASXX:LINE-DRV  	BIDIR
10			GND 				GND  					NA
11			B8  				74ASXX:LINE-DRV  	BIDIR
12			B7  				74ASXX:LINE-DRV  	BIDIR
13			B6  				74ASXX:LINE-DRV  	BIDIR
14			B5  				74ASXX:LINE-DRV  	BIDIR
15			B4  				74ASXX:LINE-DRV  	BIDIR
16			B3  				74ASXX:LINE-DRV  	BIDIR
17			B2  				74ASXX:LINE-DRV  	BIDIR
18			B1  				74ASXX:LINE-DRV  	BIDIR
19			G-  				74ASXX:GATE			IN
20			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS2645_SOIC
[Model File]		PML.MOD
[Package Model]    SOIC20
|
[Pin]		signal_name 	model_name  		direction
|
1			T/R- 				74ASXX:GATE			IN
2			A1					74ASXX:LINE-DRV  	BIDIR
3			A2					74ASXX:LINE-DRV  	BIDIR
4			A3					74ASXX:LINE-DRV  	BIDIR
5			A4					74ASXX:LINE-DRV  	BIDIR
6			A5					74ASXX:LINE-DRV  	BIDIR
7			A6					74ASXX:LINE-DRV  	BIDIR
8			A7					74ASXX:LINE-DRV  	BIDIR
9			A8					74ASXX:LINE-DRV  	BIDIR
10			GND 				GND  					NA
11			B8  				74ASXX:LINE-DRV  	BIDIR
12			B7  				74ASXX:LINE-DRV  	BIDIR
13			B6  				74ASXX:LINE-DRV  	BIDIR
14			B5  				74ASXX:LINE-DRV  	BIDIR
15			B4  				74ASXX:LINE-DRV  	BIDIR
16			B3  				74ASXX:LINE-DRV  	BIDIR
17			B2  				74ASXX:LINE-DRV  	BIDIR
18			B1  				74ASXX:LINE-DRV  	BIDIR
19			G-  				74ASXX:GATE			IN
20			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS2645_SSOP
[Model File]		PML.MOD
[Package Model]    SSOP20
|
[Pin]		signal_name 	model_name  		direction
|
1			T/R- 				74ASXX:GATE			IN
2			A1					74ASXX:LINE-DRV  	BIDIR
3			A2					74ASXX:LINE-DRV  	BIDIR
4			A3					74ASXX:LINE-DRV  	BIDIR
5			A4					74ASXX:LINE-DRV  	BIDIR
6			A5					74ASXX:LINE-DRV  	BIDIR
7			A6					74ASXX:LINE-DRV  	BIDIR
8			A7					74ASXX:LINE-DRV  	BIDIR
9			A8					74ASXX:LINE-DRV  	BIDIR
10			GND 				GND  					NA
11			B8  				74ASXX:LINE-DRV  	BIDIR
12			B7  				74ASXX:LINE-DRV  	BIDIR
13			B6  				74ASXX:LINE-DRV  	BIDIR
14			B5  				74ASXX:LINE-DRV  	BIDIR
15			B4  				74ASXX:LINE-DRV  	BIDIR
16			B3  				74ASXX:LINE-DRV  	BIDIR
17			B2  				74ASXX:LINE-DRV  	BIDIR
18			B1  				74ASXX:LINE-DRV  	BIDIR
19			G-  				74ASXX:GATE			IN
20			VCC 				POWER					NA
|
|==============================================================================
|==============================================================================
[Component]			74AS2645_TSSOP
[Model File]		PML.MOD
[Package Model]    TSSOP20
|
[Pin]		signal_name 	model_name  		direction
|
1			T/R- 				74ASXX:GATE			IN
2			A1					74ASXX:LINE-DRV  	BIDIR
3			A2					74ASXX:LINE-DRV  	BIDIR
4			A3					74ASXX:LINE-DRV  	BIDIR
5			A4					74ASXX:LINE-DRV  	BIDIR
6			A5					74ASXX:LINE-DRV  	BIDIR
7			A6					74ASXX:LINE-DRV  	BIDIR
8			A7					74ASXX:LINE-DRV  	BIDIR
9			A8					74ASXX:LINE-DRV  	BIDIR
10			GND 				GND  					NA
11			B8  				74ASXX:LINE-DRV  	BIDIR
12			B7  				74ASXX:LINE-DRV  	BIDIR
13			B6  				74ASXX:LINE-DRV  	BIDIR
14			B5  				74ASXX:LINE-DRV  	BIDIR
15			B4  				74ASXX:LINE-DRV  	BIDIR
16			B3  				74ASXX:LINE-DRV  	BIDIR
17			B2  				74ASXX:LINE-DRV  	BIDIR
18			B1  				74ASXX:LINE-DRV  	BIDIR
19			G-  				74ASXX:GATE			IN
20			VCC 				POWER					NA
|
|==============================================================================
|
[End]